Philips 74HCT640U, 74HCT640N, 74HCT640DB, 74HCT640D, 74HC640U Datasheet
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DATA SH EET
Product specification
File under Integrated Circuits, IC06
March 1988
INTEGRATED CIRCUITS
74HC/HCT640
Octal bus transceiver; 3-state;
inverting
For a complete data sheet, please also download:
•The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
•The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
March 1988 2
Philips Semiconductors Product specification
Octal bus transceiver; 3-state; inverting 74HC/HCT640
FEATURES
• Octal bidirectional bus interface
• Inverting 3-state outputs
• Output capability: bus driver
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT640 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT640 are octal transceivers featuring
inverting 3-state bus compatible outputs in both send and
receive directions.
The “640” features an output enable (OE) input for easy
cascading and a send/receive (DIR) for direction control.
OE controls the outputs so that the buses are effectively
isolated. The “640” is similar to the “245” but has inverting
outputs.
QUICK REFERENCE DATA
GND = 0 V; T
amb
=25°C; tr=tf=6ns
Notes
1. C
PD
is used to determine the dynamic power dissipation (PD in µW):
PD=CPD× V
CC
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
fi= input frequency in MHz
fo= output frequency in MHz
∑ (CL× V
CC
2
× fo) = sum of outputs
CL= output load capacitance in pF
VCC= supply voltage in V
2. For HC the condition is VI= GND to V
CC
For HCT the condition is VI= GND to VCC− 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”
.
SYMBOL PARAMETER CONDITIONS
TYPICAL
UNIT
HC HCT
t
PHL
/
t
PLH
propagation delay
An to Bn;
Bn to A
n
CL= 15 pF; VCC= 5 V 9 9 ns
C
I
input capacitance 3.5 3.5 pF
C
I/O
input/output capacitance 10 10 pF
C
PD
power dissipation capacitance
per transceiver
notes 1 and 2 35 35 pF
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