74HC21
Dual 4-input AND gate
Rev. 03 — 12 November 2004 Product data sheet
1. General description
The 74HC21 is a high-speed Si-gate CMOS device and is pin compatible with low-power
Schottky TTL (LSTTL). The 74HC21 is specified in compliance with JEDEC
standard no. 7A.
The 74HC21 provide the 4-input AND function.
2. Features
■ Low-power dissipation
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM EIA/JESD22-A114-B exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V.
■ Multiple package options
■ Specified from −40 °Cto+80°C and from −40 °C to +125 °C.
3. Quick reference data
Table 1: Quick reference data
GND = 0 V; T
Symbol Parameter Conditions Min Typ Max Unit
, t
t
PHL
C
I
C
PD
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD=CPD× V
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in V;
N =number of inputs switching;
∑(CL× V
amb
PLH
CC
=25°C; tr=tf= 6 ns.
propagation delay nA,
nB, nC, nD to nY
input capacitance - 3.5 - pF
power dissipation
capacitance
2
× fi× N+∑(CL× V
CC
2
× fo) = sum of outputs.
CL=15pF;
V
CC
VI= GND to V
2
× fo) where:
CC
=5V
CC
-10-ns
[1]
-15-pF
Philips Semiconductors
74HC21
Dual 4-input AND gate
4. Ordering information
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74HC21N −40 °C to +125 °C DIP14 plastic dual in-line package; 14 leads (300 mil) SOT27-1
74HC21D −40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
74HC21DB −40°C to +125 °C SSOP14 plastic shrink small outline package; 14 leads; body width
SOT337-1
5.3 mm
5. Functional diagram
1A
1
1B
2
1C
4
1D
5
2A
9
2B
10
2C
12
2D
13
1Y
2Y
001aab975
6
8
1A
1
1B
2
1C
4
1D
5
2A
9
2B
10
2C
12
2D
13
Fig 1. Functional diagram Fig 2. Logic symbol
1
2
4
5
9
10
12
13
&
&
001aab974
6
8
A
B
C
D
1Y
2Y
001aab973
001aab976
6
8
Y
Fig 3. IEC logic symbol Fig 4. Logic diagram
9397 750 13806 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 12 November 2004 2 of 15
Philips Semiconductors
6. Pinning information
6.1 Pinning
74HC21
Dual 4-input AND gate
Fig 5. Pin configuration
6.2 Pin description
Table 3: Pin description
Symbol Pin Description
1A 1 data input 1A
1B 2 data input 1B
n.c. 3 not connected
1C 4 data input 1C
1D 5 data input 1D
1Y 6 data output 1
GND 7 ground (0 V)
2Y 8 data output 2
2A 9 data input 2A
2B 10 data input 2B
n.c. 11 not connected
2C 12 data input 2C
2D 13 data input 2D
V
CC
14 positive supply voltage
1
1A V
2
1B 2D
3
n.c. 2C
4
1C n.c.
5
1D 2B
6
1Y 2A
7 8
GND 2Y
21
001aab972
14
13
12
11
10
9
CC
9397 750 13806 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 12 November 2004 3 of 15
Philips Semiconductors
7. Functional description
7.1 Function table
74HC21
Dual 4-input AND gate
Table 4: Function table
Input Output
nA nB nC nD nY
LXXXL
XLXXL
XXLXL
XXXLL
HHHHH
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
8. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
I
IK
I
OK
I
O
, I
I
CC
T
stg
P
tot
[1]
supply voltage −0.5 +7 V
input diode current VI < −0.5 V or VI>VCC+ 0.5 V - ±20 mA
output diode current VO< −0.5 V or
output source or sink
V
O>VCC
VO = −0.5 V to VCC+ 0.5 V - ±25 mA
+ 0.5 V
- ±20 mA
current
GNDVCC
or GND current - ±50 mA
storage temperature −65 +150 °C
power dissipation
[1]
DIP14 package
SO14 and SSOP14
- 750 mW
[2]
- 500 mW
packages
[1] Above 70 °C: P
[2] Above 70 °C: P
9397 750 13806 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 12 November 2004 4 of 15
derates linearly with 12 mW/K.
tot
derates linearly with 8 mW/K.
tot
Philips Semiconductors
74HC21
Dual 4-input AND gate
9. Recommended operating conditions
Table 6: Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
V
CC
V
I
V
O
, t
t
r
f
T
amb
supply voltage 2.0 5.0 6.0 V
input voltage 0 - V
output voltage 0 - V
input rise and fall
times
VCC = 2.0 V - - 1000 ns
= 4.5 V - 6.0 500 ns
V
CC
= 6.0 V - - 400 ns
V
CC
CC
CC
V
V
ambient temperature −40 - +125 °C
10. Static characteristics
Table 7: Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
=25°C
T
amb
V
IH
V
IL
V
OH
V
OL
I
LI
I
CC
C
I
HIGH-level input voltage VCC= 2.0 V 1.5 1.2 - V
= 4.5 V 3.15 2.4 - V
V
CC
= 6.0 V 4.2 3.2 - V
V
CC
LOW-level input voltage VCC= 2.0 V - 0.8 0.5 V
= 4.5 V - 2.1 1.35 V
V
CC
= 6.0 V - 2.8 1.8 V
V
CC
HIGH-level output voltage VI=VIHor V
IL
IO= −20 µA; VCC= 2.0 V 1.9 2.0 - V
= −20 µA; VCC= 4.5 V 4.4 4.5 - V
I
O
= −20 µA; VCC= 6.0 V 5.9 6.0 - V
I
O
= −4 mA; VCC= 4.5 V 3.98 4.32 - V
I
O
= −5.2 mA; VCC= 6.0 V 5.48 5.81 - V
I
O
LOW-level output voltage VI=VIHor V
IL
IO=20µA; VCC= 2.0 V - 0 0.1 V
=20µA; VCC= 4.5 V - 0 0.1 V
I
O
=20µA; VCC= 6.0 V - 0 0.1 V
I
O
= 4 mA; VCC= 4.5 V - 0.15 0.26 V
I
O
= 5.2 mA; VCC= 6.0 V - 0.16 0.26 V
I
O
input leakage current VI=VCCor GND; VCC= 6.0 V - - ±0.1 µA
quiescent supply current VI=VCCor GND; IO= 0 A; VCC= 6.0 V - - 2.0 µA
input capacitance - 3.5 - pF
9397 750 13806 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data sheet Rev. 03 — 12 November 2004 5 of 15