INTEGRATED CIRCUITS
DATA SHEET
74HC1G32; 74HCT1G32
2-input OR gate
Product specification |
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2002 May 15 |
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Supersedes data of 2001 Apr 06 |
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Philips Semiconductors |
Product specification |
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2-input OR gate |
74HC1G32; 74HCT1G32 |
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∙Wide operating voltage from 2.0 to 6.0 V
∙Symmetrical output impedance
∙High noise immunity
∙Low power dissipation
∙Balanced propagation delays
∙Very small 5 pins package
∙Output capability: standard.
GND = 0 V; Tamb = 25 °C; tr = tf ≤ 6.0 ns.
The 74HC1G/HCT1G32 is a highspeed Si-gate CMOS device.
The 74HC1G/HCT1G32 provides the 2-input OR function. The standard output currents are 1/2 compared to the 74HC/HCT32.
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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HC1G |
HCT1G |
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tPHL/tPLH |
propagation delay A and B to Y |
CL = 15 pF; VCC = 5 V |
8 |
10 |
ns |
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CI |
input capacitance |
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1.5 |
1.5 |
pF |
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CPD |
power dissipation capacitance |
notes 1 and 2 |
19 |
20 |
pF |
Notes
1.CPD is used to determine the dynamic power dissipation (PD in μW). PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where:
fi = input frequency in MHz; fo = output frequency in MHz;
CL = output load capacitance in pF; VCC = supply voltage in Volts.
2.For HC1G the conditions is VI = GND to VCC.
For HCT1G the conditions is VI = GND to VCC − 1.5 V.
See note 1.
INPUTS |
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OUTPUT |
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A |
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B |
Y |
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L |
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L |
L |
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L |
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H |
H |
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H |
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L |
H |
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H |
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H |
H |
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Note
1. H = HIGH voltage level; L = LOW voltage level.
2002 May 15 |
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Philips Semiconductors |
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Product specification |
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2-input OR gate |
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74HC1G32; 74HCT1G32 |
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ORDERING INFORMATION |
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PACKAGES |
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TYPE NUMBER |
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TEMPERATURE |
PINS |
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PACKAGE |
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MATERIAL |
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CODE |
MARKING |
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RANGE |
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74HC1G32GW |
−40 to +125 °C |
5 |
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SC88A |
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plastic |
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SOT353 |
HG |
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74HCT1G32GW |
−40 to +125 °C |
5 |
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SC88A |
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plastic |
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SOT353 |
TG |
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74HC1G32GV |
−40 to +125 °C |
5 |
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SC-74A |
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plastic |
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SOT753 |
H32 |
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74HCT1G32GV |
−40 to +125 °C |
5 |
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SC-74A |
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plastic |
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SOT753 |
T32 |
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PIN DESCRIPTION |
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PIN |
SYMBOL |
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DESCRIPTION |
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1 |
B |
data input B |
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2 |
A |
data input A |
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3 |
GND |
ground (0 V) |
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4 |
Y |
data output Y |
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5 |
VCC |
supply voltage |
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handbook, halfpage |
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B |
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VCC |
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1 |
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5 |
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32 |
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A |
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2 |
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Y |
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GND |
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3 |
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4 |
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MNA163 |
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Fig.1 |
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Pin configuration. |
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handbook, halfpage |
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1 |
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³1 |
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4 |
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2 |
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MNA165 |
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Fig.3 |
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IEC logic symbol. |
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handbook, halfpage |
1 |
B |
4 |
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Y |
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2 |
A |
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MNA164 |
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Fig.2 Logic symbol.
handbook, halfpage
B
Y
A
MNA166
Fig.4 Logic diagram.
2002 May 15 |
3 |
Philips Semiconductors |
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Product specification |
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2-input OR gate |
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74HC1G32; 74HCT1G32 |
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RECOMMENDED OPERATING CONDITIONS |
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SYMBOL |
PARAMETER |
CONDITIONS |
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74HC1G |
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74HCT1G |
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UNIT |
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MIN. |
TYP. |
MAX. |
MIN. |
TYP. |
MAX. |
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VCC |
supply voltage |
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2.0 |
5.0 |
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6.0 |
4.5 |
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5.0 |
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5.5 |
V |
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VI |
input voltage |
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0 |
− |
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VCC |
0 |
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− |
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VCC |
V |
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VO |
output voltage |
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0 |
− |
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VCC |
0 |
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− |
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VCC |
V |
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Tamb |
operating ambient |
see DC and AC |
−40 |
+25 |
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+125 |
−40 |
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+25 |
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+125 |
°C |
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temperature |
characteristics per |
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device |
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tr, tf |
input rise and fall |
VCC = 2.0 V |
− |
− |
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1000 |
− |
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− |
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− |
ns |
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times |
VCC = 4.5 V |
− |
− |
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500 |
− |
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− |
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500 |
ns |
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VCC = 6.0 V |
− |
− |
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400 |
− |
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− |
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− |
ns |
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V); notes 1 and 2.
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
UNIT |
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VCC |
supply voltage |
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−0.5 |
+7.0 |
V |
IIK |
input diode current |
VI < −0.5 V or VI > VCC + 0.5 V |
− |
±20 |
mA |
IOK |
output diode current |
VO < −0.5 V or VO > VCC + 0.5 V |
− |
±20 |
mA |
IO |
output source or sink current |
−0.5 V < VO < VCC + 0.5 V |
− |
±12.5 |
mA |
ICC |
VCC or GND current |
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− |
±25 |
mA |
Tstg |
storage temperature |
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−65 |
+150 |
°C |
PD |
power dissipation per package |
for temperature range from −40 to +125 °C; |
− |
200 |
mW |
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note 3 |
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Notes
1.Stresses beyond those listed may cause permanent damage to the device. These are stress rating only and functional operation of the device at these or any other conditions beyond those under ‘recommended operating conditions’ is not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.
2.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
3.Above 55 °C the value of PD derates linearly with 2.5 mW/K.
2002 May 15 |
4 |
Philips Semiconductors |
Product specification |
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2-input OR gate |
74HC1G32; 74HCT1G32 |
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Family 74HC1G
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
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TEST CONDITIONS |
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Tamb (°C) |
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SYMBOL |
PARAMETER |
OTHER |
VCC |
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−40 to +85 |
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−40 to +125 |
UNIT |
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(V) |
MIN. |
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TYP.(1) |
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MAX. |
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MIN. |
MAX. |
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VIH |
HIGH-level input voltage |
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2.0 |
1.5 |
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1.2 |
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− |
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1.5 |
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V |
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4.5 |
3.15 |
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2.4 |
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− |
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3.15 |
− |
V |
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6.0 |
4.2 |
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3.2 |
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− |
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4.2 |
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V |
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VIL |
LOW-level input voltage |
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2.0 |
− |
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0.8 |
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0.5 |
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0.5 |
V |
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4.5 |
− |
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2.1 |
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1.35 |
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− |
1.35 |
V |
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6.0 |
− |
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2.8 |
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1.8 |
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− |
1.8 |
V |
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VOH |
HIGH-level output |
VI = VIH or VIL; |
2.0 |
1.9 |
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2.0 |
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− |
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1.9 |
− |
V |
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voltage |
IO = −20 μA |
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VI = VIH or VIL; |
4.5 |
4.4 |
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4.5 |
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− |
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4.4 |
− |
V |
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IO = −20 μA |
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VI = VIH or VIL; |
6.0 |
5.9 |
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6.0 |
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− |
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5.9 |
− |
V |
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IO = −20 μA |
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VI = VIH or VIL; |
4.5 |
4.13 |
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4.32 |
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− |
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3.7 |
− |
V |
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IO = −2.0 mA |
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VI = VIH or VIL; |
6.0 |
5.63 |
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5.81 |
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− |
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5.2 |
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V |
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IO = −2.6 mA |
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VOL |
LOW-level output voltage |
VI = VIH or VIL; |
2.0 |
− |
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0 |
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0.1 |
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− |
0.1 |
V |
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IO = 20 μA |
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VI = VIH or VIL; |
4.5 |
− |
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0 |
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0.1 |
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0.1 |
V |
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IO = 20 μA |
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VI = VIH or VIL; |
6.0 |
− |
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0 |
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0.1 |
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0.1 |
V |
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IO = 20 μA |
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VI = VIH or VIL; |
4.5 |
− |
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0.15 |
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0.33 |
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0.4 |
V |
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IO = 2.0 mA |
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VI = VIH or VIL; |
6.0 |
− |
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0.16 |
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0.33 |
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0.4 |
V |
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IO = 2.6 mA |
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ILl |
input leakage current |
VI = VCC or GND |
6.0 |
− |
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1.0 |
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1.0 |
μA |
ICC |
quiescent supply current |
VI = VCC or GND; |
6.0 |
− |
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− |
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10 |
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20 |
μA |
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IO = 0 |
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Note
1. All typical values are measured at Tamb = 25 °C.
2002 May 15 |
5 |