Philips 74HC08, 74HCT08 Technical data
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74HC08; 74HCT08
Quad 2-input AND gate
Product specification
Supersedes data of 1990 Dec 01
2003 Jul 25
Philips Semiconductors Product specification
Quad 2-input AND gate 74HC08; 74HCT08
FEATURES
• Complies with JEDEC standard no. 8-1A
• ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
• Specified from −40 to +85 °C and −40 to +125 °C.
DESCRIPTION
The 74HC/HCT08 are high-speed Si-gateCMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A. The 74HC/HCT08 provide the 2-input
AND function.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf= 6 ns.
amb
SYMBOL PARAMETER CONDITIONS
t
PHL/tPLH
C
I
C
PD
propagation delay nA, nB to nY CL= 15 pF; VCC= 5 V 7 11 ns
input capacitance 3.5 3.5 pF
power dissipation capacitance per gate notes 1 and 2 10 20 pF
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
2
× fi× N+Σ(CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz;
fo= output frequency in MHz;
= output load capacitance in pF;
C
L
VCC= supply voltage in Volts;
N = total load switching outputs;
Σ(CL× V
2
× fo) = sum of the outputs.
CC
2. For 74HC08: the condition is VI= GND to VCC.
For 74HCT08: the condition is VI= GND to VCC− 1.5 V.
TYPICAL
UNIT
74HC08 74HCT08
FUNCTION TABLE
INPUT OUTPUT
nA nB nY
LLL
LHL
HLL
HHH
Note
1. H = HIGH voltage level;
L = LOW voltage level.
2003 Jul 25 2
Philips Semiconductors Product specification
Quad 2-input AND gate 74HC08; 74HCT08
ORDERING INFORMATION
TYPE NUMBER
74HC08N −40 to +125 °C 14 DIP14 plastic SOT27-1
74HCT08N −40 to +125 °C 14 DIP14 plastic SOT27-1
74HC08D −40 to +125 °C 14 SO14 plastic SOT108-1
74HCT08D −40 to +125 °C 14 SO14 plastic SOT108-1
74HC08DB −40 to +125 °C 14 SSOP14 plastic SOT337-1
74HCT08DB −40 to +125 °C 14 SSOP14 plastic SOT337-1
74HC08PW −40 to +125 °C 14 TSSOP14 plastic SOT402-1
74HCT08PW −40 to +125 °C 14 TSSOP14 plastic SOT402-1
74HC08BQ −40 to +125 °C 14 DHVQFN14 plastic SOT762-1
74HCT08BQ −40 to +125 °C 14 DHVQFN14 plastic SOT762-1
PINNING
PIN SYMBOL DESCRIPTION
1 1A data input
2 1B data input
3 1Y data output
4 2A data input
5 2B data input
6 2Y data output
7 GND ground (0 V)
8 3Y data output
9 3A data input
10 3B data input
11 4Y data output
12 4A data input
13 4B data input
14 V
CC
TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE
supply voltage
PACKAGE
2003 Jul 25 3
Philips Semiconductors Product specification
Quad 2-input AND gate 74HC08; 74HCT08
V
1A
CC
114
(1)
GND
8
7
GND
3Y
13
12
11
10
9
MCE183
4B
4A
4Y
3B
3A
handbook, halfpage
1A
1B
1Y
2A
2B
2Y
GND
handbook, halfpage
1
2
3
4
08
5
6
7
MNA220
V
14
CC
13
4B
12
4A
11
4Y
10
3B
9
3A
8
3Y
1B
1Y
2A
2B
2Y
2
3
4
5
6
Top view
Fig.1 Pin configuration DIP14, SO14 and
(T)SSOP14.
handbook, halfpage
1
1A
2
1B
4
2A
5
2B
9
3A
10
3B
12
4A
13
4B
1Y
2Y
3Y
4Y
MNA222
3
6
8
11
(1) The die substrate is attached to this pad using conductive die
attach material. It can not be used as a supply pin or input.
Fig.2 Pin configuration DHVQFN14.
handbook, halfpage
1
2
4
5
9
10
12
13
&
&
&
&
MNA223
3
6
8
11
Fig.3 Logic symbol.
2003 Jul 25 4
Fig.4 IEC logic symbol.
Philips Semiconductors Product specification
Quad 2-input AND gate 74HC08; 74HCT08
handbook, halfpage
A
Y
B
MNB037
Fig.5 HC logic diagram (one gate).
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS
V
V
V
T
t
r,tf
CC
I
O
amb
supply voltage 2.0 5.0 6.0 4.5 5.0 5.5 V
input voltage 0 − V
output voltage 0 − V
ambient
temperature
input rise and fall
times
see DC and AC
characteristics per device
VCC= 2.0 V −−1000 −−−ns
= 4.5 V − 6.0 500 − 6.0 500 ns
V
CC
V
= 6.0 V −−400 −−−ns
CC
handbook, halfpage
A
Y
B
MNA221
Fig.6 HCT logic diagram (one gate).
74HC08 74HCT08
MIN. TYP. MAX. MIN. TYP. MAX.
0 − V
CC
0 − V
CC
CC
CC
V
V
−40 +25 +125 −40 +25 +125 °C
UNIT
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
I
IK
I
OK
I
O
I
, I
CC
T
stg
P
tot
supply voltage −0.5 +7.0 V
input diode current VI< −0.5 V or VI>VCC+ 0.5 V −±20 mA
output diode current VO< −0.5 V or VO>VCC+ 0.5 V −±20 mA
output source or sink current −0.5V<VO<VCC+ 0.5 V −±25 mA
GNDVCC
or GND current −±50 mA
storage temperature −65 +150 °C
power dissipation
DIP14 package T
other packages T
= −40 to +125 °C; note 1 − 750 mW
amb
= −40 to +125 °C; note 2 − 500 mW
amb
Notes
1. For DIP14 packages: above 70 °C derate linearly with 12 mW/K.
2. For SO14 packages: above 70 °C derate linearly with 8 mW/K.
For SSOP14 and TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K.
For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K.
2003 Jul 25 5
Philips Semiconductors Product specification
Quad 2-input AND gate 74HC08; 74HCT08
DC CHARACTERISTICS
Family 74HC08
At recommended operating conditions; voltages are referenced to GND (ground=0V).
SYMBOL PARAMETER
T
=25°C
amb
V
V
V
V
I
I
I
IH
IL
OH
OL
LI
OZ
CC
HIGH-level input voltage 2.0 1.5 1.2 − V
LOW-level input voltage 2.0 − 0.8 0.5 V
HIGH-level output voltage VI=VIHor V
LOW-level output voltage VI=VIHor V
input leakage current VI=VCCor GND 6.0 − 0.1 ±.0.1 µA
3-state output OFF current VI=VIHor VIL;
quiescent supply current VI=VCCor GND; IO= 0 6.0 −−2µA
TEST CONDITIONS
MIN. TYP. MAX. UNIT
OTHER V
CC
(V)
4.5 3.15 2.4 − V
6.0 4.2 3.2 − V
4.5 − 2.1 1.35 V
6.0 − 2.8 1.8 V
IL
IO= −20 µA 2.0 1.9 2.0 − V
I
= −20 µA 4.5 4.4 4.5 − V
O
I
= −4.0 mA 4.5 3.98 4.32 − V
O
I
= −20 µA 6.0 5.9 6.0 − V
O
I
= −5.2 mA 6.0 5.48 5.81 − V
O
IL
IO=20µA 2.0 − 0 0.1 V
I
=20µA 4.5 − 0 0.1 V
O
I
= 4.0 mA 4.5 − 0.15 0.26 V
O
I
=20µA 6.0 − 0 0.1 V
O
I
= 5.2 mA 6.0 − 0.16 0.26 V
O
6.0 −−±.0.5 µA
VO=VCCor GND
2003 Jul 25 6
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