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74f821
DATASHEETS
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Philips 74f821, 74f826 DATASHEETS

INTEGRATED CIRCUITS
74F821/822/823/824/825/826
Bus interface registers
Product specification 1996 Jan 05 IC15 Data Handbook
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Philips Semiconductors Product specification
74F821 10-bit bus interface register, non-inverting (3-State) 74F822 10-bit bus interface register, inverting (3-State) 74F823 9-bit bus interface register, non-inverting (3-State) 74F824 9-bit bus interface register, inverting (3-State) 74F825 8-bit bus interface register, non-inverting (3-State) 74F826 8-bit bus interface register, inverting (3-State)

FEATURES

•High speed parallel registers with positive edge-triggered D-type
flip-flops
•High performance bus interface buffering for wide data/address
paths or busses carrying parity
•High impedance PNP base inputs for reduced loading (20µA in
high and low states)
•I
is 20µA vs 1000µA for AM29821 series
IL
•Buffered control inputs to reduce AC effects
•Ideal where high speed, light loading, or increased fan-in as
required with MOS microprocessor
•Positive and negative over-shoots are clamped to ground
•3-State outputs glitch free during power-up and power-down
•Slim Dip 300 mil package
•Broadside pinout compatible with AMD AM 29821-29826 series
•Outputs sink 64mA and source 24mA
•Industrial temperature range available (–40°C to +85°C) for
74F823

DESCRIPTION

The 74F821 series bus interface registers are designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of busses carrying parity.
The 74F821/74F822 are buffered 10-bit wide versions of the popular 74F374/74F534 functions.
The 74F822 is the inverted output version of 74F821. The 74F823 and 74F824 are 9-bit wide buffered registers with clock
enable (CE interfacing in high microprogrammed systems.
The 74F824 is the inverted version of 74F823. The 74F825 and 74F826 are 8-bit buffered registers with all the
74F823/74F824 controls plus output enable (OE allow multiuser control of the interface, e.g., CS They are ideal for uses as an output port requiring high I
The 74F826 is the inverted version of 74F825.
74F821, 74F822 180MHz 75mA 74F823, 74F824 180MHz 70mA 74F825, 74F826 180MHz 65mA
) and master reset (MR) which are ideal for parity bus
0, OE1, OE2) to
, DMA, and RD/WR.
TYPE
TYPICAL
f
max
TYPICAL
SUPPLY CURRENT
(TOTAL)
OL/IOH
.

ORDERING INFORMATION

ORDER CODE
DESCRIPTION
24-pin plastic slim DIP (300mil)
24-pin plastic SOL
1996 Jan 05 853-1304 16195
COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
N74F821N, N74F822N, N74F823N,
N74F824N, N74F825N, N74F826N
N74F821D, N74F822D, N74F823D,
N74F824D, N74F825D, N74F826D
2
INDUSTRIAL RANGE
V
= 5V ±10%,
CC
T
= –40°C to +85°C
amb
I74F823N SOT222-1
I74F823D SOT137-1
PKG. DWG. #
Philips Semiconductors Product specification
74F821/822/823/824/825/826Bus interface registers

INPUT AND OUTPUT LOADING AND FAN OUT TABLE

PINS DESCRIPTION
74F (U.L.)
HIGH/LOW
Dn Data inputs 1.0/1.0 20µA/0.6mA 74F821 CP Clock input 1.0/1.0 20µA/0.6mA 74F822 OE Output enable input (active low) 1.0/3.0 20µA/1.8mA
Qn, Qn Data outputs 1200/106.7 24mA/64mA
Dn Data inputs 1.0/1.0 20µA/0.6mA
CP Clock input 1.0/1.0 20µA/0.6mA 74F823 CE Clock enable input (active low) 1.0/3.0 20µA/1.8mA 74F824 MR Master reset input (active low) 1.0/3.0 20µA/1.8mA
OE Output enable input (active low) 1.0/3.0 20µA/1.8mA
Qn, Qn Data outputs 1200/106.7 24mA/64mA
Dn Data inputs 1.0/1.0 20µA/0.6mA
CP Clock input 1.0/1.0 20µA/0.6mA 74F825 CE Clock enable input (active low) 1.0/3.0 20µA/1.8mA 74F826 MR Master reset input (active low) 1.0/3.0 20µA/1.8mA
OE Output enable input (active low) 1.0/3.0 20µA/1.8mA
Qn, Qn Data outputs 1200/106.7 24mA/64mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
LOAD VALUE
HIGH/LOW

PIN CONFIGURATION – 74F821

1
OE
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
D8 D9
11
GND
SF00482

LOGIC SYMBOL – 74F821

24
V
CC
23
Q0
22
Q1
21
Q2
20
Q3
19
Q4
18
Q5
17
Q6
16
Q7
15
Q8 Q9
14 1312
CP
13
= Pin 24
V
CC
GND = Pin 12
1
23456789
D0 D1 D2 D3 D4 D5 D6 D7
CP OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
23 22 21 20 19 18 17 16
10 11
D8 D9
Q8 Q9
15 14
SF00483
1996 Jan 05
3
Philips Semiconductors Product specification
74F821/822/823/824/825/826Bus interface registers

IEC/IEEE SYMBOL – 74F821

1 13
2 3 4 5 6 7 8 9 10 11
EN1
G2
2D

PIN CONFIGURATION – 74F822

1
OE
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
D8 D9
11
GND

IEC/IEEE SYMBOL – 74F822

1 13
1
23 22 21 20 19 18 17 16 15 14
SF00484
2 3 4 5 6 7 8 9 10 11
EN1
G2
2D
1
23 22 21 20 19 18 17 16 15 14
SF00487

PIN CONFIGURATION – 74F823

24
V
CC
23
0
Q
22
Q
1
21
2
Q
20
3
Q
19
Q4
18
Q
5
17
Q
6
16
Q7
15
Q
8 9
Q
14 1312
CP
OE D0 D1 D2
D3 D4 D5 D6 D7 D8
MR
GND
1 2 3 4 5
6 7 8
9 10 11
24
V
CC
23
Q0
22
Q1
21
Q2
20
Q3
19
Q4
18
Q5
17
Q6
16
Q7
15
Q8 CE
14 1312
CP

LOGIC SYMBOL – 74F822

23456789
D0 D1 D2 D3 D4 D5 D6 D7
CP
13
OE
1
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
= Pin 24
V
CC
GND = Pin 12
1996 Jan 05
23 22 21 20 19 18 17 16
SF00485
10 11
D8 D9
Q8 Q9
15 14
SF00486

LOGIC SYMBOL – 74F823

23456789
D0 D1 D2 D3 D4 D5 D6 D7
CP
13
CE
14
MR
11
OE
1
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
23 22 21 20 19 18 17 16
4
= Pin 24
V
CC
GND = Pin 12
SF00488
10
D8
Q8
15
SF00489
Philips Semiconductors Product specification
74F821/822/823/824/825/826Bus interface registers

IEC/IEEE SYMBOL – 74F823

1 11 14 13
2 3 4 5 6 7 8 9 10
EN1 R G1
1G2
2D

PIN CONFIGURATION – 74F824

1
OE
2
D0
3
D1
4
D2
5
D3
6
D4
7
D5
8
D6
9
D7
10
D8
MR
11
GND

IEC/IEEE SYMBOL – 74F824

1 11 14 13
1
23 22 21 20 19 18 17 16 15
SF00490
2 3 4 5 6 7 8 9 10
EN1 R G1
2D
1G2
1
23 22 21 20 19 18 17 16 15
SF00493

PIN CONFIGURATION – 74F825

1
0
24
V
CC
23
0
Q
22
Q
1
21
2
Q
20
3
Q
19
Q4
18
5
Q
17
6
Q
16
Q7
15
Q
8
CE
14 1312
CP
OE
OE
DO
MR
GND
2
I
3
4
D1
5
D2
6
D3
7
D4 D5
8
D6
9 10
D7
11
24
V
CC
23
OE2
22
QO
21
Q1
20
Q2 Q3
19
Q4
18
Q5
17
Q6
16
Q7
15
CE
14
CP
1312

LOGIC SYMBOL – 74F824

23456789
D0 D1 D2 D3 D4 D5 D6 D7
CP
13
CE
14
MR
11
OE
1
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
= Pin 24
V
CC
GND = Pin 12
1996 Jan 05
23 22 21 20 19 18 17 16
SF00491
10
D8
Q8
15
SF00492

LOGIC SYMBOL – 74F825

13
CP
14
CE
11
MR
1
OE0
2
OE1
23
OE2
= Pin 24
V
CC
GND = Pin 12
5
SF00494
3456789
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
22 21 20 19 18 17 16
SF00495
10
15
Philips Semiconductors Product specification
74F821/822/823/824/825/826Bus interface registers

IEC/IEEE SYMBOL – 74F825

1 2 23 11 14 13
3 4 5 6 7 8 9 10
&
EN
R G1
1G2
2D

PIN CONFIGURATION – 74F826

1
OE0
2
OE
I
3
DO
4
D1
5
D2
6
D3
7
D4 D5
8
D6
9
10
D7
11
MR
GND

LOGIC SYMBOL – 74F826

13 14
11
1 2
23
= Pin 24
1 2 23 11 14 13
3 4 5 6 7 8 9 10
V OE QO Q1 Q2 Q3 Q4 Q5 Q6 Q7 CE CP
CC
22 21 20 19 18 17 16 15
SF00496
2
V
CC
GND = Pin 12

IEC/IEEE SYMBOL – 74F826

1
24 23 22 21 20 19 18 17 16 15 14 1312
3456789
D0 D1 D2 D3 D4 D5 D6 D7
CP CE MR OE0 OE1 OE2
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
22 21 20 19 18 17 16
&
EN
R G1
1G2
2D
1
10
15
SF00498
22 21 20 19 18 17 16 15
SF00499

LOGIC DIAGRAM FOR 74F821

13
CP
1
OE
VCC = Pin 24 GND = Pin 12
1996 Jan 05
D0
2
D CP
D1
3
Q0
D
Q
CP
23
Q
D2
Q1
SF00497
4
22
D CP
D3
5
Q2
D CP
21
Q
D4
6
Q
20
Q3
D CP
D5
7
D
Q
CP
19
Q4
D6
8
Q
18
Q5
D CP
D7
9
D
Q
CP
17
Q6
D8
10
Q
16
Q7
D CP
D9
11
D
Q
Q8
Q
CP
15
14
Q9
SF00500
6
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