INTEGRATED CIRCUITS
74F764-1/74F765-1
DRAM dual-ported controllers
Product specification
IC15 Data Handbook
1992 Aug 10
Philips Semiconductors Product specification
74F764-1/74F765-1DRAM dual-ported controllers
FEA TURES
•Allows two microprocessors to access the same bank of dynamic
RAM
•Performs arbitration, signal timing, address multiplexing and
refresh
•9 Address output pins allow direct control of up to 256K dynamic
RAMs
•External address multiplexing enables control of 1Mbit (or greater)
dynamic RAMs
•Separate refresh clock allows adjustable refresh timing
•74F764-1 has an on-chip 18-bit address input latch
•74F764-1/765-1 allow control of dynamic RAMs with row access
times down to 40ns
•74F764-1/765-1 output drivers designed for first reflected wave
switching
DESCRIPTION
The 74F764-1/765-1 DRAM Dual-ported Controller is a high-speed
synchronous dual-port arbiter and timing generator that allows two
microprocessors, microcontrollers, or any other memory accessing
device to share the same block of DRAM. The device performs
arbitration, signal timing, address multiplexing, and refresh address
generation, replacing up to 25 discrete devices.
74F764-1 vs. 74F765-1
The 74F764-1, though functionally and pin-to-pin compatible with
the 74F765-1, differs from the later in that it has an on-chip address
input latch. This is useful in systems that have unlatched or
multiplexed address and data bus.
The specialized outputs eliminate the need for signal terminations in
essentially all applications.
Both devices are available in 40-pin plastic DIP or 44-pin PLCC with
pinouts designed to allow convenient placement of microprocessors,
DRAMs, and other support chips.
ORDERING INFORMATION
DESCRIPTION
40-Pin Plastic Dual In-line Package 74F764-1N, 74F765-1N SOT129–1
44-Pin Plastic Leaded Chip Carrier 74F764-1A, 74F765-1A SOT187–2
COMMERCIAL RANGE
V
= 5V±10%,
CC
T
= 0°C to 70°C
amb
DRAWING NUMBER
PIN CONFIGURATIONS
N Package
A1
1
2
A10
3
A2
4
A11
5
A3
6
A12
7
A4
8
A13
A5
9
10
A14
11
VCC
12
A6
13
A15
14
A7
15
A16
16
A8
17
A17
18
A9
A18
19
1
SEL
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
2120
RCP
WG
GNT
CASEN
DTACK
RAS
MA0
MA1
MA2
GND
MA3
MA4
MA5
MA6
MA7
MA8
CP
SEL
REQ
REQ
A Package
2
SEL2
CASEN
DTACK
MA8CP NC
39
RAS
38
MA0
37
MA1
36
MA2
35
GND
34
GND
33
MA3
32
MA4
31
MA5
30
MA6
29
MA7
6 5 4 3 2 1 44 43 42 41 40
7
A4
8
A13
9
A5
10
A14
11
VCC
12
A6
13
A15
A7
14
A16
15
16
A8
17
A17
18 19 20 21 22 23 24 25 26 27 28
2
2
1
A1A10A2A11A3A12 RCPWG GNT
REQ
SEL
1NCA18A9 NC
1
REQ
SF00703
1992 Aug 10 853-0878 07412
2
SF00685