Philips Semiconductors Product specification
74F67416-bit serial/parallel-in, serial-out shift register (3-State)
FEA TURES
•16-bit serial I/O shift register
•16-bit parallel-in/serial-out converter
•Recirculating serial shifting
•Common serial data I/O pin (3-State)
DESCRIPTION
The 74F674 is a 16-bit shift register with serial and parallel load
capability and serial output. A single pin serves alternately as an
input for serial entry or as a 3-State serial output. In the serial out
mode the data recirculates in the register. Chip Select, Read/Write
and Mode inputs provide control flexibility. The 74F674 operates in
one of four modes, as indicated in the Function table.
Hold: A High signal on the Chip Select (CS
and forces the Serial Input/Output (SI/O) 3-State buffer into the high
impedance state.
Serial load: Data present on the SI/O pin shifts into the register on
the falling edge of CP
. Data enters the Q0 position and shifts toward
Q15 on successive clocks.
Serial output: The SI/O 3-State buffer is active and the register
contents are shifted out from Q15 and simultaneously shifted back
into Q0.
Parallel load: Data present on D0–D15 is entered into the register
on the falling edge of CP
. The SI/O 3-State buffer is active and
represents the Q15 output. To prevent false clocking, CP
Low during a Low-to-High transition of CS
) input prevents clocking
must be
.
PIN CONFIGURA TION
CS
CP
2
R/W
3
NC
4
5
M
SI/O
6
7
D0
D1
8
D2
9
10 15
D3
D4
11
12 13
GND
TYPE TYPICAL f
MAX
74F674 95MHz 55mA
V
241
CC
D15
23
22
D14
21
D13
20
D12
D11
19
18
D10
17
D9
16
D8
D7
14
D6
D5
TYPICAL SUPPL Y
CURRENT
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE
24-Pin Plastic Slim DIP
(300mil)
24-Pin Plastic SOL N74F674D
= 5V ±10%, T
V
CC
amb
N74F674N
SF01188
(TOTAL)
= 0°C to +70°C
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
D0–D15 Parallel data inputs 1.0/1.0 20µA/0.6mA
CS Chip Select input (active Low) 1.0/1.0 20µA/0.6mA
CP Clock Pulse input (active falling edge) 1.0/1.0 20µA/0.6mA
M Mode select input 1.0/1.0 20µA/0.6mA
R/W Read/Write input 1.0/1.0 20µA/0.6mA
Serial data input or 3.5/1.0 70mA/0.6mA
Serial 3-state output 150/40 3.0mA/24mA
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
1989 Feb 05 853–1248 92263
1
LOAD VALUE
HIGH/LOW
Philips Semiconductors Product specification
74F67416-bit serial/parallel-in, serial-out shift register (3-State)
LOGIC SYMBOL
D0 D1 D4 D5 D6 D7D3D2
1
CS
2
CP
3
R/W
5
M
V
= Pin 24
CC
GND = Pin 12
8910
11 13 147 16 17 18
D8 D9 D12 D13 D14 D15D11D10
SO
6
19 20 21 2215 23
FUNCTION TABLE
CONTROL INPUTS
CS R/W M CP
H X X X High Z Hold
L L X ↓ Data in Serial load
L H L ↓ Data out
L H H ↓ Active
H = High voltage level
L = Low voltage level
X = Don’t care
↓ = High-to-Low transition of designed input
SI/O OPERATING
STATUS
Serial output with
recirculation
Parallel load;
no shifting
MODE
SF01189
LOGIC SYMBOL (IEEE/IEC)
5
3
1
2
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
23
0
1
&&EN
3, 4D
3, 4D
3, 4D
M
SRG16
0
3
C4(0/1/2)
, 4D
3
6
SF01190
LOGIC DIAGRAM
VCC= Pin 24
GND = Pin 12
CS
CP
R/W
D0–D15 (7–11, 13–23)
5
M
1
2
3
PE
Q0
CP
D0–D15
Q15
6
SI/O
SF01191
1989 Feb 05
2