Philips Semiconductors Product specification
74F5371-of-10 decoder (3-State)
DESCRIPTION
PIN CONFIGURA TION
The 74F537 is a one-of-ten decoder/demultiplexer with four active
High BCD inputs and ten mutually exclusive outputs. A Polarity
control (P) input determines whether the outputs are active Low or
active High. The 74F537 has 3-State outputs and a High signal on
the Output Enables (OE
) input forces all outputs to the high
impedance state. Two input Enables, active High (E1) and active
Low (E
0), are available for demultiplexing data to the selected
output in either non-inverted or inverted form. Input codes greater
than BCD nine causes all outputs to go to the inactive state (i.e.,
same polarity as the P input).
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPL Y
CURRENT
(TOTAL)
74F537 9ns 44mA
Q2
1
Q1
2
Q0
3
P
4
OE
5
A0
6
A1
7
Q5
8
Q6
9
10 11
GND
VCC
20
Q3
19
Q4
18
17
A3
A2
16
E
0
15
E1
14
Q9
13
12
Q8
Q7
ORDERING INFORMATION
DESCRIPTION COMMERCIAL RANGE
20-Pin Plastic DIP N74F537N
20-Pin Plastic SOL N74F537D
= 5V ±10%, T
V
CC
= 0°C to +70°C
amb
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
A0 - A3 Data inputs 1.0/1.0 20µA/0.6mA
E0 Enable input (active Low) 1.0/1.0 20µA/0.6mA
E1 Enable input (active High) 1.0/1.0 20µA/0.6mA
P Polarity control input 1.0/1.0 20µA/0.6mA
OE Output Enable input 1.0/1.0 20µA/0.6mA
Q0 - Q9 Data outputs 150/40 3.0mA/24mA
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOAD VALUE
HIGH/LOW
SF01004
LOGIC SYMBOL
6716
A0 A1 A2
4
P
E0
15
E1
14
OE
5
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
VCC = Pin 20
GND = Pin 10
32119188911
1989 Jan 20 853–0873 95586
17
A3
Q8 Q9
12 13
SF01005
LOGIC SYMBOL (IEEE/IEC)
4
N10
5
6
0
7
17
13
3
14
15
1
DMUX
3
2
1
19
18
8
9
11
12
13
SF01006
EN
0,10
1,10
2,10
3,10
4,10
5,10
0
9
6,10
7,10
8,10
9,10
&
10G
&
Philips Semiconductors Product specification
74F5371-of-10 decoder (3-State)
LOGIC DIAGRAM
17
A3
16
A2
7
A1
6
A0
15
0
E
14
E1
4
P
5
VCC= Pin 20
GND = Pin 10
OE
32119188911
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
12 13
Q8 Q9
FUNCTION TABLE
INPUTS OUTPUTS
OE E0 E1 A3 A2 A1 A0 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9
H X X X X X X Z Z Z Z Z Z Z Z Z Z High Impedance
LLHXXLXXXXXXX
L
L
H
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
H
H
H
H
H
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
H
H
H
H
H
H
H
L
L
L
L
H
L
H
H
L
H
L
H
H
H
H
L
L
L
L
X
H
L
X
L
L
L
L
L
H
L
H
H
L
H
L
H
H
H
H
L
L
L
L
X
H
H
X
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
X
L
H
H
L
H
L
H
L
H
L
H
X
X
L
H
L
H
L
H
L
H
L
H
X
X
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Outputs equal P input Disable
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
H
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
H
L
L
H
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
L
H
H
H
H
Active High output
(P = L)
Active Low output
(P = H)
SF01007
1989 Jan 20
2