Philips 74f410 DATASHEETS
Philips Semiconductors FAST Products Product specification
74F410Register stack – 16×4 RAM 3-State output register
1
January 8, 1990 853-1310 98498
FEATURES
•Edge triggered output register
•ypical access time of 19.5ns
•Optimize for register stack operation
•3–state outputs
•18–pin package
DESCRIPTION
The 74F410 is a register oriented high speed
64–bit read/write memory organized as
16–words by 4–bits. An edge–triggered 4–bit
output register allows new input data to be
written while previous data is held. 3–state
outputs are provided for maximum versatility.
The 74F410 is fully compatible with all TTL
families.
TYPE
TYPICAL
ACCESS
TIME
TYPICAL
SUPPLY
CURRENT
( TOTAL)
74F410 19.5ns 45mA
FUNCTIONAL DESCRIPTION
Write operation – When the three control
inputs, write enable (WE
), chip select (CS),
and clock (CP), are low the information on
the data inputs (D0–D3) is written into the
memory location selected by the address
inputs (A0–A3). If the input data changes
while WE
, CS, and CP are low, the contents
of the selected memory location follow these
changes provided setup and hold time criteria
are met.
Read operation – When CS
is low, WE is
high, and CP goes from low–to–high, the
contents of the memory location selected by
the address inputs (A0–A3) are edge–
triggered into the output register.
When WE
is low, CS is low, CP goes from
low–to–high, the data at the data inputs is
edge–triggered into the output register. The
OE
input controls the output buffers. When
OE
is high the four outputs (Q0–Q3) are in a
high impedance or off state; when OE
is low,
the outputs are determined by the state of the
output register.
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
VCC = 5V ±10%, T
amb
= 0°C to +70°C
18–pin plastic DIP (300mil) N74F410N
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION 74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
D0 – D3 Data inputs 1.0/1.0 20µA/0.6mA
A0 – A3 Address inputs 1.0/1.0 20µA/0.6mA
CP Clock pulse input (active rising edge) 1.0/2.0 20µA/1.2mA
CS Chip select input (active low) 1.0/2.0 20µA/1.2mA
OE Output enable input (active low) 1.0/1.0 20µA/0.6mA
WE Write enable input (active low) 1.0/1.0 20µA/0.6mA
Q0 – Q3 Data outputs 150/40 3mA/24mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
PIN CONFIGURATION LOGIC SYMBOL IEC/IEEE SYMBOL
18
17
16
15
14
13
127
6
5
4
3
2
1
A1
Q1
Q2
D3
D2
D0
Q0
CS
WE
CP
A0
A3
OE
3
4
5
6
11
10
D0 D2 D3D1
Q0 Q1 Q2 Q3
16 14 12 10
15 13 11
118
A2
V
CC
VCC = Pin 18
GND = Pin 9
D1
17
A0
A1
A2
A3
CS
WE
CP
OE
3
4
5
6
1
2
7
8
13
12
15
14
17
16
2
1
A1,2D A3
&
0
1
A
0
15
Q3
GND
109
7
8
&
G1
G2
1C
EN3
Philips Semiconductors FAST Products Product specification
74F410Register stack – 16×4 RAM 3-State output register
January 8, 1990
2
LOGIC DIAGRAM
V
CC
= pin
18
GND = pin 9
Address
decoder
A0
A1
A2
A3
3
4
5
6
RAM
16
4
D0
D1
D2
D3
17
15
13
11
Data
inputs
16
Register
Q0
Q1
Q2
Q3
16
14
12
10
WE
CS
CP
OE
8
15
13
11
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
PARAMETER RATING UNIT
V
CC
Supply voltage –0.5 to +7.0 V
V
IN
Input voltage –0.5 to +7.0 V
I
IN
Input current –30 to +5 mA
Voltage applied to output in high output state –0.5 to V
CC
V
I
OUT
Current applied to output in low output state 48 mA
T
amb
Operating free air temperature range 0 to +70
°C
T
stg
Storage temperature range –65 to +150
°C
V
OUT
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