INTEGRATED CIRCUITS
74F30244
Octal 30Ω line driver with enable,
non-inverting (open collector)
Product specification
Supersedes data of 1999 Jan 08
IC15 Data Handbook
2000 Jun 30
Philips Semiconductors Product specification
Octal 30Ω line driver with enable, non-inverting
(open collector)
FEA TURES
•Ideal for driving transmission lines or backplanes. 160mA I
for applications with impedance as low as 30Ω
OL
ideal
•Guaranteed threshold voltages on the incident wave while driving
line as low as 30Ω
•High impedance NPN base inputs for reduced loading (20µA in
High and Low states)
•Ideal for applications which require high output drive and minimal
bus loading
•Octal interface
•Non-inverting
•Open-Collector outputs sink 160mA
•Multiple side pins are used for V
inductance (improves speed and noise immunity)
and GND to reduce lead
CC
•Available in 24-pin standard slim DIP (300mil) plastic or SOL
DESCRIPTION
The 74F30244 is a high current open collector octal buffer
composed of eight inverters. The 74F30244 has non-inverting paths.
The device has eight inverters with two Output Enables (OE
each controlling four outputs. The driver is designed to deal with the
low-impedance transmission line effects found on printed circuit
boards when fast edge rates are used. The 160mA I
ample power to achieve TTL switching voltages on the incident
wave.
TYPE
74F30244 10.5ns 69mA
TYPICAL
PROPAGATION
DELA Y
74F30244
0, OE1),
provides
OL
TYPICAL
SUPPLY CURRENT
(TOTAL)
ORDERING INFORMATION
COMMERCIAL RANGE
DESCRIPTION
24-pin Plastic Slim DIP (300mil) N74F30244N SOT222-1
24–pin Plastic SOL
NOTE:
1. Because of the high current sinking capability of these parts, the SOL package should only be used under the following conditions:
a. 50% duty cycle,
AND
b. 3/5 of remaining 50% driving ≤ 100mA (leaving the remaining 2/5 of the drive ≤ 160mA)
OR
c. use ≤ 450 linear feet per minute forced air or other thermal mounting techniques.
1
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
N74F30244D SOT137-1
PACKAGE
DRAWING NUMBER
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
D0–D7 Data inputs 1.0/0.033 20µA/20µA
OE0–OE1 Output Enable inputs (Active Low) 1.0/0.033 20µA/20µA
Q0–Q7 Data outputs (OC) OC/266.7 OC/160mA
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. OC = Open Collector.
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
2000 Jun 30 853–1 157 24025
2
Philips Semiconductors Product specification
Octal 30Ω line driver with enable, non-inverting
(open collector)
PIN CONFIGURATION
1
2
Q1
3
Q2
4
Q3
5
GND
6
GND
7
GND
8
GND
9
Q4
10
Q5
11
Q6
12 13
LOGIC SYMBOL
24 23 22 21 16 15 14 13
D0 D1 D2 D3 D4 D5 D6 D7
D0
24Q0
D1
23
D2
22
D3
21
OE
20
19
V
18
V
17
OE
16
D4
15
D5
14
D6
D7Q7
SF01388
0
CC
CC
1
LOGIC DIAGRAM
VCC = PIN 18, 19
GND = PIN 5, 6, 7, 8
OE
OE
74F30244
24
D0
23
D1
22
D2
21
D3
20
0
16
D4
15
D5
14
D6
13
D7
17
1
1
2
3
4
9
10
11
12
SF01394
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
20 OE0
17 OE1
VCC = PIN 18, 19
GND = PIN 5, 6, 7, 8
IEC/IEEE SYMBOL
20
17
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
12349101112
SF01390
EN1
EN2
1
124
223
322
421
916
1015
1114
1213
2000 Jun 30
SF01392
3