Philips 74f251a DATASHEETS
Philips Semiconductors Product specification
74F251A8-input multiplexer (3-State)
FEA TURES
•High speed 8-to-1 multiplexing
•On chip decoding
•Multifunction capability
•Inverting and Non-Inverting outputs
•Both outputs are 3-State for further multiplexer expansion
DESCRIPTION
The 74F251A is a logic implementation of a single 8-position switch
with the switch position controlled by the state of three Select (S0,
S1, S2) inputs. True (Y) and complementary (Y
provided. The output enable (OE
) is active Low. When OE is High,
both outputs are in High impedance state, allowing multiple output
connections to a common bus without driving nor loading the bus
significantly . All but one device must be in High impedance state to
avoid high currents that would exceed the maximum ratings when
the outputs of the 3-State devices are tied together. When the output
of more than one device is tied together the user must ensure that
there is no overlap in the active Low portion of the output enable
voltages.
) outputs are both
PIN CONFIGURA TION
1
I3
2
I2
I1
3
I0
4
Y
5
6
Y
OE
TYPICAL
TYPE
PROPAGATION
DELA Y
74F251A 4.5ns 19mA
16
V
CC
15
I4
14
I5
13
I6
12
I7
11
S0
107
S1
98GND S2
TYPICAL
SUPPLY CURRENT
(TOTAL)
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
16-pin plastic DIP N74F251AN SOT38-4
16-pin plastic SO N74F251AD SOT162-1
COMMERCIAL RANGE
= 5V ±10%,
V
CC
= 0°C to +70°C
T
amb
SF00778
PKG
DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
I0–I7 Data inputs 1.0/1.0 20µA/0.6mA
S0–S2 Select inputs 1.0/1.0 20µA/0.6mA
OE Output Enable input (active Low) 1.0/1.0 20µA/0.6mA
Y, Y Data outputs 150/40 3mA/24mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
11
10
9
7
V
= Pin 16
CC
GND = Pin 8
4 12131415
I0 I1 I2 I3 I4 I5 I6 I7
S0
S1
S2
OE
123
YY
65
SF00779
IEC/IEEE SYMBOL
7
11
10
9
4
3
2
1
15
14
13
12
EN
MUX
0
0
G
7
2
5
6
SF00780
1996 Jan 05 853–0358 16191
1
Philips Semiconductors Product specification
74F251A8-input multiplexer (3-State)
LOGIC DIAGRAM
I0 I1 I2 I3 I4 I5 I6 I7
4 3 2 1 15 14 13 12
OE
11
S0
10
S1
9
S2
7
V
= Pin 16
CC
GND = Pin 8
FUNCTION TABLE
INPUTS OUTPUTS
S2 S1 S0 OE Y Y
X X X H Z Z
L L L L I0 I0
L L H L I1 I1
L H L L I2 I2
L H H L I3 I3
H L L L I4 I4
H L H L I5 I5
H H L L I6 I6
H H H L I7 I7
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
56
YY
SF00781
1996 Jan 05
2
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