Philips 74f2245 DATASHEETS
INTEGRATED CIRCUITS
74F2245
Octal transceiver with 30 equivalent
output termination (3-State)
Product specification 1996 May 10
IC15 Data Handbook
Philips Semiconductors Product specification
Octal transceiver with 30 equivalent output termination
(3-State)
FEA TURES
•Octal bidirectional bus interface
•30 Ohm output termination for driving DRAM
•Outputs are placed in high impedance state during power-off
conditions
•SSOP Type II package
DESCRIPTION
The 74F2245 is an octal transceiver featuring non-inverting 3-State
bus compatible outputs in both transmit and receive directions. The
device features an Output Enable (OE
Transmit/Receive (T/R
) input for direction control. The 3-State
outputs, B0-B7, have been designed to prevent output bus loading if
the power is removed from the device.
The 30 Ohm series termination on the outputs reduces
over/undershoot making them ideal for driving DRAM.
TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL)
74F2245 4.0ns 70mA
) input for easy cascading and
PIN CONFIGURATION
1
T/R
2
A0
3
A1
4
A2
5
A3
6
A4
7
A5
8
A6
9
A7
10 11
GND
20
19
18
17
16
15
14
13
12
SF00198
74F2245
V
CC
OE
B0
B1
B2
B3
B4
B5
B6
B7
ORDERING INFORMATION
DESCRIPTION
20-Pin Plastic DIP N74F2245N SOT146-1
20-Pin Plastic SOL N74F2245D SOT163-1
20-Pin Plastic SSOP N74F2245DB SOT339-1
COMMERCIAL RANGE
VCC = 5V ±10%, T
= 0°C to +70°C
amb
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
A0-A7, B0-B7 Data inputs 3.5/1.0 70µA/0.6mA
OE Output Enable input (active Low) 1.0/2.0 20µA/1.2mA
T/R Transmit/Receive input 1.0/2.0 20µA/1.2mA
A0-A7 A port outputs 150/8 3.0mA/5mA*
B0-B7 B port outputs 150/8 3.0mA/5mA*
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
* 12mA with reduced noise margin
DRAWING NUMBER
1996 May 10 853-1833 16802
2
Philips Semiconductors Product specification
OUTPUTS
Octal transceiver with 30 equivalent output termination
(3-State)
LOGIC SYMBOL
234
A0 A1 A2 A3 A4 A5
19
1
V
= Pin 20
CC
GND = Pin 10
OE
T/R
B0
18
LOGIC DIAGRAM
B2 B3 B4 B5
B1
16 15 14 13
17
567
89
A6 A7
B6 B7
12 11
SF00199
A0 A1 A2 A3 A4 A5 A6 A7
23456789
IEC/IEEE SYMBOL
19
1
2
3
4
5
6
7
8
9
G3
3EN1 (BA)
3EN1 (AB)
∇ 1
2 ∇
74F2245
18
17
16
15
14
13
12
11
SF00200
19
OE
1
T/R
VCC = Pin 20
GND = Pin 10
FUNCTION TABLE
INPUTS
OE T/R
L L Bus B data to Bus A
L H Bus A data to Bus B
H X Z
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
18
B0
17
B1
16
B2
15
B3
14
B4
13
B5
12
B6
B7
SF00201
11
1996 May 10
3
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