Philips 74ALVT16841DL, 74ALVT16841DGG Datasheet

INTEGRATED CIRCUITS

74ALVT16841

2.5V/3.3V ALVT 20-bit bus interface latch
(3-State)

Product specification
Supersedes data of 1996 Aug 28
IC23 Data Handbook




1998 Feb 13

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

74AL VT168412.5V/3.3V 20-bit bus interface latch (3-State)

FEA TURES

•High speed parallel latches

•5V I/O Compatible

•Live insertion/extraction permitted

•Extra data width for wide address/data paths or buses carrying

parity

•Power-up 3-State

•Power-up reset

•Ideal where high speed, light loading, or increased fan-in are

required with MOS microprocessors

•Output capability: +64mA/–32mA

•Latch-up protection exceeds 500mA per Jedec Std 17

•Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

•ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

QUICK REFERENCE DATA

t

PLH

t

PHL

C
C
I

CCZ

IN

Out

Propagation delay
nDx to nQx

Input capacitance DIR, OE VI = 0V or V
Output pin capacitance V
Total supply current Outputs disabled 40 70 µA

CL = 50pF

= 0V or V

I/O

DESCRIPTION

The 74ALVT16841 Bus interface latch is designed to provide extra
data width for wider data/address paths of buses carrying parity. It is
designed for V
5V.

The 74ALVT16841 consists of two sets of ten D-type latches with
3-State outputs. The flip-flops appear transparent to the data when
Latch Enable (nLE) is High. This allows asynchronous operation, as
the output transition follows the data in transition. On the nLE
High-to-Low transition, the data that meets the setup and hold time
is latched.

Data appears on the bus when the Output Enable (nOE
When nOE

CONDITIONS

T

amb

CC

CC

operation at 2.5V or 3.3V with I/O compatibility to

CC

) is Low.

is High the output is in the High-impedance state.

TYPICAL

= 25°C

2.5V 3.3V

1.8

2.1
3 3 pF
9 9 pF

1.5

1.7

ns

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

56-Pin Plastic SSOP Type III –40°C to +85°C 74ALVT16841 DL AV16841 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVT16841 DGG AV16841 DGG SOT364-1

1998 Feb 13 853-1868 18961

2

Philips Semiconductors Product specification

74ALVT168412.5V/3.3V 20-bit bus interface latch (3-State)

LOGIC SYMBOL

55 54 52 51 49 48 47 45 44 43

1D0 1D1 1D2 1D3 1D4 1D5 1D6 1D7

56

1LE

1

1OE

1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7

2 3 5 6 8 9 10 12 13 14

42 41 40 38 37 36 34 33 31 30

2D0 2D1 2D2 2D3 2D4 2D5 2D6 2D7

29

2LE

28

2OE

2Q0 2Q1 2Q2 2Q3 2Q4 2Q5 2Q6 2Q7

15 16 17 19 20 21 23 24 26 27

LOGIC SYMBOL (IEEE/IEC)

1
56
28
29

55
54
52
51
49
48
47
45
44

43
42
41
40
38
37
36
34
33
31
30

EN2
C1
EN4
C3

1D

3D

2 ∇

4 ∇

SA00077

1D8 1D9

1Q8 1Q9

2D8 2D9

2Q8 2Q9

SH00023

2
3
5
6
8

9
10
12
13
14
15
16
17
19
20
21
23
24
26
27

PIN CONFIGURATION

1

1OE

2

1Q0

3

1Q1

4

GND

5

1Q2

6

1Q3

7

V

CC

8

1Q4

9

1Q5

10

1Q6

11

GND

1Q7

12

1Q8

13
14

1Q9

15

2Q0

16

2Q1

17

2Q2

18

GND

2Q3

19
20

2Q4

21

2Q5

22

V

CC

23

2Q6

24

2Q7

GND

25

2Q8

26

2Q9

27
28

2OE

56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29

SA00076

1LE
1D0
1D1
GND
1D2
1D3
V

CC

1D4
1D5
1D6
GND
1D7
1D8
1D9
2D0
2D1
2D2
GND
2D3
2D4
2D5
V

CC

2D6
2D7
GND
2D8

2D9

2LE

1998 Feb 13

3

Philips Semiconductors Product specification

OPERATING MODE

74ALVT168412.5V/3.3V 20-bit bus interface latch (3-State)

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

55, 54, 52, 51, 49,

48, 47, 45, 44, 43

42, 41, 40, 38, 37,

1D0 – 1D9
2D0 – 2D9

Data inputs

36, 34, 33, 31, 30

2, 3, 5, 6, 8, 9, 10,

12, 13, 14

15, 16, 17, 19, 20,

1Q0 – 1Q9
2Q0 – 2Q9

Data outputs

21, 23, 24, 26, 27

1, 28 1OE, 2OE

56, 29 1LE, 2LE

4, 11, 18, 25, 32,

39, 46, 53

7, 22, 35, 50 V

GND Ground (0V)

CC

Output enable inputs
(active-Low)

Latch enable inputs
(active rising edge)

Positive supply
voltage

LOGIC DIAGRAM

nD0

nD1

nD2

nD3

nD4

FUNCTION TABLE

INPUTS OUTPUTS

nOE nLE nDx nQ0 – nQ9

L

H

L

H

H

L

↓

L

l

↓

h

H X X Z High impedance

L L X NC Hold

H = High voltage level
h = High voltage level one set-up time prior to the High-to-Low LE

transition
L = Low voltage level
l = Low voltage level one set-up time prior to the High-to-Low LE

transition
↓ = High-to-Low LE transition
NC= No change
X = Don’t care
Z = High impedance “off” state

L

nD5

nD6

L

H

L

H

nD7

nD8

Transparent

Latched

nD9

nLE

nOE

D

LQ

D

LQ LQ LQ LQ LQ LQ LQ LQ LQ

nQ0

nQ1

D

nQ2

D

nQ3

D

nQ4

D

nQ5

D

nQ6

D

D

nQ7

nQ8

D

nQ9

SH00024

1998 Feb 13

4

Philips Semiconductors Product specification

I

DC output current

mA

SYMBOL

PARAMETER

UNIT

I

mA

74ALVT168412.5V/3.3V 20-bit bus interface latch (3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

DC supply voltage –0.5 to +4.6 V
DC input diode current VI < 0 –50 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–1.2 to +7.0 V

Output in Off or High state –0.5 to +7.0 V

Output in Low state 128

OUT

T

stg

p

Output in High state –64

Storage temperature range –65 to 150 °C

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

2.5V RANGE LIMITS 3.3V RANGE LIMITS
MIN MAX MIN MAX

V

CC

V

V

V

I

OH

OL

∆t/∆v Input transition rise or fall rate; Outputs enabled 10 10 ns/V

T

amb

DC supply voltage 2.3 2.7 3.0 3.6 V
Input voltage 0 5.5 0 5.5 V

I

High-level input voltage 1.7 2.0 V

IH

Input voltage 0.7 0.8 V

IL

High-level output current –8 –32 mA
Low-level output current 8 32
Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 24 64

Operating free-air temperature range –40 +85 –40 +85 °C

1998 Feb 13

5