Philips 74ALVT16601DGG Datasheet

INTEGRATED CIRCUITS

74ALVT16601

18-bit universal bus transceiver (3-State)

Product specification Supersedes data of 1996 Nov 14 IC23 Data Handbook

 

1998 Feb 13

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

2.5V/3.3V 18-bit universal bus transceiver (3-State)

FEA TURES

•18-bit bidirectional bus interface

•5V I/O Compatible

•3-State buffers

•Output capability: +64mA/-32mA

•TTL input and output switching levels

•Input and output interface capability to systems at 5V supply

•Bus-hold data inputs eliminate the need for external pull-up

resistors to hold unused inputs

•Live insertion/extraction permitted

•Power-up reset

•Power-up 3-State

•No bus current loading when output is tied to 5V bus

•Positive edge triggered clock inputs

•Latch-up protection exceeds 500mA per JEDEC Std 17

•ESD protection exceeds 2000V per MIL STD 883 Method 3015

and 200V per Machine Model

DESCRIPTION

The 74ALVT16601 is a high-performance BiCMOS product designed for V up to 5V .

This device is an 18-bit universal transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions. Data flow in each direction is controlled by output enable (OEAB OEBA CPBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is High. When LEAB is Low, the A data is latched if CPAB is held at a High or Low logic level. If LEAB is Low, the A-bus data is stored in the latch/flip-flop on the Low-to-High transition of CPAB. When OEAB active. When OEAB state. The clocks can be controlled with the clock-enable inputs (CEBA

Data flow for B-to-A is similar to that of A-to-B but uses OEBA, LEBA and CPBA.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

), latch enable (LEAB and LEBA), and clock (CPAB and

/CEAB).

74AL VT16601

operation at 2.5V and 3.3V with I/O compatibility

and

is Low, the outputs are

is High, the outputs are in the high-impedance

QUICK REFERENCE DATA

TYPICAL

2.5V 3.3V

1.9

2.5 4 4 pF 8 8 pF

1.5

1.9

PLH

PHL

C C I

CCZ

I/O

CONDITIONS

= 25°C

amb

Propagation delay An to Bn or Bn to An

Input capacitance (Control pins) VI = 0V or V I/O pin capacitance Outputs disabled; V Total supply current Outputs disabled 40 60 µA

CL = 50pF

= 0V or V

I/O

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

56-Pin Plastic SSOP Type III –40°C to +85°C 74ALVT16601 DL AV16601 DL SOT371-1 56-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVT16601 DGG A V16601 DGG SOT364-1

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION

1, 27 OEAB/OEBA A-to-B/ B-to-A Output enable input

29, 56 CEBA/CEAB B-to-A/A-to-B clock enable

2, 28 LEAB/LEBA A-to-B/B-to-A Latch enable input

55,30 CPAB/CPBA A-to-B/B-to-A Clock input (active rising edge)

3, 5, 6, 8, 9, 10, 12, 13, 14, 15,

16, 17, 19, 20, 21, 23, 24, 26

54, 52, 51, 49, 48, 47, 45, 44, 43,

42, 41, 40, 38, 37, 36, 34, 33, 31

4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)

7, 22, 35, 50 V

A0-A17 Data inputs/outputs (A side)

B0-B17 Data inputs/outputs (B side)

(active Low)

Positive supply voltage

1998 Feb 13 853-1885 18958

Philips Semiconductors Product specification

2.5V/3.3V 18-bit universal bus transceiver (3-State)

PIN CONFIGURA TION

OEAB

LEAB

GND

6 7

GND

A10

A11

GND GND

A12

A13

A14

A15

A16

GND

A17

26 27

OEBA

28 29

LEBA

SW00192

CEAB CPAB

54 53

GND B1

51 50

47 46

GND B6

B10

B11

40 39

B12

B13

B14

36 35

B15

B16

33 32

GND B17

CPBA

CEBA

FUNCTION TABLE

CEAB OEAB LEAB CPAB A

X H X X X Z X L H X L L X L H X H H H L L X X L L L ↑ L L L L L ↑ H H L L L H X L L L L X B

X = Don’t care H = High voltage level L = Low voltage level ↑ = Low to High Z = High impedance “off” state † = A-to-B data flow is shown: B-to-A flow is similar but uses

OEBA



= Output level before the indicated steady-state input conditions

were established.

§ = Output level before the indicated steady-state input conditions were established, provided that CPAB was Low before LEAB went Low.

INPUTS

, LEBA, CPBA, and CEBA.

74ALVT16601

OUTPUT



1998 Feb 13

Philips Semiconductors Product specification

DC out ut current

2.5V/3.3V 18-bit universal bus transceiver (3-State)

LOGIC SYMBOL (Positive Logic)

OEAB

CEAB

CPAB

LEAB

LEBA

CPBA

CEBA

OEBA

CLK

CE ID C1

CLK

74ALVT16601

ABSOLUTE MAXIMUM RATINGS

SYMBOL

OUT

stg

DC supply voltage –0.5 to +4.6 V DC input diode current VI < 0 –50 mA DC input voltage DC output diode current VO < 0 –50 mA DC output voltage

Storage temperature range –65 to +150 °C

PARAMETER CONDITIONS RATING UNIT

To 17 other channels

1, 2

–0.5 to +7.0 V

Output in Off or High state –0.5 to +7.0 V

Output in Low state 128

Output in High state –64

SW00193

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.

1998 Feb 13

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

VOHHigh-level out ut voltage

VOLLow–level out ut voltage

Bus Hold current

Data inputs

2.5V/3.3V 18-bit universal bus transceiver (3-State)

74ALVT16601

RECOMMENDED OPERATING CONDITIONS

2.5V RANGE LIMITS 3.3V RANGE LIMITS MIN MAX MIN MAX

DC supply voltage 2.3 2.7 3.0 3.6 V Input voltage 0 5.5 0 5.5 V

High-level input voltage 1.7 2.0 V

Input voltage 0.7 0.8 V

High-level output current –8 –32 mA Low-level output current 8 32 Low-level output current; current duty cycle ≤ 50%; f ≥ 1kHz 24 64

∆t/∆v Input transition rise or fall rate; Outputs enabled 10 10 ns/V

amb

Operating free-air temperature range –40 +85 –40 +85 °C

DC ELECTRICAL CHARACTERISTICS (3.3V 0.3V RANGE)

LIMITS

SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C UNIT

MIN TYP1MAX

RST

OFF

HOLD

PU/PD

CCH

CCL

CCZ

∆I

NOTES:

1. All typical values are at V

2. This is the increase in supply current for each input at the specified voltage level other than V

3. This parameter is valid for any V transition time of 100µsec is permitted. This parameter is valid for T

4. Unused pins at V

5. I

CCZ

6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.

7. This is the bus hold overdrive current required to force the input to the opposite logic state.

Input clamp voltage VCC = 3.0V; IIK = –18mA –0.85 –1.2 V

VCC = 3.0 to 3.6V; IOH = –100µA VCC–0.2 V VCC = 3.0V; IOH = –32mA 2.0 2.3

VCC = 3.0V; IOL = 100µA 0.07 0.2

VCC = 3.0V; IOL = 16mA 0.25 0.4 VCC = 3.0V; IOL = 32mA 0.3 0.5 VCC = 3.0V; IOL = 64mA 0.4 0.55

Power-up output low voltage6VCC = 3.6V; IO = 1mA; VI = VCC or GND 0.55 V

VCC = 3.6V; VI = VCC or GND Control pins 0.1 ±1 VCC = 0 or 3.6V; VI = 5.5V 0.1 10

Input leakage current

VCC = 3.6V; VI = 5.5V VCC = 3.6V; VI = V

Data pins

0.1 20

0.5 10

VCC = 3.6V; VI = 0V 0.1 -5

Off current VCC = 0V; VI or VO = 0 to 4.5V 0.1 ±100 µA

VCC = 3V; VI = 0.8V 75 130

Current into an output in the High state when VO > V

Power up/down 3-State output

current

Quiescent supply current VCC = 3.6V; Outputs Low, VI = GND or V

Additional supply current per

is measured with outputs pulled up to VCC or pulled down to ground.

input pin

or GND.

= 3.3V and T

VCC = 3V; VI = 2.0V –75 –140 VCC = 0V to 3.6V; VCC = 3.6V ±500

VO = 5.5V; VCC = 3.0V 10 125 µA VCC ≤ 1.2V; VO = 0.5V to VCC; VI = GND or VCC

OE = Don’t care VCC = 3.6V; Outputs High, VI = GND or V

VCC = 3.6V; Outputs Disabled; VI = GND or V

0 0.06 0.1

CC,

O =

0 3.5 5 mA

CC,

O =

CC,

O =

VCC = 3V to 3.6V; One input at VCC–0.6V, Other inputs at VCC or GND

= 25°C.

amb

between 0V and 1.2V with a transition time of up to 10msec. From V

= 25°C only.

amb

or GND

1.0 ±100 µA

0.06 0.1

0.04 0.4 mA

= 1.2V to VCC = 3.3V ± 0.3V a

µA

1998 Feb 13

+ 9 hidden pages