INTEGRATED CIRCUITS
74ALVCH16827
20-bit buffer/line driver, non-inverting
(3-State)
Product specification
IC24 Data Handbook
1998 Jul 27
Philips Semiconductors Product specification
CPDPower dissi ation ca acitance er latch
74ALVCH1682720-bit buffer/line driver, non-inverting (3-State)
FEA TURES
•Wide supply voltage range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•Wide supply voltage range of 1.2V to 3.6V
•CMOS low power consumption
•Direct interface with TTL levels
•Universal bus transceiver with D-type latches and D-type flip-flops
capable of operating in transparent, latched, clocked or
clocked-enabled mode.
•MULTIBYTE
•Low inductance multiple V
and ground bounce
TM
flow-through standard pin-out architecture
and GND pins for minimum noise
CC
•Current drive ±24 mA at 3.0 V
•All inputs have bus hold circuitry
•Output drive capability 50Ω transmission lines @ 85°C
•3-State non-inverting outputs for bus oriented applications
QUICK REFERENCE DATA
GND = 0V; T
SYMBOL
t
PHL/tPLH
C
I
NOTES:
1. C
PD
P
D
f
= input frequency in MHz; CL = output load capacity in pF;
i
= output frequency in MHz; VCC = supply voltage in V;
f
o
(C
= 25°C; tr = tf = 2.5ns
amb
PARAMETER CONDITIONS TYPICAL UNIT
Propagation delay
CP to Qn
Input capacitance 5 pF
p
is used to determine the dynamic power dissipation (PD in W):
= CPD × V
× V
L
2
× fi + (CL × V
CC
2
× fo) = sum of outputs.
CC
p
2
× fo) where:
CC
p
VCC = 2.5V, CL = 30pF
V
DESCRIPTION
The 74ALVCH16827 is a 20-bit non-inverting buf fer/driver with
3-State outputs for bus oriented applications.
The 74ALVCH16827 consists of two 10-bit sections with separate
output enable signals. For either 10-bit buffer section, the two output
enable (1OE
active. If either output enable input is high, the outputs of that 10-bit
buffer section are in high impedance state.
The 74ALVCH16827 has active bus hold circuitry which is provided
to hold unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or pull-down
resistors.
= 3.3V, CL = 50pF
CC
=
I
1 and 1OE2 or 2OE1 and 2OE2) inputs must both be
2.0
2.0
CC
Output enabled 20
Output disabled 3
ns
p
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ALVCH16827 DGG ACH16827 DGG SOT364-1
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)
7, 22, 35, 50 V
1998 Jul 27 853-2096 19785
1, 56,
28, 29
1A0 - 1A9
2A0 - 2A9
1Y0 - 1Y9
2Y0 - 2Y9
1OE0, 1OE1
2OE0, 2OE1
CC
Data inputs
Data outputs
Output enable inputs (active-Low)
Positive supply voltage
2
Philips Semiconductors Product specification
20-bit buffer/line driver, non-inverting (3-State)
PIN CONFIGURATION
1
2
1Y0
3
1Y1
4
GND
5
1Y2
6
1Y3
7
V
CC
8
1Y4
9
1Y5
10
1Y6
GND
11
1Y7
12
1Y8
13
1Y9
14
2Y0
15
2Y1
16
2Y2
17
GND
18
2Y3
19
2Y4
20
2Y5
21
V
22
CC
23
2Y6
24
2Y7
25
GND
26
2Y8
27
2Y9
28 29
2OE
1
561OE1
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
SH00010
1OE
1A0
1A1
GND
1A2
1A3
V
CC
1A4
1A5
1A6
GND
1A7
1A8
1A9
2A0
2A1
2A2
GND
2A3
2A4
2A5
V
CC
2A6
2A7
GND
2A8
2A9
2OE
2
2
LOGIC SYMBOL (IEEE/IEC)
1OE1
1OE
2OE
2OE
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
74ALVCH16827
1
56
2
28
1
29
2
55
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
30
&
EN1
&
EN2
2
1 ∇
1
2 ∇
1
SH00012
1Y0
3
1Y1
5
1Y2
6
1Y3
8
1Y4
9
1Y5
10
1Y6
12
1Y7
13
1Y8
14
1Y9
15
2Y0
16
2Y1
17
2Y2
19
2Y3
20
2Y4
21
2Y5
23
2Y6
24
2Y7
26
2Y8
27
2Y9
LOGIC SYMBOL
55 54 52 51 49 48 47 45 44 43
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7
1
1OE1
56
28
29
1998 Jul 27
1OE2
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7
2 3 5 6 8 9 10 12 13 14
42 41 40 38 37 36 34 33 31 30
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7
2OE1
2OE2
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7
15 16 17 19 20 21 23 24 26 27
1A8 1A9
1Y8 1Y9
2A8 2A9
2Y8 2Y9
FUNCTION TABLE
INPUTS OUTPUTS
nOE1 nOE2 A Y
L L L L
L L H H
H H X Z
X H X Z
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
SH00011
3