Philips 74ALVCH16825DL, 74ALVCH16825DGG Datasheet

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74ALVCH16825

18-bit buffer/driver (3-State)

Product specification
IC24 Data Handbook

1998 Jul 27

INTEGRATED CIRCUITS

Philips Semiconductors Product specification

74AL VCH1682518-bit buffer/driver (3-State)

2

1998 Jul 27 853-2097 19785

FEA TURES

•Wide supply voltage range of 1.2V to 3.6V

•Complies with JEDEC standard no. 8-1A.

•CMOS low power consumption

•Direct interface with TTL levels

•Current drive ± 24 mA at 3.0 V

•MULTIBYTE

TM

flow-through standard pin-out architecture

•Low inductance multiple V

CC

and GND pins for minimum noise

and ground bounce

•All data inputs have bus hold

•Output drive capability 50Ω transmission lines @ 85°C

DESCRIPTION

The 74ALVCH16825 is an 18–bit non-inverting buf fer/driver with
3-State outputs for bus-oriented applications.

The 74ALVCH16825 consists of two 9-bit sections with separate
output enable signals. For either 9-bit buffer section, the two output
enable (1OE

1 and 1OE2 or 2OE1 and 2OE2) inputs must both be
LOW for corresponding D outputs to be active. If either output
enable input is HIGH, the outputs of that 9-buffer section are in the
high impedance state.

The 74ALVCH16825 has active bus hold circuitry which is provided
to hold unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or pull-down
resistors.

PIN CONFIGURATION

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28 29

30

31

32

33

34

35

36

37

38

39

40

41

42

43

44

45

46

47

48

49

50

51

52

53

54

55

561OE1

1Y

1

1Y

1

1Y

2

1Y

3

1Y

4

1Y

5

1Y

6

GND

V

CC

GND

1Y

7

1Y

8

GND
GND

2Y

0

2Y

1

GND

2Y

2

2Y

3

2Y

4

V

CC

2Y

5

2Y

6

GND

2Y

7

2OE1

1A

0

1A

1

GND
1A

2

1A

3

V

CC

1A

4

1A

5

1A

6

GND
1A

7

1A

8

GND
GND
2A

0

2A

1

GND
2A

2

2A

3

2A

4

V

CC

2A

5

2A

6

GND
2A

7

2A

8

2Y

8

2OE2

1OE

2

SH00139

QUICK REFERENCE DA TA

GND = 0V; T

amb

= 25°C; tr = tf ≤ 2.5ns

SYMBOL

PARAMETER CONDITIONS TYPICAL UNIT

t

PHL/tPLH

Propagation delay
CP to Qn

VCC = 2.5V , CL = 30pF
VCC = 3.3V , CL = 50pF

2.0

2.0

ns

C

I

Input capacitance 4.0 pF

p

p

p

1

Output enabled 19

p

CPDPower dissi ation ca acitance er latch

V

I

=

GND to V

CC

1

Output disabled 3

F

NOTES:

1. C

PD

is used to determine the dynamic power dissipation (PD in µW):

P

D

= CPD × V

CC

2

× fi +  (CL × V

CC

2

× fo) where: fi = input frequency in MHz; CL = output load capacitance in pF;

f

o

= output frequency in MHz; VCC = supply voltage in V;  (CL × V

CC

2

× fo) = sum of outputs.

ORDERING INFORMATION

PACKAGES

TEMPERATURE

RANGE

OUTSIDE NORTH

AMERICA

NORTH AMERICA

DRAWING

NUMBER

56-Pin Plastic Thin Shrink Small Outline (TSSOP) Type II –40°C to +85°C 74ALVCH16825 DGG ACH16825 DGG SOT364-1

Philips Semiconductors Product specification

74AL VCH16825

18-bit buffer/driver (3-State)

1998 Jul 27

3

PIN DESCRIPTION

PIN NUMBER SYMBOL NAME AND FUNCTION

1 1OE1

Output enable input

56 1OE2

(active LOW)

55, 54, 52, 51, 49,

48, 47, 45, 44

1A0 to 1A8 Data inputs

2, 3, 5, 6, 8,
9, 10, 12, 13

1Y0 to 1Y8 Data outputs

4, 11, 14, 15, 18, 25,
32, 39, 42, 43, 46, 53

GND Ground (0V)

7, 22, 35, 50 V

CC

Positive supply voltage

28 2OE1

Output enable input

29 2OE2

(active LOW)

43, 42, 41, 40, 38,

37, 36, 34, 33, 31

2A0 to 2A8 Data inputs

16, 17, 19, 20, 21,

23, 24, 26, 27

2Y0 to 2Y8 Data outputs

LOGIC SYMBOL

55
54
52
51
49
48
47
45
44
41

40
38
37
36
34
33
31
30

3
5
6
8

9
10
12
13
16
17
19
20
21
23
24
26

1A

0

1A

1

1A

2

1A

3

1A

4

1A

5

1A

6

1A

7

1A

8

2A

0

2A

1

2A

2

2A

3

2A

4

2A

5

2A

6

2A

7

1Y

0

1Y

1

1Y

2

1Y

3

1Y

4

1Y

5

1Y

6

1Y

7

1Y

8

2Y

0

2Y

1

2Y

2

2Y

3

2Y

4

2Y

5

2Y

6

2Y

7

2

2A

8

2Y

8

27

SH00142

1OE1

1OE2

2OE1

2OE2

156

28 29

FUNCTION T ABLE

INPUTS

OUTPUT

nOE1 nOE2 A

Y

L L L L

L L H H
H X X Z
X H X Z

H = HIGH voltage level
L = LOW voltage level
X = Don’t care
Z = High impedance “of f” state

LOGIC SYMBOL (IEEE/IEC)

1, 1 ∇

1, 2 ∇

56
28

55
54
52
51
49
48
47
45
44
41

40
38
37
36
34
33
31
30

3
5
6
8
9
10
12
13
16
17
19
20
21
23
24
26

1

EN1

1A

0

1A

1

1A

2

1A

3

1A

4

1A

5

1A

6

1A

7

1A

8

2A

0

2A

1

2A

2

2A

3

2A

4

2A

5

2A

6

2A

7

1Y

0

1Y

1

1Y

2

1Y

3

1Y

4

1Y

5

1Y

6

1Y

7

1Y

8

2Y

0

2Y

1

2Y

2

2Y

3

2Y

4

2Y

5

2Y

6

2Y

7

SH00141

29

2OE

2

2OE1

1OE

2

1OE

1

2

2A

8

2Y

8

27

EN2

&

&