INTEGRATED CIRCUITS
74ALVC16245/74ALVCH16245
2.5V/3.3V 16-bit bus transceiver with direction pin (3-State)
Product specification |
1998 Jun 29 |
Supersedes data of 1998 Jun 16
IC24 Data Handbook
m n r
Philips Semiconductors |
Product specification |
||
|
|
||
|
|
|
|
16-bit bus transceiver with direction pin (3-State) |
74ALVC16245/ |
||
74ALVCH16245 |
|||
|
|||
|
|
|
|
|
|
|
FEATURES
•Wide supply voltage range of 1.2V to 3.6V
•Complies with JEDEC standard no. 8-1A
•CMOS low power consumption
•MULTIBYTETM flow-through standard pin-out architecture
•Low inductance multiple VCC and ground pins for minimum noise and ground bounce
•Direct interface with TTL levels
•All data inputs have bus hold (74ALVCH16245 only)
•Output drive capability 50W transmission lines @ 85°C
•Current drive ±24 mA at 3.0 V
DESCRIPTION
The 74ALVC16245(74ALVCH16245) is a 16-bit transceiver featuring non-inverting 3-State bus compatible outputs in both send and receive directions.
The 74ALVC16245(74ALVCH16245) features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs
for direction control. nOE controls the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The 74ALVCH16245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.
The 74ALVC16245 has 5V tolerant inputs.
PIN CONFIGURATION
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1DIR |
1 |
|
|
|
48 |
1OE |
||
|
|
|
|
|
|
|
|
|
1B0 |
2 |
|
|
|
47 |
1A0 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1B1 |
3 |
|
|
|
46 |
1A1 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
GND |
4 |
|
|
|
45 |
GND |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1B2 |
5 |
|
|
|
44 |
1A2 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1B3 |
6 |
|
|
|
43 |
1A3 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VCC1 |
7 |
|
|
|
42 |
VCC2 |
||
|
|
|
|
|
|
|
|
|
1B4 |
8 |
|
|
|
41 |
1A4 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1B5 |
9 |
|
|
|
40 |
1A5 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
GND |
10 |
|
|
|
39 |
GND |
||
|
|
|
|
|
|
|
|
|
1B6 |
11 |
|
|
|
38 |
1A6 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1B7 |
12 |
|
|
|
37 |
1A7 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2B0 |
13 |
|
|
|
36 |
2A0 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2B1 |
14 |
|
|
|
35 |
2A1 |
||
|
|
|
|
|
|
|
|
|
GND |
15 |
|
|
|
34 |
GND |
||
|
|
|
|
|
|
|
|
|
2B2 |
16 |
|
|
|
33 |
2A2 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2B3 |
17 |
|
|
|
32 |
2A3 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
VCC1 |
18 |
|
|
|
31 |
VCC2 |
||
|
|
|
|
|
|
|
|
|
2B4 |
19 |
|
|
|
30 |
2A4 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
2B5 |
20 |
|
|
|
29 |
2A5 |
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
||
GND |
21 |
|
|
|
28 |
GND |
||
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
||
2B6 |
22 |
|
|
|
27 |
2A6 |
||
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
||
2B7 |
23 |
|
|
|
26 |
2A7 |
||
|
|
|
|
|
|
|
|
|
2DIR |
24 |
|
|
|
25 |
2OE |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
SW00198 |
|
|
|
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf ≤ 2.5ns
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
|
|
|
|
|
|
|
|
Propagation delay |
VCC = 2.5V, CL = 30pF |
|
|
|
tPHL/tPLH |
An to Bn; |
|
1.9 |
ns |
|
VCC = 3.3V, CL = 50pF |
|
||||
|
Bn to An |
|
|
|
|
CI |
Input capacitance |
|
|
4.0 |
pF |
CI/O |
Input/output capacitance |
|
|
8.0 |
pF |
|
|
1 |
Outputs enabled |
29 |
|
|
|
|
|
|
|
CPD |
Power dissipation capacitance per buffer |
VI = GND to VCC |
Outputs disabled |
5 |
pF |
|
|
|
|
||
NOTE: |
|
|
|
|
|
1. CPD is used to determine the dynamic power dissipation (PD in mW): |
|
|
|
||
PD = CPD × VCC2 × fi + (CL × VCC2 × fo) where: fi = input frequency in MHz; CL = output load capacitance in pF; |
|
|
|||
fo = output frequency in MHz; VCC = supply voltage in V; (CL × VCC2 × fo) = sum of the outputs. |
|
|
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
DWG NUMBER |
|
|
|
|
|
48-Pin Plastic SSOP Type III |
±40°C to +85°C |
74ALVC16245 DL |
AC16245 DL |
SOT370-1 |
|
|
|
|
|
48-Pin Plastic TSSOP Type II |
±40°C to +85°C |
74ALVC16245 DGG |
AC16245 DGG |
SOT362-1 |
|
|
|
|
|
48-Pin Plastic SSOP Type III |
±40°C to +85°C |
74ALVCH16245 DL |
ACH16245 DL |
SOT370-1 |
|
|
|
|
|
48-Pin Plastic TSSOP Type II |
±40°C to +85°C |
74ALVCH16245 DGG |
ACH16245 DGG |
SOT362-1 |
|
|
|
|
|
1998 Jun 29 |
2 |
853-2083 19638 |
Philips Semiconductors |
Product specification |
|
|
|
|
16-bit bus transceiver with direction pin (3-State)
74ALVC16245/
74ALVCH16245
PIN DESCRIPTION
PIN NUMBER |
SYMBOL |
NAME AND FUNCTION |
|||
|
|
|
|
|
|
1 |
1DIR |
Direction control |
|||
|
|
|
|
|
|
2, 3, 5, 6, 8, 9, |
1B0 to 1B7 |
Data inputs/outputs |
|||
11, 12 |
|||||
|
|
|
|
||
|
|
|
|
|
|
4, 10, 15, 21, |
GND |
Ground (0V) |
|||
28, 34, 39, 45 |
|||||
|
|
|
|
||
|
|
|
|
|
|
7, 18, 31, 42 |
VCC |
Positive supply voltage |
|||
13, 14, 16, 17, |
2B0 to 2B7 |
Data inputs/outputs |
|||
19, 20, 22, 23 |
|||||
|
|
|
|
||
|
|
|
|
|
|
24 |
2DIR |
Direction control |
|||
|
|
|
|
|
|
|
|
|
|
Output enable input |
|
25 |
2OE |
||||
(active LOW) |
|||||
|
|
|
|
||
|
|
|
|
|
|
36, 35, 33, 32, |
2A0 to 2A7 |
Data inputs/outputs |
|||
30, 29, 27, 26 |
|||||
|
|
|
|
||
|
|
|
|
|
|
47, 46, 44, 43, |
1A0 to 1A7 |
Data inputs/outputs |
|||
41, 40, 38, 37 |
|||||
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
Output enable input |
|
48 |
1OE |
||||
(active LOW) |
|||||
|
|
|
|
||
|
|
|
|
|
LOGIC SYMBOL
1DIR 1 |
|
|
2DIR 24 |
|
|
|
48 |
1OE |
|
25 |
2OE |
1A0 47 |
2 |
1B0 |
2A0 36 |
13 |
2B0 |
1A1 46 |
3 |
1B1 |
2A1 35 |
14 |
2B1 |
1A2 44 |
5 |
1B2 |
2A2 33 |
16 |
2B2 |
1A3 43 |
6 |
1B3 |
2A3 32 |
17 |
2B3 |
1A4 41 |
8 |
1B4 |
2A4 30 |
19 |
2B4 |
1A5 40 |
9 |
1B5 |
2A5 29 |
20 |
2B5 |
1A6 38 |
11 |
1B6 |
2A6 27 |
22 |
2B6 |
1A7 37 |
12 |
1B7 |
2A7 26 |
23 |
2B7 |
|
|
|
|
|
|
SW00197 |
FUNCTION TABLE |
|
|
||||
|
|
|
|
|
|
|
|
|
|
INPUTS |
INPUTS/OUTPUT |
||
|
|
|
|
|
|
|
nOE |
|
|
nDIR |
nAn |
nBn |
|
|
|
|
|
|
|
|
|
L |
|
L |
A = B |
inputs |
|
|
|
|
|
|
|
|
|
L |
|
H |
inputs |
B = A |
|
|
|
|
|
|
|
|
|
H |
|
X |
Z |
Z |
|
|
|
|
|
|
|
|
H = HIGH voltage level
L = LOW voltage level
X = don't care
Z = high impedance OFF-state
LOGIC SYMBOL (IEEE/IEC)
1OE |
48 |
G3 |
|
|
1DIR |
1 |
3 EN1 [BA] |
|
|
|
|
3 EN2 [AB] |
|
|
2OE |
25 |
G6 |
|
|
2DIR |
24 |
6 EN4 [BA] |
|
|
|
|
|
||
|
|
6 EN5 [AB] |
|
|
1A0 |
47 |
1 |
2 |
1B0 |
|
|
|||
|
|
|
2 |
|
1A1 |
46 |
|
3 |
1B1 |
|
|
|
||
1A2 |
44 |
|
5 |
1B2 |
|
|
|
||
1A3 |
43 |
|
6 |
1B3 |
|
|
|
||
1A4 |
41 |
|
8 |
1B4 |
|
|
|
||
1A5 |
40 |
|
9 |
1B5 |
|
|
|
||
1A6 |
38 |
|
11 |
1B6 |
|
|
|
||
1A7 |
37 |
|
12 |
1B7 |
|
|
|
||
2A0 |
36 |
4 |
13 |
2B0 |
|
|
|||
|
|
|
5 |
|
2A1 |
35 |
|
14 |
2B1 |
|
|
|
||
2A2 |
33 |
|
16 |
2B2 |
|
|
|
||
2A3 |
32 |
|
17 |
2B3 |
|
|
|
||
2A4 |
30 |
|
19 |
2B4 |
|
|
|
||
2A5 |
29 |
|
20 |
2B5 |
|
|
|
||
2A6 |
27 |
|
22 |
2B6 |
|
|
|
||
2A7 |
26 |
|
23 |
2B7 |
|
|
|
||
|
|
|
SW00196 |
BUS HOLD CIRCUIT
VCC
Data Input |
To internal circuit |
SW00044
1998 Jun 29 |
3 |