Philips 74ALVC14 Technical data

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74ALVC14
Hex inverting Schmitt trigger
Rev. 03 — 15 February 2005 Product data sheet
1. General description
The 74ALVC14 is a high-performance, low-power, low-voltage, Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.
The 74ALVC14 provides six inverting buffers with Schmitt-trigger action. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals.
2. Features
Wide supply voltage range from 1.65 V to 3.6 V
3.6 V tolerant inputs/outputs
Direct interface with TTL levels (2.7 V to 3.6 V)
Power-down mode
Unlimited input rise and fall times
Latch-up performance exceeds 250 mA
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
Multiple package options
3. Quick reference data
Table 1: Quick reference data
Symbol Parameter Conditions Min Typ Max Unit
, t
t
PHL
propagation delay nA
PLH
to nY
VCC= 1.8 V; CL= 30 pF; R
= 1 k
L
= 2.5 V; CL= 30 pF;
V
CC
R
= 500
L
= 2.7 V; CL= 50 pF;
V
CC
R
= 500
L
= 3.3 V; CL= 50 pF;
V
CC
R
= 500
L
- 2.9 - ns
- 2.2 - ns
- 2.8 - ns
- 2.4 - ns
Philips Semiconductors
74ALVC14
Hex inverting Schmitt trigger
Table 1: Quick reference data
…continued
Symbol Parameter Conditions Min Typ Max Unit
C
I
C
PD
input capacitance - 3.5 - pF power dissipation
VCC = 3.3 V
[1] [2]
-25-pF
capacitance per buffer
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD× V fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C V
[2] The condition is VI = GND to VCC.
2
× f N + Σ(C V
CC
2
× fo) = sum of the outputs.
CC
2
× fo) where:
CC
4. Ordering information
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74ALVC14D 40 °C to +85 °C SO14 plastic small outline package; 14 leads;
body width 3.9 mm
74ALVC14PW 40 °C to +85 °C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm
74ALVC14BQ 40 °C to +85 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals; body 2.5 × 3 × 0.85 mm
SOT108-1
SOT402-1
SOT762-1
9397 750 14592 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 15 February 2005 2 of 16
Philips Semiconductors
5. Functional diagram
74ALVC14
Hex inverting Schmitt trigger
1
1
3
5
9
11
13
1A 1Y
2A 2Y
3A 3Y
4A 4Y
5A 5Y
6A 6Y
mna204
2
4
6
8
10
12
3
5
9
11
13
001aac497
Fig 1. Logic symbol Fig 2. IEC logic symbol
A
Y
mna025
2
4
6
8
10
12
Fig 3. Logic diagram (one Schmitt trigger)
9397 750 14592 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 15 February 2005 3 of 16
Philips Semiconductors
6. Pinning information
6.1 Pinning
74ALVC14
Hex inverting Schmitt trigger
1
1A V
2
1Y 6A
3
2A 6Y
4
2Y 5A
5
3A 5Y
6
3Y 4A
7
GND 4Y
14
Fig 4. Pin configuration SO14 and
TSSOP14
6.2 Pin description
Table 3: Pin description
Symbol Pin Description
1A 1 1 data input A 1Y 2 1 data output Y 2A 3 2 data input A 2Y 4 2 data output Y 3A 5 3 data input A 3Y 6 3 data output Y GND 7 ground (0 V) 4Y 8 4 data output Y 4A 9 4 data input A 5Y 10 5 data output Y 5A 11 5 data input A 6Y 12 6 data output Y 6A 13 6 data input A V
CC
14 supply voltage
001aac498
GND
1A 1
14
(1)
7
GND
V 14
8 4Y
CC
001aac499
terminal 1
index area
2 13
1Y 6A
3 12
14
CC
13 12 11 10
9 8
2A 6Y
4 11
2Y 5A
5 10
3A 5Y
6 9
3Y 4A
Transparent top view
The die substrate is attached to the exposed die pad using conductive die attach material. It can not be used as a supply pin or input.
Fig 5. Pin configuration DHVQFN14
9397 750 14592 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 15 February 2005 4 of 16
Philips Semiconductors
7. Functional description
7.1 Function table
74ALVC14
Hex inverting Schmitt trigger
Table 4: Function table
Input Output nA nY
LH HL
[1] H = HIGH voltage level;
L = LOW voltage level.
8. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
V
I
V
O
I
IK
I
OK
I
O
,
I
CC
I
GND
T
stg
P
tot
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. [3] For SO14 packages: P
For TSSOP14 packages: P For DHVQFN14 packages: P
[1]
supply voltage 0.5 +4.6 V input voltage output voltage Active mode
Power-down mode
[1]
0.5 +4.6 V
[1]
0.5 VCC + 0.5 V
[2]
0.5 +4.6 V input diode current VI < 0 V - 50 mA output diode current VO > VCC or VO < 0 V - ±50 mA output source or sink
VO = 0 V to V
CC
- ±50 mA current
VCC or GND current - ±100 mA
storage temperature 65 +150 °C total power dissipation T
derates linearly with 8 mW/K above 70 °C.
tot
derates linearly with 5.5 mW/K above 60 °C.
tot
derates linearly with 4.5 mW/K above 60 °C.
tot
= 40 °C to +85 °C
amb
[3]
- 500 mW
9397 750 14592 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 03 — 15 February 2005 5 of 16
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