INTEGRATED CIRCUITS
74ALS74A
Dual D-type flip-flop with set and reset
Product specification 1996 Jul 01
IC05 Data Handbook
Philips Semiconductors Product specification
74ALS74ADual D-type flip-flop with set and reset
DESCRIPTION
The 74ALS74 is a dual positive edge-triggered D-type flip-flop
featuring individual data, clock, set, and reset inputs; also true and
complementary outputs. Set (S
active-Low inputs and operate independently of the clock input.
When set and reset are inactive (High), data at the D input is
transferred to the Q and Q
the clock. Data must be stable just one setup time prior to the
Low-to-High transition of the clock for predictable operation. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. Following the hold time
D) and reset (RD) are asynchronous
outputs on the Low-to-High transition of
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
14-pin plastic DIP 74ALS74AN SOT27-1
14-pin plastic SO 74ALS74AD SOT108-1
14-pin plastic SSOP
Type II
= 5V ±10%,
V
CC
T
= 0°C to +70°C
amb
74ALS74ADB SOT337-1
interval, data at the D input may be changed without affecting the
levels of the output.
TYPE
TYPICAL f
MAX
SUPPLY CURRENT
74ALS74A 150MHz 3.0mA
TYPICAL
(TOTAL)
PIN CONFIGURATION
1
D0
R
2
D0
CP0
3
D0
S
4
Q0
5
Q
0
6
GND
14
13
12
11
10
9
87
SF00045
V
R
D1
CP1
SD1
Q1
Q1
CC
D1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74ALS (U.L.)
HIGH/LOW
D0, D1 Data inputs 1.0/2.0 20µA/0.2mA
CP0, CP1 Clock inputs (active rising edge) 1.0/2.0 20µA/0.2mA
SD0, SD1 Set inputs (active-Low) 2.0/4.0 40µA/0.4mA
RD0, RD1 Reset inputs (active-Low) 2.0/4.0 40µA/0.4mA
Q0, Q1, Q0, Q1 Data outputs 20/80 0.4mA/8mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOAD VALUE
HIGH/LOW
DRAWING
NUMBER
LOGIC SYMBOL
212
3
4
1
11
10
13
VCC = Pin 14
GND = Pin 7
1996 Jul 01 853–1278 01670
D0 D1
CP0
SD0
RD0
CP1
SD1
RD1
Q0 Q0 Q1 Q1
56 98
SF00046
IEC/IEEE SYMBOL
2
4
3
2
1
10
11
12
13
&
S
C1
1D
R
S
C2
2D
R
5
6
9
8
SF00047
Philips Semiconductors Product specification
74ALS74ADual D-type flip-flop with set and reset
LOGIC DIAGRAM
FUNCTION TABLE
INPUTS OUTPUTS OPERATING
4, 10
S
D
1, 13
D
R
5, 9
Q
SD RD CP D Q Q MODE
L H X X H L Asynchronous set
H L X X L H Asynchronous reset
L L X X H H Undetermined*
H H ↑ h H L Load “1”
6, 8
CP
3, 11
Q
H H ↑ l L H Load “0”
H H ↑ X NC NC Hold
D
VCC = Pin 14
GND = Pin 7
2, 12
SF00048
H = High voltage level
h = High state must be present one setup time prior to
Low-to-High clock transition
L = Low voltage level
l = Low state must be present one setup time prior to
Low-to-High clock transition
NC= No change from the previous setup
X = Don’t care
↑ = Low-to-High clock transition
= Not Low-to-High clock transition
↑
* = Both outputs will be High while both S
but the output states are unpredictable if S
High simultaneously
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to V
Current applied to output in Low output state 16 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
D and RD are Low,
D and RD go
CC
V
RECOMMENDED OPERATING CONDITIONS
V
V
V
I
OH
I
OL
T
amb
1996 Jul 01
Supply voltage 4.5 5.0 5.5 V
CC
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
I
Input clamp current –18 mA
Ik
High-level output current –0.4 mA
Low-level output current
Operating free-air temperature range 0 +70 °C
LIMITS
MIN NOM MAX
8 mA
3