INTEGRATED CIRCUITS
74ALS651/74ALS651–1
74ALS652/74ALS652–1
Transceiver/register
Product specification
IC05 Data Handbook
1991 Feb 08
Philips Semiconductors Product specification
T ransceiver/register
74ALS651/74ALS651-1
74ALS652/74ALS652-1
74ALS651/651-1 Octal transceiver/register, inverting (3-State)
74ALS652/652-1 Octal transceiver/register, non-inverting (3-State)
FEA TURES
•Independent registers for A and B buses
•Multiplexed real-time and stored data
•Choice of non-inverting and inverting data paths
TYPE
74ALS651/74ALS651-1 140MHz 40mA
74ALS652/74ALS652-1 140MHz 46mA
•3-State outputs
•The -1 versions sinks 48mA I
within the ±5% VCC range
OL
DESCRIPTION
The 74LAS651 and 74ALS652 transceivers/registers consist of bus
transceiver circuits with 3-State outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or the internal registers. Data on the A or
B bus will be clocked into the registers as the appropriate clock pin
goes High. Output enable (OEAB, OEBA
pins are provided for bus management. The 74LAS651-1 and
74ALS652-1 will sink 48mA if the V
) and select (SAB, SBA)
is limited to 5.0V ± 0.25V .
CC
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
A0 – A7 A inputs 1.0/1.0 70µA/0.1mA
B0 – B7 B inputs 1.0/1.0 70µA/0.1mA
CPAB A-to-B clock input 1.0/1.0 20µA/0.1mA
CPBA B-to-A clock input 1.0/1.0 20µA/0.1mA
SAB A-to-B select input 1.0/1.0 20µA/0.1mA
SBA B-to-A select input 1.0/1.0 20µA/0.1mA
OEAB A-to-B output enable input 1.0/1.0 20µA/0.1mA
OEBA B-to-A output enable input 1.0/1.0 20µA/0.1mA
A0 – A7, B0 – B7 A, B outputs 750/240 15mA/24mA
A0 – A7, B0 – B7 A, B outputs (-1 version) 750/480 15mA/48mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
ORDERING INFORMATION
DESCRIPTION
24-pin plastic DIP
24-pin plastic SOL
74ALS651N, 74ALS651-1N,
74ALS652N, 74ALS652-1N
74ALS651D, 74ALS651-1D,
74ALS652D, 74ALS652-1D
74ALS (U.L.)
HIGH/LOW
TYPICAL
f
MAX
ORDER CODE
COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
SUPPLY CURRENT
LOAD VALUE
HIGH/LOW
TYPICAL
(TOTAL)
DRAWING
NUMBER
SOT222-1
SOT137-1
1991 Feb 08 853–1407 01670
2
Philips Semiconductors Product specification
Transceiver/register
PIN CONFIGURATION – 74ALS651/651-1
1
CPAB
2
SAB
3
OEAB
4
A0
5
A1
6
A2
7
A3
8
A4
9
A5
10
A6
11
A7
12 13
GND
LOGIC SYMBOL – 74ALS651/651-1
V
24
CC
23
CPBA
22
SBA
21
OEBA
20
B0
19
B
1
18
B
2
17
B3
16
B
4
15
B
5
14
6
B
B
7
SC00127
74ALS651/74ALS651-1
74ALS652/74ALS652-1
PIN CONFIGURATION – 74ALS652/652-1
1
CPAB
2
SAB
3
OEAB
4
A0
5
A1
6
A2
7
A3
8
A4
9
A5
10
A6
11
A7
12 13
GND
LOGIC SYMBOL – 74ALS652/652-1
V
24
CC
23
CPBA
22
SBA
21
OEBA
20
B0
19
B1
18
B2
17
B3
16
B4
15
B5
14
B6
B7
SC00128
4567891011
A0 A1 A2 A3 A4 A5 A6 A7
CPAB
1
SAB
2
OEAB
3
CPBA
23
SBA
22
OEBA
21
B0 B1 B2 B3 B4 B5 B6 B7
V
= Pin 24
CC
GND = Pin 12
20 19 18 17 16 15 14 13
IEC/IEEE SYMBOL – 74ALS651/651-1
21
3
23
22
1
2
4
5
6
7
8
9
10
11
EN1 [BA]
EN1 [AB]
G3
G5
C6
G7
1
1
6D
1
5
4D
1
5
7
1
2
7
SC00129
20
19
18
17
16
15
14
13
4567891011
A0 A1 A2 A3 A4 A5 A6 A7
CPAB
1
SAB
2
OEAB
3
CPBA
23
SBA
22
OEBA
21
B0 B1 B2 B3 B4 B5 B6 B7
V
= Pin 24
CC
GND = Pin 12
20 19 18 17 16 15 14 13
IEC/IEEE SYMBOL – 74ALS652/652-1
21
3
23
22
1
2
4
5
6
7
8
9
10
11
EN1 [BA]
EN1 [AB]
G3
G5
C6
G7
1
1
6D
1
5
4D
1
5
7
1
2
7
SC00130
20
19
18
17
16
15
14
13
1991 Feb 08
SC00131
SC00132
3
Philips Semiconductors Product specification
Transceiver/register
BUS MANAGEMENT FUNCTIONS
The following examples demonstrate the four fundamental
bus-management functions that can be performed with the
74ALS651/74ALS651-1 and 74ALS652/74ALS652-1. The select
pins determine whether data is stored or transferred through the
device in real time. The output enable pins determine the direction of
the data flow.
REAL TIME BUS TRANSFER
BUS B TO BUS A
BUS A
OEABOEBA
CPABCPBA SAB SBA
LLXXXL
BUS B
REAL TIME BUS TRANSFER
BUS A TO BUS B
BUS A BUS A
OEABOEBA CPABCPBA SAB SBA
HHXX LX
74ALS651/74ALS651-1
74ALS652/74ALS652-1
STORAGE FROM
A, B, OR A AND B
OEABOEBA
CPABCPBA SAB SBA
XX↑XXX
LXX↑XX
LX↑↑XX
TRANSFER STORED DATA
TO A AND/OR B
BUS A BUS BBUS BBUS B
OEABOEBA
CPABCPBA SAB SBA
H L H or L H or L H H
SC00133
1991 Feb 08
4