Philips 74ALS623AN, 74ALS623A-1N, 74ALS623A-1D, 74ALS620AN, 74ALS620A-1N Datasheet

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INTEGRATED CIRCUITS

74ALS620A/74ALS620A±1

74ALS623A/74ALS623A±1

Transceivers

Product specification

1991 Feb 08

IC05 Data Handbook

 

m n r

Philips Semiconductors

Product specification

 

 

 

 

 

Transceivers

74ALS620A/74ALS620A-1

74ALS623A/74ALS623A-1

 

 

 

 

 

 

 

74ALS620A/74ALS620A-1 Octal bus transceiver, inverting (3-State) 74ALS623A/74ALS623A-1 Octal bus transceiver, non-inverting (3-State)

FEATURES

Octal bidirectional bus interface

3-State buffer outputs sink 24mA and source 15mA

The -1 version sinks 48mA IOL within the +5% VCC range

 

TYPICAL

TYPICAL

TYPE

PROPAGATION

SUPPLY CURRENT

 

DELAY

(TOTAL)

 

 

 

74ALS620A/620A-1

4.0ns

33mA

 

 

 

74ALS623A/623A-1

4.0ns

38mA

ORDERING INFORMATION

 

ORDER CODE

 

 

 

DRAWING

 

COMMERCIAL RANGE

DESCRIPTION

VCC = 5V ±10%,

NUMBER

 

Tamb = 0°C to +70°C

 

20-pin plastic DIP

74ALS620AN, 74ALS620A-1N

SOT146-1

74ALS623AN, 74ALS623A-1N

 

 

 

 

 

20-pin plastic SOL

74ALS620AD, 74ALS620A-1D

SOT163-1

74ALS623AD, 74ALS623A-1D

 

 

DESCRIPTION

The 74ALS620A and 74ALS623A are octal transceiver featuring 3-State bus compatible outputs in both transmit and receive directions. The 74ALS620A is an inverting version of the 74ALS623A. The outputs are capable of sinking 24mA and sourcing up to 15mA, providing very good capacitive drive characteristics.

The outputs for the 74ALS620A-1 and 74ALS623A are capable of sinking up to 48mA when within the ±5% VCC range.

These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation allows for maximum flexibility in timing.

These devices allow data transmission from the A bus to the B bus or from B bus to A bus, depending on the logic levels at the enable inputs (OEBA and OEAB). The enable inputs can be used to disable the device so that the buses are effectively isolated. The dual-enable configuration gives the 74ALS620A and 74ALS623A the capability to store data by the simultaneous enabling of OEBA and OEAB. Each output reinforces its input in this transceiver configuration. Thus when both control inputs are enabled and all other data sources to the two sets of the bus lines are at high impedance, both sets of the bus lines (16 in all) will remain at their last states.

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

 

PINS

 

 

DESCRIPTION

 

 

74ALS (U.L.)

 

LOAD VALUE

 

 

 

 

 

HIGH/LOW

 

HIGH/LOW

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0 ± A7, B0 ± B7

 

Data inputs

 

 

 

 

1.0/1.0

 

20μA/0.1mA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OEAB

 

Output Enable inputs

 

 

1.0/1.0

 

20μA/0.1mA

 

OEBA,

 

 

 

 

A0 ± A7, B0 ± B7

 

Data outputs

 

 

 

 

750/240

 

15mA/24mA

 

 

 

 

 

 

 

 

 

 

A0 ± A7, B0 ± B7

 

Data outputs (-1 version)

 

 

750/480

 

15mA/48mA

 

 

 

 

 

 

 

 

 

 

 

 

NOTE: One (1.0) ALS unit load is defined as: 20μA in the High state and 0.1mA in the Low state.

 

 

 

 

PIN CONFIGURATION ± 74ALS620A/74ALS620A-1

 

PIN CONFIGURATION ± 74ALS623A/74ALS623A-1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OEAB

1

20

VCC

 

 

OEAB

1

20

VCC

 

 

A0

2

19

 

 

 

 

A0

2

19

 

 

 

 

OEBA

 

 

OEBA

 

 

A1

3

18

B0

 

 

A1

3

18

B0

 

 

A2

4

17

B1

 

 

A2

4

17

B1

 

 

A3

5

16

B2

 

 

A3

5

16

B2

 

 

A4

6

15

B3

 

 

A4

6

15

B3

 

 

A5

7

14

B4

 

 

A5

7

14

B4

 

 

A6

8

13

B5

 

 

A6

8

13

B5

 

 

A7

9

12

B6

 

 

A7

9

12

B6

 

 

GND

10

11

B7

 

 

GND

10

11

B7

 

 

 

 

 

 

SC00101

 

 

 

 

 

 

SC00102

1991 Feb 08

2

853±0020 01670

Philips Semiconductors

Product specification

 

 

 

Transceivers

74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1

LOGIC SYMBOL ± 74ALS620A/74ALS620A-1

 

LOGIC SYMBOL ± 74ALS623A/74ALS623A-1

 

 

2

3

4

5

6

7

8

9

 

 

 

 

2

3

4

5

6

7

8

9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A0

A1

A2

A3

A4

A5

A6

A7

 

 

 

 

A0

A1

A2

A3

A4

A5

A6

A7

 

1

 

OEAB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

OEAB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

 

OEBA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

19

 

OEBA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B0

B1

B2

B3

B4

B5

B6

B7

 

 

 

 

B0

B1

B2

B3

B4

B5

B6

B7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

18

17

16

15

14

13

12

11

 

 

 

 

18

17

16

15

14

13

12

11

 

VCC = Pin 20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC = Pin 20

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND = Pin 10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SC00103

 

GND = Pin 10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SC00104

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IEC/IEEE SYMBOL ± 74ALS620A/74ALS620A-1

 

IEC/IEEE SYMBOL ± 74ALS623A/74ALS623A-1

1

EN1

 

 

 

19

EN2

 

 

 

2

1

18

 

 

 

 

2

3

 

17

4

 

16

5

 

15

6

 

14

7

 

13

8

 

12

9

 

11

1

EN1

 

 

 

19

EN2

 

 

 

2

1

18

 

 

 

2

3

17

4

16

5

15

6

14

7

13

8

12

9

11

SC00105

SC00106

1991 Feb 08

3

Philips 74ALS623AN, 74ALS623A-1N, 74ALS623A-1D, 74ALS620AN, 74ALS620A-1N Datasheet

Philips Semiconductors

Product specification

 

 

 

Transceivers

74ALS620A/74ALS620A-1 74ALS623A/74ALS623A-1

LOGIC DIAGRAM ± 74ALS620A/74ALS620A-1

19

 

OEBA

 

1

 

OEAB

 

2

18

A0

B0

3

17

A1

B1

4

16

A2

B2

5

15

A3

B3

6

14

A4

B4

7

13

A5

B5

8

12

A6

B6

9

11

A7

B7

VCC = Pin 20

GND = Pin 10

SC00107

LOGIC DIAGRAM ± 74ALS623A/74ALS623A-1

19

 

OEBA

 

1

 

OEAB

 

2

18

A0

B0

3

17

A1

B1

4

16

A2

B2

5

15

A3

B3

6

14

A4

B4

7

13

A5

B5

8

12

A6

B6

9

11

A7

B7

VCC = Pin 20

GND = Pin 10

SC00108

FUNCTION TABLE

 

 

 

 

INPUTS

 

 

 

 

 

OPERATING MODES

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OEAB

 

 

 

74ALS620A

 

74ALS623A

 

 

 

OEBA

 

 

 

L

 

L

 

 

 

data to A Bus

 

B data to A Bus

 

 

 

 

 

B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

H

 

 

 

data to B Bus

 

A data to B Bus

 

 

 

 

 

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

L

 

 

 

Z

 

Z

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

H

 

 

 

data to A Bus

 

B data to A Bus

 

 

 

 

 

B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

H

 

 

 

data to B Bus

 

A data to B Bus

 

 

 

 

 

A

 

H

=

High voltage level

 

 

 

 

 

 

 

L

=

Low voltage level

 

 

 

 

 

 

 

X

=

Don't care

 

 

 

 

 

 

 

Z

=

High impedance ªoffº state

 

 

 

 

 

 

 

1991 Feb 08

4

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