Philips 74als273 DATASHEETS
INTEGRATED CIRCUITS
74ALS273
Octal D–type flip–flop
Product specification
IC05 Data Handbook
1991 Feb 08
Philips Semiconductors Product specification
74ALS273Octal D-type flip-flop
FEA TURES
•Eight edge-triggered D-type flip-flops
•Buffered common clock
•Buffered asynchronous master reset
•See 74ALS377 for clock enable version
•See 74ALS373 for transparent latch version
•See 74ALS374 for 3-State version
DESCRIPTION
The 74ALS273 has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered clock (CP)
and master reset (MR
simultaneously .
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independently of clock or data inputs
by a Low voltage level on the MR
The device is useful for applications where the true output only is
required and the CP and MR
TYPE
74ALS273 95MHz 16mA
) inputs load and reset all flip-flops
input.
are common to all flip-flops.
TYPICAL
TYPICAL f
MAX
SUPPLY CURRENT
(TOTAL)
PIN CONFIGURATION
20
1
MR
2
Q0
3
D0
4
D1
5
Q1
6
Q2
7
D2
8
D3
9
Q3 Q4
10 11
GND
V
CC
Q7
19
D7
18
D6
17
Q6
16
Q5
15
D5
14
D4
13
12
CP
ORDERING INFORMA TION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
20-pin plastic DIP 74ALS273N SOT146-1
20-pin plastic SO 74ALS273D SOT163-1
20-pin plastic SSOP
Type II
74ALS273DB SOT339-1
DRAWING
NUMBER
SF00346
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
D0 – D7 Data inputs 1.0/2.0 20µA/0.2mA
CP Clock pulse input (active rising edge) 1.0/1.0 20µA/0.1mA
MR Master Reset input (active-Low) 1.0/1.0 20µA/0.1mA
Q0 – Q7 3-State outputs 130/240 2.6mA/24mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
11
1
V
= Pin 20
CC
GND = Pin 10
CP
MR
3 4 7 8 13 14 1817
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2 5 6 9 12 15 16 19
SF00347
IEC/IEEE SYMBOL
74ALS (U.L.)
HIGH/LOW
1
11
32
4
7
8
13
14
17
18
R
C1
1D
LOAD VALUE
HIGH/LOW
5
6
9
12
15
16
19
SF00348
1991 Feb 08 853–1398 01670
2
Philips Semiconductors Product specification
OPERATING MODE
SYMBOL
PARAMETER
UNIT
74ALS273Octal D-type flip-flop
LOGIC DIAGRAM
V
= Pin 20
CC
GND = Pin 10
CP
MR
D0
3
11
DQ
1
CP
RD
Q0
D1
2
4
DQ
CP
RD
Q1
D2
5
7
DQ
CP
RD
Q2
D3
8
6
DQ
CP
RD
D4
13
DQ
CP
RD
9
Q3
FUNCTION TABLE
INPUTS OUTPUTS
MR CP Dn Qn
L X X L Reset (clear)
H ↑ h H Load “1”
H ↑ l L Load “0”
H = High-voltage level
h = High state must be present one setup time before the Low-to-High clock transition
L = Low-voltage level
l = Low state must be present one setup time before the Low-to-High clock transition
X = Don’t care
↑ = Low-to-High clock transition
Q4
12
D5
14
DQ
CP
RD
Q5
D6
15
17
DQ
CP
RD
Q6
D7
16
18
DQ
CP
RD
19
Q7
SF00349
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to V
Current applied to output in Low output state 48 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
RECOMMENDED OPERATING CONDITIONS
V
T
CC
V
V
I
IK
I
OH
I
OL
amb
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
Input clamp current –18 mA
High-level output current –2.6 mA
Low-level output current 24 mA
Operating free-air temperature range 0 +70 °C
CC
LIMITS
MIN NOM MAX
V
1991 Feb 08
3
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