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INTEGRATED CIRCUITS
74ALS240A/74ALS240A–1
Octal inverter buffer (3–State)
Product specification
IC05 Data Handbook
1991 Feb 08
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Philips Semiconductors Product specification
Octal inverter buffer (3-State)
FEA TURES
•Octal bus interface
•3-State buffer outputs sink 24mA and source 15mA
•The -1 version sinks 48 mA
DESCRIPTION
The 74ALS240A is an octal buffer that is ideal for driving bus lines or
buffer memory address registers. The outputs are all capable of
sinking 24mA and sourcing up to 15mA, producing very good
capacitive drive characteristics. The device features two output
enables, OE
The 74ALS240A-1 sinks 48 mA IOL if the VCC is limited to
5.0V ±0.25V.
74ALS240A-1 4.5ns 15mA
a and OEb, each controlling four of the 3-State outputs.
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74ALS240A 4.5ns 15mA
PIN CONFIGURATION
1
OEa
2
Ia0
3
Y
b0
4
Ia1
b1
5
Y
Ia2
6
b2
Y
7
Ia3
8
Y
b3
9
GND
10 11
ORDERING INFORMA TION
ORDER CODE
COMMERCIAL RANGE
DESCRIPTION
20-pin plastic DIP
20-pin plastic SOL
20-pin plastic SSOP
Type II
V
CC
T
amb
74ALS240AN,
74ALS240A-1N
74ALS240AD,
74ALS240A-1D
74ALS240ADB,
74ALS240A-1DB
74ALS240A/
74ALS240A-1
V
20
CC
19
OEb
18
a0
Y
17
Ib0
a1
16
Y
Ib1
15
a2
Y
14
Ib2
13
Y
a3
12
Ib3
= 5V ±10%,
= 0°C to +70°C
SF00320
DRAWING
NUMBER
SOT146-1
SOT163-1
SOT339-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
Ian, Ibn Data inputs 1.0/1.0 20µA/0.1mA
OEa, OEb Output Enable inputs (active-Low) 1.0/1.0 20µA/0.1mA
Yan, Ybn Data outputs 750/240 15mA/24mA
Yan, Ybn Data outputs (-1 version) 750/480 15mA/48mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOGIC SYMBOL
119OEa
VCC = Pin 20
GND = Pin 10
2 4 6 8 17 15 13 11
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
OEb
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
181614123579
SF00321
IEC/IEEE SYMBOL
74ALS (U.L.)
HIGH/LOW
1
19
17
15
13
11
EN1
EN2
2
4
6
8
2D
1
2
LOAD VALUE
HIGH/LOW
18
16
14
12
3
5
7
9
SF00322
1991 Feb 08 853–1244 01670
2
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Philips Semiconductors Product specification
Current applied to output in Low output state
IOLLow-level output current
Octal inverter buffer (3-State)
LOGIC DIAGRAM
OE
Ib0
Ib1
Ib2
Ib3
17
15
13
11
10
b
3
5
7
9
SF00323
Yb0
Yb1
Y
Y
b2
b3
Ia0
Ia1
Ia2
Ia3
OE
a
VCC = Pin 20
GND = Pin 10
2
4
6
8
1
18
Y
a0
16
Ya1
14
Y
a2
12
Y
a3
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
OUT
T
amb
T
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in High output state –0.5 to V
pp
p
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
p
FUNCTION TABLE
OEa Ia OEb Ib Ya Yb
L L L L H H
L H L H L L
H X H X Z Z
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
All versions 48 mA
-1 version 96 mA
74ALS240A/
74ALS240A-1
INPUTS OUTPUTS
CC
V
RECOMMENDED OPERATING CONDITIONS
PARAMETER
V
CC
V
V
I
IK
I
OH
T
amb
NOTE:
1. The 48mA limit applies only under the condition of V
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
IH
Low-level input voltage 0.8 V
IL
Input clamp current –18 mA
High-level output current –15 mA
p
Operating free-air temperature range 0 +70 °C
CC
= 5.0V ±5%.
LIMITS
MIN NOM MAX
All versions 24 mA
-1 version 48
1
mA
1991 Feb 08
3