Philips 74als157 158 DATASHEETS
INTEGRATED CIRCUITS
74ALS157/74ALS158
Data selector/multiplexer
Product specification
IC05 Data Handbook
1991 Feb 08
Philips Semiconductors Product specification
74ALS157/74ALS158Data selector/multiplexer
74ALS157 Quad 2-input data selector/multiplexer, non-inverting
74ALS158 Quad 2-input data selector/multiplexer, inverting
DESCRIPTION
The 74ALS157 is a quad 2-input multiplexer which selects 4 bits of
data from one of two sources under the control of a common select
input (S). The enable input (E
all of the outputs (Yn) are forced Low regardless of all other input
conditions.
) is active when Low. When E is High,
TYPE
74ALS157 6.0ns 6mA
74ALS158 6.0ns 6mA
TYPICAL
PROPAGATION DELAY
SUPPLY CURRENT
Moving data from two registers to a common output bus is a typical
use of the 74ALS157. The state of the select input determines the
particular register from which data comes.
The device is the logic implementation of 4-pole, 2-position switch
where the position of the switch is determined by the logic levels
supplied to the select input. The 74ALS158 is similar but has
inverting outputs (Y
n).
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
V
= 5V ±10%,
CC
T
= 0°C to +70°C
amb
16-pin plastic DIP 74ALS157N, 74ALS158N SOT38-4
16-pin plastic SO 74ALS157D, 74ALS158D SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74ALS (U.L.)
HIGH/LOW
Ina, Inb, Inc, Ind Data inputs 1.0/1.0 20µA/0.1mA
S Select input 1.0/1.0 20µA/0.1mA
E Enable input 1.0/1.0 20µA/0.1mA
Ya – Yd, Ya – Yd Data outputs 20/240 0.4mA/24mA
NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.
LOAD VALUE
HIGH/LOW
TYPICAL
(TOTAL)
DRAWING
NUMBER
PIN CONFIGURATION – 74ALS157
I0a
I1a
I0b
I1b
S
1
2
3
Ya
4
5
6
Yb
16
15
14
13
12
11
107
98GND Yc
LOGIC SYMBOL – 74ALS157
2356111014
I0a I1a I0b I1b I0c I1c I0d
1
15
VCC = Pin 16
GND = Pin 8
S
E
Ya Yb Yc Yd
47912
V
E
I0d
I1d
Yd
I0c
I1c
PIN CONFIGURATION – 74ALS158
S
I0a
I1a
I0b
I1b
1
2
3
Y
4
a
5
6
b
Y
CC
SC00051
16
15
14
13
12
11
107
98GND Yc
V
E
I0d
I1d
Yd
I0c
I1c
CC
SC00052
LOGIC SYMBOL – 74ALS158
I1d
13
1
15
VCC = Pin 16
SC00053
GND = Pin 8
2356111014
I0a I1a I0b I1b I0c I1c I0d
S
E
Ya Yb Yc Yd
47912
13
I1d
SC00054
1991 Feb 08 853–1 129 01670
2
Philips Semiconductors Product specification
74ALS157/74ALS158Data selector/multiplexer
IEC/IEEE SYMBOL – 74ALS157
1
15
2
3
5
6
11
10
14
13
G1
EN
1
1
MUX
LOGIC DIAGRAM – 74ALS157
E I0a I1a I0b I1b I0c I1c I0d I0d S
15 2 3 5 6 11 10 14 13 1
IEC/IEEE SYMBOL – 74ALS158
1
15
4
7
9
12
SC00055
2
3
5
6
11
10
14
13
G1
EN
1
1
MUX
4
7
9
12
SC00056
LOGIC DIAGRAM – 74ALS158
E I0a I1a I0b I1b I0c I1c I0d I0d S
15 2 3 5 6 11 10 14 13 1
47 912
Ya Yb Yc Yd
VCC = Pin 16
GND = Pin 8
FUNCTION T ABLE – 74ALS157
INPUTS OUTPUTS
E S I0n I1n Yn
H X X X L
L L L X L
L L H X H
L H X L L
L H X H H
H = High voltage level
L = Low voltage level
X = Don’t care
SC00057
47 912
Ya Yb Yc Yd
VCC = Pin 16
GND = Pin 8
FUNCTION T ABLE – 74ALS158
INPUTS OUTPUTS
E S I0n I1n Yn
H X X X H
L L L X H
L L H X L
L H X L H
L H X H L
H = High voltage level
L = Low voltage level
X = Don’t care
SC00058
1991 Feb 08
3
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