Philips 74als109a DATASHEETS

INTEGRATED CIRCUITS

74ALS109A

Dual J-K

positive edge-triggered flip-flop

with set and reset

Product specification 1991 Feb 08
IC05 Data Handbook

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Philips Semiconductors Product specification

Dual J-K

positive edge triggered flip-flop

with set and reset

DESCRIPTION

The 74ALS109A is a dual positive edge-triggered JK-type flip-flop
featuring individual J, K
complementary outputs. Set (SD) and reset (RD) are asynchronous
active-Low inputs and operate independently of the clock (CP) input.
The J and K

are edge-triggered inputs which control the state
changes of the flip-flops as described in the function table. Clock
triggering occurs at a voltage level and is not directly related to the
transition time of the positive-going pulse. The J and K
be stable just one setup time prior to the Low-to-High transition of
the clock for predictable operation. The JK
as a D flip-flop by tying J and K
input is level sensitive, the positive transition of the clock pulse
between the 0.8V and 2.0V levels should be equal to or less than
the clock to output delay time for reliable operation.

TYPE

74ALS109A 150MHz 3.0mA

ORDERING INFORMATION

DESCRIPTION COMMERCIAL RANGE

16-pin plastic DIP 74ALS109AN SOT38-4

16-pin plastic SO 74ALS109AD SOT109-1

, clock, set, and reset inputs; also true and

inputs must

design allows operation

inputs together. Although the clock

TYPICAL

f

MAX

TYPICAL

SUPPLY CURRENT

(TOTAL)

ORDER CODE

DRAWING

V

= 5V ±10%,

CC

T

= 0°C to +70°C

amb

NUMBER

PIN CONFIGURATION

R

1

D0

2

J0

K

3

0

4

CP0

5

S

D0

6

0

Q

0

Q

74ALS109A

16

V

CC

D1

15

R
J1

14
13

1

K

12

CP1

11

SD1

107

Q1

98GND Q1

SF00135

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS DESCRIPTION

74ALS (U.L.)

HIGH/LOW

J0, J1 J inputs 1.0/2.0 20µA/0.2mA

K0, K1 K inputs 1.0/2.0 20µA/0.2mA
CP0, CP1 Clock inputs (active rising edge) 1.0/2.0 20µA/0.2mA
SD0, SD1 Set inputs (active-Low) 1.0/4.0 20µA/0.4mA
RD0, RD1 Reset inputs (active-Low) 1.0/4.0 20µA/0.4mA

Q0, Q1, Q0, Q1 Data outputs 20/80 0.4mA/8mA

NOTE: One (1.0) ALS unit load is defined as: 20µA in the High state and 0.1mA in the Low state.

LOGIC SYMBOL

4
5
1

12

11

15

VCC = Pin 16
GND = Pin 8

CP0
SD0
RD0
CP1
SD1
RD1

2 14 3 13

J1

K0

J0

Q0 Q0 Q1 Q1

6 7 10 9

K1

SF00136

IEC/IEEE SYMBOL

2
4

3
1
5

14
12

13
15
11

1J

C1

1K

R
S

2J

C2

2K

R
S

LOAD VALUE

HIGH/LOW

6

7

10

9

SF00137

1991 Feb 08 853–1275 01670

2

Philips Semiconductors Product specification

SYMBOL

PARAMETER

UNIT

Dual J-K

positive edge triggered flip-flop

with set and reset

LOGIC DIAGRAM

5, 11

SD

1, 15

R

D

4, 12

CP

2, 14

J

3, 13

K

V

= Pin 16

CC

GND = Pin 8

6, 10

7, 9

SC00042

74ALS109A

FUNCTION TABLE

INPUTS OUTPUTS

SD RD CP J K Q Q

L H X X X H L Asynchronous set

Q

H L X X X L H Asynchronous reset

L L X X X H* H* Undetermined*

H H ↑ h l q q Toggle

Q

H H ↑ l l L H Load “0”
H H ↑ h h H L Load “1”
H H ↑ l h q q Hold “no change”
H H L l h q q Hold “no change”

H = High voltage level
h = High state must be present one setup time prior to

Low-to-High clock transition
L = Low voltage level
l = Low state must be present one setup time prior to

Low-to-High clock transition
q = Lower case indicate the state of the referenced output prior to

the Low-to-High clock transition
X = Don’t care
↑ = Low-to-High clock transition
* = The output levels in this configuration are not guaranteed to

meet the minimum levels for V

maximum. Furthermore, this configuration is nonstable;

V

IN

that is, it will not remain when either set or reset returns to its

if the set and reset are near

OH

inactive (High) level.

OPERATING

MODE

ABSOLUTE MAXIMUM RATINGS

(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)

SYMBOL

V

CC

V

IN

I

IN

V

OUT

I

OUT

T

amb

T

stg

Supply voltage
Input voltage –0.5 to +7.0 V

Input current
Voltage applied to output in high output state –0.5 to V

Current applied to output in Low output state 16 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature range –65 to +150 °C

PARAMETER RATING UNIT

RECOMMENDED OPERATING CONDITIONS

V

T

V
V

I

I

OH

I

OL

amb

CC

Ik

Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

Input clamp current –18 mA
High-level output current –0.4 mA
Low-level output current 8 mA
Operating free-air temperature range 0 +70 °C

–0.5 to +7.0 V

–30 to +5 mA

CC

LIMITS

MIN NOM MAX

V

1991 Feb 08

3