Philips 74AHCU04 Datasheet
INTEGRATED CIRCUITS
DATA SH EET
74AHCU04
Hex inverter
Product specification
Supersedes data of 1999 Feb 26
File under Integrated Circuits, IC06
1999 Sep 27
Philips Semiconductors Product specification
Hex inverter 74AHCU04
FEATURES
• ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
CDM EIA/JESD22-C101
exceeds 1000 V
• Balanced propagation delays
• All inputs have Schmitt-trigger
actions
• Inputsacceptsvoltageshigherthan
V
CC
• Specified from
−40 to +85 and +125 °C.
DESCRIPTION
The74AHCU04ishigh-speedSi-gate
CMOS devices and is pin compatible
with low power Schottky TTL
(LSTTL). It is specified in compliance
with JEDEC standard No. 7A.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf≤3.0 ns.
amb
SYMBOL PARAMETER CONDITIONS TYPICAL UNIT
t
PHL/tPLH
C
I
C
O
C
PD
propagation delay
nA to nY
input capacitance VI=VCCor GND 3.0 pF
output capacitance 4.0 pF
power dissipation
capacitance
CL=15pF;
VCC=5V
CL=50pF;
f = 1 MHz;
1.5 ns
9.1 pF
notes 1 and 2
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
P
D=CPD
× V
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz;
fo= output frequency in MHz;
∑ (CL× V
2
× fo) = sum of outputs;
CC
CL= output load capacitance in pF;
VCC= supply voltage in Volts.
2. The condition is VI= GND to VCC.
The 74AHCU04 is a general purpose
hex inverter. Each of the six inverters
is a single stage.
FUNCTION TABLE
See note 1.
INPUT nA OUTPUT nY
LH
HL
Note
1. H = HIGH voltage level;
L = LOW voltage level.
PINNING
PIN SYMBOL DESCRIPTION
1, 3, 5, 9, 11 and 13 1A to 6A data inputs
2, 4, 6, 8, 10 and 12 1Y to 6Y data outputs
7 GND ground (0 V)
14 V
CC
DC supply voltage
1999 Sep 27 2
Philips Semiconductors Product specification
Hex inverter 74AHCU04
ORDERING INFORMATION
OUTSIDE NORTH
AMERICA
NORTH AMERICA
PINS PACKAGE MATERIAL CODE
PACKAGES
74AHCU04D 74AHCU04D 14 SO plastic SOT108-1
74AHCU04PW 74AHC04PW DH 14 TSSOP plastic SOT402-1
handbook, halfpage
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
U04
5
6
7
MNA345
V
14
CC
13
6A
12
6Y
11
5A
10
5Y
9
4A
8
4Y
handbook, halfpage
nA
100 Ω
VCCV
CC
nY
MNA346
handbook, halfpage
Fig.1 Pin configuration.
1Y
2Y
3Y
4Y
5Y
6Y
2
4
6
8
10
12
1A
1
2A
3
3A
5
4A
9
5A
11
6A
13
MNA347
Fig.3 Functional diagram.
Fig.2 Schematic diagram (one inverter).
handbook, halfpage
1
3
5
9
11
13
1
1
1
1
1
1
MNA348
Fig.4 IEC logic symbol.
2
4
6
8
10
12
1999 Sep 27 3
Philips Semiconductors Product specification
Hex inverter 74AHCU04
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
CC
V
I
V
O
T
amb
t
(∆t/∆f) input rise and fall rates VCC= 3.3 V ±0.3 V −−100 ns/V
r,tf
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground= 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
V
I
I
IK
I
OK
I
O
I
CC
T
stg
P
D
DC supply voltage 2.0 5.0 5.5 V
input voltage 0 − 5.5 V
output voltage 0 − V
operating ambient temperature range see DC and AC characteristics per
device
V
=5V±0.5 V −−20
CC
−40 +25 +85 °C
−40 +25 +125 °C
CC
V
DC supply voltage −0.5 +7.0 V
input voltage range −0.5 +7.0 V
DC input diode current VI< −0.5 V; note 1 −−20 mA
DC output diode current VO< −0.5 Vor VO>VCC+ 0.5 V; note 1 −±20 mA
DC output source or sink current −0.5V<VO<VCC+ 0.5 V −±25 mA
DC VCC or GND current −±75 mA
storage temperature range −65 +150 °C
power dissipation per package for temperature range: −40 to +125 °C;
− 500 mW
note 2
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO packages: above 70 °C the value of PDderates linearly with 8 mW/K.
For TSSOP packages: above 60 °C the value of PDderates linearly with 5.5 mW/K.
1999 Sep 27 4
Philips Semiconductors Product specification
Hex inverter 74AHCU04
DC CHARACTERISTICS
Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).
SYMBOL PARAMETER
V
IH
HIGH-level input
voltage
V
IL
LOW-level input
voltage
V
OH
HIGH-level output
voltage; all outputs
HIGH-level output
voltage
V
OL
LOW-level output
voltage; all outputs
LOW-level output
voltage
I
I
input leakage
current
I
OZ
3-state output
OFF current
I
CC
quiescent supply
current
C
I
input capacitance − 310−10 − 10 pF
TEST CONDITIONS T
25 −40 to +85 −40 to +125
amb
(°C)
UNIT
OTHER VCC(V)
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
2.0 1.7 −−1.7 − 1.7 − V
3.0 2.4 −−2.4 − 2.4 −
5.5 4.4 −−4.4 − 4.4 −
2.0 −− 0.3 − 0.3 − 0.3 V
3.0 −− 0.6 − 0.6 − 0.6
5.5 −− 1.1 − 1.1 − 1.1
VI=VIHor VIL;
IO= −50 µA
2.0 1.8 2.0 − 1.8 − 1.8 − V
3.0 2.7 3.0 − 2.7 − 2.7 −
4.5 4.0 4.5 − 4.0 − 4.0 −
V
I=VIH
or VIL;
3.0 2.58 −−2.48 − 2.40 − V
IO= −4.0 mA
V
I=VIH
or VIL;
4.5 3.94 −−3.8 − 3.7 −
IO= −8.0 mA
VI=VIHor VIL;
IO=50µA
2.0 − 0 0.2 − 0.2 − 0.2 V
3.0 − 0 0.3 − 0.3 − 0.3
4.5 − 0 0.5 − 0.5 − 0.5
V
I=VIH
or VIL;
3.0 −− 0.36 − 0.44 − 0.55 V
IO=4mA
V
I=VIH
or VIL;
4.5 −− 0.36 − 0.44 − 0.55
IO=8mA
VI=VCCor GND 5.5 −− 0.1 − 1.0 − 2.0 µA
VI=VIHor VIL;
5.5 −− ±0.25 −±2.5 −±10.0 µA
VO=VCCor GND
VI=VCCor GND;
5.5 −− 2.0 − 20 − 40 µA
IO=0
1999 Sep 27 5
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