Philips 74AHCT244PW, 74AHCT244DB, 74AHCT244D, 74AHC244PW, 74AHC244DB Datasheet
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INTEGRATED CIRCUITS
DATA SHEET
74AHC244; 74AHCT244
Octal buffer/line driver; 3-state
Product specification |
1999 Sep 28 |
Supersedes data of 1999 Feb 24
File under Integrated Circuits, IC06
Philips Semiconductors |
Product specification |
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Octal buffer/line driver; 3-state |
74AHC244; 74AHCT244 |
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FEATURES
·ESD protection:
HBM EIA/JESD22-A114-A exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V
CDM EIA/JESD22-C101 exceeds 1000 V
·Balanced propagation delays
·All inputs have a Schmitt-trigger action
·Inputs accepts voltages higher than
VCC
·For AHC only:
operates with CMOS input levels
·For AHCT only:
operates with TTL input levels
·Specified from
-40 to +85 and +125 °C.
DESCRIPTION
The 74AHC/AHCT244 is a high-speed Si-gate CMOS device.
The 74AHC/AHCT244 is an octal non-inverting buffer/line driver with 3-state outputs.
The 3-state outputs are controlled by the outputs enable inputs 1OE and 2OE.
A HIGH on nOE causes the outputs to assume a high-impedance OFF state.
FUNCTION TABLE
See note 1.
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INPUTS |
OUTPUT |
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nAn |
nYn |
nOE |
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L |
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L |
L |
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L |
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H |
H |
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H |
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X |
Z |
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Note
1.H = HIGH voltage level; L = LOW voltage level; X = don’t care;
Z = high-impedance OFF state.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf £ 3.0 ns.
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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AHC |
AHCT |
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tPHL/tPLH |
propagation delay |
CL = 15 pF; |
3.5 |
5.0 |
ns |
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1An to 1Yn; |
VCC = 5 V |
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2An to 2Yn |
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CI |
input capacitance |
VI = VCC or GND |
3.5 |
3.5 |
pF |
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CO |
output capacitance |
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4.0 |
4.0 |
pF |
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CPD |
power dissipation |
CL = 50 pF; |
10 |
12 |
pF |
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capacitance |
f = 1 MHz; |
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notes 1 and 2 |
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Notes
1.CPD is used to determine the dynamic power dissipation (PD in mW). PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:
fi = input frequency in MHz; fo = output frequency in MHz;
å (CL ´ VCC2 ´ fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
1999 Sep 28 |
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Philips Semiconductors |
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Product specification |
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Octal buffer/line driver; 3-state |
74AHC244; 74AHCT244 |
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PINNING |
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PIN |
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SYMBOL |
DESCRIPTION |
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1 |
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output enable input (active LOW) |
1OE |
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2, 4, 6 and 8 |
1A0 to 1A3 |
data inputs |
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3, 5, 7 and 9 |
2Y0 to 2Y3 |
bus outputs |
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10 |
GND |
ground (0 V) |
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11, 13, 15 and 17 |
2A3 to 2A0 |
data inputs |
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12, 14, 16 and 18 |
1Y3 to 1Y0 |
data outputs |
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19 |
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output enable input (active LOW) |
2OE |
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20 |
VCC |
DC supply voltage |
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ORDERING INFORMATION
OUTSIDE NORTH |
NORTH AMERICA |
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PACKAGES |
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AMERICA |
PINS |
PACKAGE |
MATERIAL |
CODE |
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74AHC244D |
74AHC244D |
20 |
SO |
plastic |
SOT163-1 |
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74AHC244PW |
74AHC244PW DH |
20 |
TSSOP |
plastic |
SOT360-1 |
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74AHCT244D |
74AHCT244D |
20 |
SO |
plastic |
SOT163-1 |
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74AHCT244PW |
7AHCT244PW DH |
20 |
TSSOP |
plastic |
SOT360-1 |
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1999 Sep 28 |
3 |
Philips Semiconductors |
Product specification |
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Octal buffer/line driver; 3-state |
74AHC244; 74AHCT244 |
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VCC |
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1OE |
1 |
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20 |
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1A0 |
2 |
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19 |
2OE |
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2Y0 |
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1Y0 |
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3 |
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18 |
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2A0 |
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1A1 |
4 |
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17 |
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2Y1 |
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1Y1 |
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5 |
244 |
16 |
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1A2 |
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2A1 |
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6 |
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15 |
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2Y2 |
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1Y2 |
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7 |
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14 |
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1A3 |
8 |
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2A2 |
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13 |
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2Y3 |
9 |
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1Y3 |
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12 |
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GND 10 |
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2A3 |
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11 |
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MNA162 |
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Fig.1 Pin configuration.
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handbook, halfpage |
1Y0 |
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1A0 |
18 |
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2 |
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1A1 |
1Y1 |
16 |
handbook, halfpage |
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4 |
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1 |
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EN |
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1A2 |
1Y2 |
14 |
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18 |
6 |
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2 |
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4 |
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16 |
1A3 |
1Y3 |
12 |
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6 |
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14 |
8 |
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8 |
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12 |
1OE |
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1 |
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19 |
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2A0 |
2Y0 |
3 |
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EN |
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17 |
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11 |
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9 |
2A1 |
2Y1 |
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15 |
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5 |
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13 |
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7 |
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15 |
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5 |
2A2 |
2Y2 |
7 |
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13 |
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17 |
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3 |
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MNA169 |
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2A3 |
2Y3 |
9 |
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11 |
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2OE |
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19 |
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MNA170 |
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Fig.2 IEEE/IEC logic symbol. |
Fig.3 Logic diagram. |
1999 Sep 28 |
4 |
Philips Semiconductors |
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Product specification |
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Octal buffer/line driver; 3-state |
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74AHC244; 74AHCT244 |
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RECOMMENDED OPERATING CONDITIONS |
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SYMBOL |
PARAMETER |
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CONDITIONS |
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74AHC |
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74AHCT |
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UNIT |
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MIN. |
TYP. |
MAX. |
MIN. |
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TYP. |
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MAX. |
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VCC |
DC supply voltage |
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2.0 |
5.0 |
5.5 |
4.5 |
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5.0 |
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5.5 |
V |
VI |
input voltage |
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0 |
− |
5.5 |
0 |
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5.5 |
V |
VO |
output voltage |
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0 |
− |
VCC |
0 |
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VCC |
V |
Tamb |
operating ambient temperature |
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see DC and AC |
−40 |
+25 |
+85 |
−40 |
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+25 |
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+85 |
°C |
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range |
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characteristics per |
−40 |
+25 |
+125 |
−40 |
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+25 |
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+125 |
°C |
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device |
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tr,tf ( t/ f) |
input rise and fall rates |
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VCC = 3.3 V ±0.3 V |
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100 |
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ns/V |
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VCC = 5 V ±0.5 V |
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− |
20 |
− |
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− |
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LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
UNIT |
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VCC |
DC supply voltage |
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−0.5 |
+7.0 |
V |
VI |
input voltage range |
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−0.5 |
+7.0 |
V |
IIK |
DC input diode current |
VI < −0.5 V; note 1 |
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−20 |
mA |
IOK |
DC output diode current |
VO < −0.5 V or VO > VCC + 0.5 V; note 1 |
− |
±20 |
mA |
IO |
DC output source or sink current |
−0.5 V < VO < VCC + 0.5 V |
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±25 |
mA |
ICC |
DC VCC or GND current |
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±75 |
mA |
Tstg |
storage temperature range |
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−65 |
+150 |
°C |
PD |
power dissipation per package |
for temperature range: −40 to +125 °C; note 2 |
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500 |
mW |
Notes
1.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2.For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K.
For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.
1999 Sep 28 |
5 |
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