INTEGRATED CIRCUITS
DATA SH EET
74AHC1G79; 74AHCT1G79
Single D-type flip-flop;
positive-edge trigger
Product specification
File under Integrated Circuits, IC06
1999 May 18
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger
FEATURES
• Symmetrical output impedance
• High noise immunity
• ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V;
MM EIA/JESD22-A115-A
exceeds 200 V
• Low power dissipation
• Balanced propagation delays
• Very small 5 pin package
• Output capability: standard.
DESCRIPTION
The 74AHC1G/AHCT1G79 is a
high-speed Si-gate CMOS device.
The 74AHC1G/AHCT1G79 provides
a single positive-edge triggered
D-type flip-flop.
Information on the data input is
transferred to the Q output on the
LOW-to-HIGH transition of the clock
pulse. The D input must be stable one
set-up time prior to the LOW-to-HIGH
clock transition for predictable
operation.
FUNCTION TABLE
See note 1.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf≤3.0 ns.
amb
SYMBOL PARAMETER CONDITIONS
t
PHL/tPLH
propagation delay
CP to Q
C
I
C
PD
input capacitance 1.5 1.5 pF
power dissipation
capacitance
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
2
× fi+(CL×V
CC
fi= input frequency in MHz;
fo= output frequency in MHz;
CL= output load capacitance in pF;
VCC= supply voltage in V.
2. The condition is VI= GND to VCC.
PINNING
PIN SYMBOL DESCRIPTION
1 D data input
2 CP clock pulse input
3 GND ground (0 V)
4 Q data output
5V
CL=15pF;
VCC=5V
notes 1 and 2;
CL=50pF;
f = 1 Mhz
2
CC
CC
74AHC1G79;
74AHCT1G79
TYPICAL
UNIT
AHC1G AHCT1G
3.5 3.5 ns
15 16 pF
× fo) where:
DC supply voltage
INPUTS OUTPUT
CP D Q+1
↑ LL
↑HH
LX Q
Note
1. H = HIGH voltage level;
L = LOW voltage level;
↑ = LOW-to-HIGH CP transition;
X = don’t care;
Q + 1 = state after the next
LOW-to-HIGH CP transition.
1999 May 18 2
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger
74AHC1G79;
74AHCT1G79
ORDERING AND PACKAGE INFORMATION
PACKAGES
TYPE NUMBER
74AHC1G79GW
74AHCT1G79GW 5 SC-88A plastic SOT353 CP
page
CP
GND
D
1
2
79
3
MNA439
TEMPERATURE
RANGE
−40 to +85 °C
V
5
CC
Q
4
page
PINS PACKAGE MATERIAL CODE MARKING
5 SC-88A plastic SOT353 AP
1CPD4Q
2
MNA440
page
14
2
MNA441
Fig.1 Pin configuration.
handbook, full pagewidth
CP
Fig.2 Logic symbol.
C
C
C
D
TG
C
C
TG
C
TG
C
C
C
TG
C
Fig.3 IEC logic symbol.
Q
MNA442
Fig.4 Logic diagram.
1999 May 18 3
Philips Semiconductors Product specification
Single D-type flip-flop; positive-edge trigger
74AHC1G79;
74AHCT1G79
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS
V
CC
V
I
V
O
T
amb
DC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V
input voltage 0 − 5.5 0 − 5.5 V
output voltage 0 − V
operating ambient
temperature range
see DC and AC
characteristics per
device
, tf (∆t/∆f) input rise and fall times
t
r
except for
Schmitt-trigger inputs
VCC= 3.3 V ±0.3 V −−100 −−− ns/V
V
=5V±0.5 V −−20 −−20
CC
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
CC
V
I
I
IK
I
OK
I
O
I
CC
T
stg
P
D
DC supply voltage −0.5 +7.0 V
input voltage range −0.5 +7.0 V
DC input diode current VI< −0.5 −−20 mA
DC output diode current VO< −0.5 or VO>VCC+ 0.5 V; note 1 −±20 mA
DC output source or sink current −0.5V<VO<VCC+ 0.5 V −±25 mA
DC VCC or GND current −±75 mA
storage temperature −65 +150 °C
power dissipation per package temperature range: −40 to +85 °C;
note 2
74AHC1G 74AHCT1G
MIN. TYP. MAX. MIN. TYP. MAX.
0 − V
CC
CC
V
−40 +25 +85 −40 +25 +85 °C
− 200 mW
UNIT
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. Above 55 °C the value of PD derates linearly with 2.5 mW/K.
1999 May 18 4