Philips 74AHCT04D, 74AHCT04PW, 74AHC04PW, 74AHC04D Datasheet

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INTEGRATED CIRCUITS

DATA SHEET

74AHC04; 74AHCT04

Hex inverter

Product specification

1999 Sep 27

Supersedes data of 1999 Feb 25

File under Integrated Circuits, IC06

Philips Semiconductors

Product specification

 

 

Hex inverter

74AHC04; 74AHCT04

 

 

 

 

FEATURES

·ESD protection:

HBM EIA/JESD22-A114-A exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V

·Balanced propagation delays

·Inputs accepts voltages higher than

VCC

·For AHC only:

operates with CMOS input levels

·For AHCT only:

operates with TTL input levels

·Specified from

-40 to +85 and +125 °C.

DESCRIPTION

The 74AHC/AHCT04 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A.

The 74AHC/AHCT04 provide six inverting buffers.

FUNCTION TABLE

See note 1.

INPUT nA

OUTPUT nY

 

 

L

H

 

 

H

L

 

 

Note

1.H = HIGH voltage level; L = LOW voltage level.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf £ 3.0 ns.

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

 

 

AHC

AHCT

 

 

 

 

 

 

 

 

 

 

tPHL/tPLH

propagation

CL = 15 pF;

3.0

3.0

ns

 

delay nA to nY

VCC = 5 V

 

 

 

CI

input

VI = VCC or GND

4.0

4.0

pF

 

capacitance

 

 

 

 

 

 

 

 

 

 

CPD

power dissipation

CL = 50 pF;

13.5

13.9

pF

 

capacitance

f = 1 MHz;

 

 

 

 

 

notes 1 and 2

 

 

 

 

 

 

 

 

 

Notes

1.CPD is used to determine the dynamic power dissipation (PD in mW). PD = CPD ´ VCC2 ´ fi + å (CL ´ VCC2 ´ fo) where:

fi = input frequency in MHz; fo = output frequency in MHz;

å (CL ´ VCC2 ´ fo) = sum of outputs;

CL = output load capacitance in pF;

VCC = supply voltage in Volts.

2. The condition is VI = GND to VCC.

PINNING

PIN

SYMBOL

DESCRIPTION

 

 

 

1, 3, 5, 9, 11 and 13

1A to 6A

data inputs

 

 

 

2, 4, 6, 8, 10 and 12

1Y to 6Y

data outputs

 

 

 

7

GND

ground (0 V)

 

 

 

14

VCC

DC supply voltage

1999 Sep 27

2

Philips 74AHCT04D, 74AHCT04PW, 74AHC04PW, 74AHC04D Datasheet

Philips Semiconductors

 

 

 

Product specification

 

 

 

 

 

 

Hex inverter

 

 

 

74AHC04; 74AHCT04

 

 

 

 

 

 

 

ORDERING INFORMATION

 

 

 

 

 

 

 

 

 

 

 

 

OUTSIDE NORTH

NORTH AMERICA

 

PACKAGES

 

 

 

 

 

 

 

AMERICA

PINS

PACKAGE

MATERIAL

 

CODE

 

 

 

 

 

 

 

 

 

 

 

 

74AHC04D

74AHC04D

14

SO

plastic

 

SOT108-1

 

 

 

 

 

 

 

74AHC04PW

74AHC04PW DH

14

TSSOP

plastic

 

SOT402-1

 

 

 

 

 

 

 

74AHCT04D

74AHCT04D

14

SO

plastic

 

SOT108-1

 

 

 

 

 

 

 

74AHCT04PW

74AHCT04PW DH

14

TSSOP

plastic

 

SOT402-1

 

 

 

 

 

 

 

handbook, halfpage

1A

1

 

 

14

VCC

1Y

 

 

 

 

 

2

 

 

13

6A

 

 

 

 

 

 

2A

3

 

 

12

6Y

 

 

 

 

 

 

2Y

4

04

11

5A

 

 

 

 

 

 

3A

5

 

 

10

5Y

 

 

 

 

 

 

3Y

6

 

 

9

4A

 

 

 

 

 

 

GND

7

 

 

8

4Y

 

 

 

 

 

 

 

 

 

MNA340

 

 

Fig.1 Pin configuration.

handbook, halfpage

1

1A

1Y

2

3

2A

2Y

4

5

3A

3Y

6

9

4A

4Y

8

11

5A

5Y

10

13

6A

6Y

12

 

 

MNA342

 

Fig.3 Functional diagram.

handbook, halfpage

Y

A

 

MNA341

Fig.2 Logic diagram (one gate).

handbook, halfpage

 

1

 

1

 

 

2

 

 

 

 

 

 

 

 

3

 

1

4

 

 

 

 

 

 

 

 

 

 

5

 

1

6

 

 

 

 

 

 

 

 

 

 

9

 

1

8

 

 

 

 

 

 

 

 

 

 

11

 

1

10

 

 

 

 

 

 

 

 

 

 

13

 

1

12

 

 

 

 

 

 

 

 

 

MNA343

Fig.4 IEC logic symbol.

1999 Sep 27

3

Philips Semiconductors

 

 

 

 

 

 

Product specification

 

 

 

 

 

 

 

 

 

 

 

Hex inverter

 

 

 

74AHC04; 74AHCT04

 

 

 

 

 

 

 

 

 

 

 

 

 

RECOMMENDED OPERATING CONDITIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SYMBOL

PARAMETER

 

CONDITIONS

 

74AHC

 

 

74AHCT

 

UNIT

 

 

 

 

 

 

 

 

 

 

MIN.

TYP.

MAX.

MIN.

 

TYP.

 

MAX.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

DC supply voltage

 

 

2.0

5.0

5.5

4.5

 

5.0

 

5.5

V

VI

input voltage

 

 

0

5.5

0

 

 

5.5

V

VO

output voltage

 

 

0

VCC

0

 

 

VCC

V

Tamb

operating ambient temperature

 

see DC and AC

40

+25

+85

40

 

+25

 

+85

°C

 

range

 

characteristics per

40

+25

+125

40

 

+25

 

+125

°C

 

 

 

device

 

 

 

 

 

 

 

 

 

tr,tf ( t/ f)

input rise and fall times except

 

VCC = 3.3 V ±0.3 V

100

 

 

ns/V

 

for Schmitt-trigger inputs

 

VCC = 5 V ±0.5 V

20

 

 

20

 

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground = 0 V).

SYMBOL

PARAMETER

CONDITIONS

MIN.

MAX.

UNIT

 

 

 

 

 

 

VCC

DC supply voltage

 

0.5

+7.0

V

VI

input voltage range

 

0.5

+7.0

V

IIK

DC input diode current

VI < 0.5 V; note 1

20

mA

IOK

DC output diode current

VO < 0.5 V or VO > VCC + 0.5 V; note 1

±20

mA

IO

DC output source or sink current

0.5 V < VO < VCC + 0.5 V

±25

mA

ICC

DC VCC or GND current

 

±75

mA

Tstg

storage temperature range

 

65

+150

°C

PD

power dissipation per package

for temperature range: 40 to +125 °C; note 2

500

mW

Notes

1.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

2.For SO packages: above 70 °C the value of PD derates linearly with 8 mW/K.

For TSSOP packages: above 60 °C the value of PD derates linearly with 5.5 mW/K.

1999 Sep 27

4

Philips Semiconductors

Product specification

 

 

Hex inverter

74AHC04; 74AHCT04

 

 

DC CHARACTERISTICS

74AHC family

Over recommended operating conditions; voltage are referenced to GND (ground = 0 V).

 

 

TEST CONDITIONS

 

 

Tamb (°C)

 

 

 

SYMBOL

PARAMETER

OTHER

VCC (V)

 

25

 

40 to +85

40 to +125

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

MIN.

TYP.

MAX.

MIN.

MAX.

MIN.

MAX.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIH

HIGH-level input

 

2.0

1.5

1.5

1.5

V

 

voltage

 

3.0

2.1

2.1

2.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.5

3.85

3.85

3.85

 

 

 

 

 

 

 

 

 

 

 

 

 

VIL

LOW-level input

 

2.0

0.5

0.5

0.5

V

 

voltage

 

3.0

0.9

0.9

0.9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5.5

1.65

1.65

1.65

 

 

 

 

 

 

 

 

 

 

 

 

 

VOH

HIGH-level output

VI = VIH or VIL;

2.0

1.9

2.0

1.9

1.9

V

 

voltage; all

IO = 50 μA

 

 

 

 

 

 

 

 

 

 

3.0

2.9

3.0

2.9

2.9

 

 

outputs

 

 

 

 

 

 

 

 

 

 

 

 

4.5

4.4

4.5

4.4

4.4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HIGH-level output

VI = VIH or VIL;

3.0

2.58

2.48

2.40

V

 

voltage

IO = 4.0 mA

 

 

 

 

 

 

 

 

 

 

 

VI = VIH or VIL;

4.5

3.94

3.8

3.70

 

 

 

IO = 8.0 mA

 

 

 

 

 

 

 

 

 

VOL

LOW-level output

VI = VIH or VIL;

2.0

0

0.1

0.1

0.1

V

 

voltage; all

IO = 50 μA

3.0

0

0.1

0.1

0.1

 

 

outputs

 

 

 

 

 

 

 

 

 

 

 

 

4.5

0

0.1

0.1

0.1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LOW-level output

VI = VIH or VIL;

3.0

0.36

0.44

0.55

V

 

voltage

IO = 4 mA

 

 

 

 

 

 

 

 

 

 

 

VI = VIH or VIL;

4.5

0.36

0.44

0.55

 

 

 

IO = 8 mA

 

 

 

 

 

 

 

 

 

II

input leakage

VI = VCC or GND

5.5

0.1

1.0

2.0

μA

 

current

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

IOZ

3-state output

VI = VIH or VIL;

5.5

±0.25

±2.5

±10.0

μA

 

OFF current

VO = VCC or GND

 

 

 

 

 

 

 

 

 

ICC

quiescent supply

VI = VCC or GND;

5.5

4.0

40

80

μA

 

current

IO = 0

 

 

 

 

 

 

 

 

 

CI

input capacitance

 

3

10

10

10

pF

1999 Sep 27

5

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