• ESD protection:
HBM EIA/JESD22-A114-A
exceeds 2000 V
MM EIA/JESD22-A115-A
exceeds 200 V
CDM EIA/JESD22-C101
exceeds 1000 V
• Balanced propagation delays
• All inputs have Schmitt-trigger
actions
• Inputsacceptsvoltageshigherthan
V
CC
• For AHC only:
operates with CMOS input levels
• For AHCT only:
operates with TTL input levels
• Specified from
−40 to +85 and +125 °C.
DESCRIPTION
The 74AHC/AHCT126 are
high-speed Si-gate CMOS devices
and are pin compatible with low
power Schottky TTL (LSTTL). They
are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT126 are four
non-inverting buffer/line drivers with
3-state outputs. The 3-state outputs
(nY) are controlled by the output
enable input (nOE) A LOW at nOE
causes the outputs to assume a
HIGH-impedance OFF state.
The ‘126’ is identical to the ‘125’ but
has active HIGH enable inputs.
FUNCTION TABLE
See note 1.
INPUTSOUTPUT
nOEnAnY
HLL
HHH
LXZ
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
Z = high-impedance OFF state.
QUICK REFERENCE DATA
GND = 0 V; T
=25°C; tr=tf≤3.0 ns.
amb
SYMBOLPARAMETERCONDITIONS
t
PHL/tPLH
C
I
C
O
C
PD
propagation delay
nA to nY
input capacitanceVI=VCCor GND3.03.0pF
output capacitance4.04.0pF
power dissipation
capacitance
CL=15pF;
VCC=5V
CL=50pF;
f = 1 MHz;
notes 1 and 2
Notes
1. C
is used to determine the dynamic power dissipation (PDin µW).
PD
PD=CPD× V
2
× fi+ ∑ (CL× V
CC
2
× fo) where:
CC
fi= input frequency in MHz;
fo= output frequency in MHz;
∑ (CL× V
2
× fo) = sum of outputs;
CC
CL= output load capacitance in pF;
VCC= supply voltage in Volts.
2. The condition is VI= GND to VCC.
TYPICAL
UNIT
AHCAHCT
3.33.0ns
1012pF
PINNING
PINSYMBOLDESCRIPTION
1, 4, 10 and 131OE to 4OEoutput enable inputs (active HIGH)
2, 5, 9 and 121A to 4Adata inputs
3, 6, 8 and 111Y to 4Ydata outputs
7GNDground (0 V)
14V
DC supply voltage2.05.05.54.55.05.5V
input voltage0−5.50−5.5V
output voltage0−V
operating ambient temperature
range
see DC and AC
characteristics per
−40+25+85−40+25+85°C
−40+25+125 −40+25+125 °C
0−V
CC
CC
V
device
t
(∆t/∆f) input rise and fall ratesVCC= 3.3 V ±0.3 V −−100−−−ns/V
r,tf
=5V±0.5 V−−20−−20
V
CC
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134); voltages are referenced to GND (ground= 0 V).
SYMBOLPARAMETERCONDITIONSMIN. MAX. UNIT
V
CC
V
I
I
IK
I
OK
I
O
I
CC
T
stg
P
D
DC supply voltage−0.5+7.0V
input voltage range−0.5+7.0V
DC input diode currentVI< −0.5 V; note 1−−20mA
DC output diode currentVO< −0.5 Vor VO>VCC+ 0.5 V; note 1−±20mA
DC output source or sink current −0.5V<VO<VCC+ 0.5 V−±25mA
DC VCC or GND current−±75mA
storage temperature range−65+150 °C
power dissipation per packagefor temperature range: −40 to +125 °C; note 2−500mW
Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. For SO packages: above 70 °C the value of P
derates linearly with 8 mW/K.
D
For TSSOP packages: above 60 °C the value of PDderates linearly with 5.5 mW/K.