Philips 74ABTH16827ADL, 74ABTH16827ADGG, 74ABT16827ADL, 74ABT16827ADGG Datasheet

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INTEGRATED CIRCUITS

74ABT16827A

74ABTH16827A

20-bit buffer/line driver, non-inverting

(3-State)

Product specification

1998 Feb 27

Supersedes data of 1995 Aug 31

IC23 Data Handbook

m n r

Philips Semiconductors

Product specification

 

 

 

 

 

20-bit buffer/line driver, non-inverting (3-State)

74ABT16827A

74ABTH16827A

 

 

 

 

 

 

 

FEATURES

Multiple VCC and GND pins minimize switching noise

Live insertion/extraction permitted

3-State output buffers

Power-up 3-State

74ABTH16827A incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs

Output capability: +64mA/-32mA

Latch-up protection exceeds 500mA per Jedec Std 17

ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model

DESCRIPTION

The 74ABT16827A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT16827A 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE1, nOE2) for maximum control flexibility.

Two options are available, 74ABT16827A which does not have the bus-hold feature and 74ABTH16827A which incorporates the bus-hold feature.

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

Tamb = 25°C; GND = 0V

 

 

 

 

tPLH

Propagation delay

CL = 50pF; VCC = 5V

1.7

ns

tPHL

nAx to nYx

1.4

 

 

CIN

Input capacitance

VI = 0V or VCC

4

pF

COUT

Output capacitance

VO = 0V or VCC; 3-State

6

pF

ICCZ

Quiescent supply current

Outputs disabled; VCC = 5.5V

500

μA

ICCL

Outputs Low; VCC = 5.5V

9

mA

 

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

DWG NUMBER

 

 

 

 

 

56-Pin Plastic SSOP Type III

±40°C to +85°C

74ABT16827A DL

BT16827A DL

SOT371-1

 

 

 

 

 

56-Pin Plastic TSSOP Type II

±40°C to +85°C

74ABT16827A DGG

BT16827A DGG

SOT364-1

 

 

 

 

 

56-Pin Plastic SSOP Type III

±40°C to +85°C

74ABTH16827A DL

BH16827A DL

SOT371-1

 

 

 

 

 

56-Pin Plastic TSSOP Type II

±40°C to +85°C

74ABTH16827A DGG

BH16827A DGG

SOT364-1

 

 

 

 

 

PIN DESCRIPTION

PIN NUMBER

 

SYMBOL

FUNCTION

 

 

 

 

 

 

 

55, 54, 52, 51, 49, 48, 47, 45, 44, 43,

 

1A0 - 1A9

Data inputs

42, 41, 40, 38, 37, 36, 34, 33, 31, 30

 

2A0 - 2A9

 

 

2, 3, 5, 6, 8, 9, 10, 12, 13, 14,

 

1Y0 - 1Y9

Data outputs

15, 16, 17, 19, 20, 21, 23, 24, 26, 27

 

2Y0 - 2Y9

 

 

 

 

 

 

 

 

 

1, 56,

 

 

 

 

 

 

1OE0, 1OE1

Output enable inputs (active-Low)

 

 

 

 

 

 

28, 29

2OE0, 2OE1

 

4, 11, 18, 25, 32, 39, 46, 53

 

GND

Ground (0V)

 

 

 

 

7, 22, 35, 50

 

VCC

Positive supply voltage

1998 Feb 27

2

853-1824 19025

Philips 74ABTH16827ADL, 74ABTH16827ADGG, 74ABT16827ADL, 74ABT16827ADGG Datasheet

Philips Semiconductors

Product specification

 

 

 

20-bit buffer/line driver, non-inverting (3-State)

74ABT16827A

74ABTH16827A

 

 

 

 

PIN CONFIGURATION

 

 

 

 

 

 

 

 

1OE0

1

 

56

1OE1

 

 

 

 

 

 

 

 

 

1Y0

2

 

55

1A0

 

 

 

 

 

 

 

 

 

1Y1

3

 

54

1A1

 

 

 

 

 

 

 

 

GND

4

 

53

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1Y2

5

 

52

1A2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1Y3

6

 

51

1A3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC

7

 

50

VCC

 

 

 

 

 

 

1A4

 

1Y4

8

 

49

 

 

 

 

 

 

1A5

 

 

 

 

 

 

 

1Y5

9

 

48

 

 

 

 

 

 

1A6

 

 

 

 

 

 

 

1Y6

10

 

47

GND

 

 

 

GND

 

 

 

11

 

46

 

1Y7

 

 

 

1A7

 

12

 

45

 

1Y8

 

 

 

1A8

 

13

 

44

 

1Y9

 

 

 

1A9

 

 

 

 

 

14

 

43

 

2Y0

 

 

 

2A0

 

 

 

 

 

15

 

42

 

2Y1

 

 

 

2A1

 

 

 

 

 

16

 

41

 

2Y2

 

 

 

2A2

 

17

 

40

GND

 

 

 

GND

18

 

39

 

2Y3

 

 

 

2A3

 

 

 

 

 

19

 

38

 

2Y4

 

 

 

2A4

 

 

 

 

 

20

 

37

 

2Y5

 

 

 

2A5

 

 

 

 

 

21

 

36

 

VCC

 

 

 

VCC

 

22

 

35

 

 

 

 

 

 

 

 

2Y6

23

 

34

2A6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2Y7

24

 

33

2A7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

25

 

32

GND

 

 

 

 

 

 

 

 

 

2Y8

26

 

31

2A8

 

 

 

 

 

 

 

 

 

2Y9

27

 

30

2A9

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2OE0

 

28

 

29

 

2OE1

 

 

 

 

SH00010

 

 

LOGIC SYMBOL

55

54

52

51

49

48

47

45

44

43

1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9

1 1OE0

56 1OE1

1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9

2

3

5

6

8

9

10

12

13

14

42

41

40

38

37

36

34

33

31

30

2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9

28 2OE0

29 2OE1

2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9

15

16

17

19

20

21

23

24

26

27

SH00011

LOGIC SYMBOL (IEEE/IEC)

1

&

 

 

 

 

 

 

56

 

 

EN1

 

 

 

 

28

 

 

 

 

&

EN2

 

29

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

55

 

1

1

2

 

54

 

3

 

 

 

 

 

 

 

 

52

 

 

 

5

 

 

 

 

51

 

 

 

6

 

 

 

 

 

49

 

 

 

8

 

 

 

 

 

48

 

 

 

9

 

 

 

 

 

47

 

 

 

10

 

 

 

 

 

45

 

 

 

12

 

 

 

 

 

44

 

 

 

13

 

 

 

 

 

43

 

 

 

14

 

 

 

 

 

42

 

 

 

15

 

 

1

2

 

41

 

16

 

 

 

 

 

 

 

 

 

40

 

 

 

17

 

 

 

 

 

38

 

 

 

19

 

 

 

 

 

37

 

 

 

20

 

 

 

 

 

36

 

 

 

21

 

 

 

 

 

34

 

 

 

23

 

 

 

 

 

33

 

 

 

24

 

 

 

 

 

31

 

 

 

26

 

 

 

 

 

30

 

 

 

27

 

 

 

 

 

 

 

 

 

SH00012

 

 

 

 

FUNCTION TABLE

 

 

INPUTS

OUTPUTS

 

OPERATING MODE

 

 

 

 

 

 

 

 

 

nOEx

 

nAx

nYx

 

 

 

 

 

 

 

 

 

 

 

 

L

 

L

L

 

Transparent

 

 

 

 

 

 

 

 

 

 

L

 

H

H

 

Transparent

 

 

 

 

 

 

 

 

 

 

H

 

X

Z

 

High impedance

X

=

Don't care

 

 

 

Z

=

High impedance ªoff º state

 

H

=

High voltage level

 

L

=

Low voltage level

 

1998 Feb 27

3

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