74ABT16825A
74ABTH16825A
18-bit buffer/line driver; non-inverting
(3-State)
Product specification
Supersedes data of 1995 Jul 14
IC23 Data Handbook
1998 Feb 25
INTEGRATED CIRCUITS
Philips Semiconductors Product specification
74ABT16825A
74ABTH16825A
18-bit buffer/line driver; non-inverting (3-State)
2
1998 Feb 25 853-1804 19018
FEA TURES
•Multiple V
CC
and GND pins minimize switching noise
•Live insertion/extraction permitted
•3-State output buffers
•Power-up 3-State
•74ABTH16825A incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
DESCRIPTION
The74ABT16825A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The74ABT16825A 18-bit buffers provide high performance bus
interface buffering for wide data/address paths or buses carrying
parity. They have NOR Output Enables (nOE
1, nOE2) for maximum
control flexibility.
Two options are available, 74ABT16825A which does not have the
bus-hold feature and 74ABTH16825A which incorporates the
bus-hold feature.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
nAx to nYx
CL = 50pF; VCC = 5V
1.8
1.4
ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
OUT
Output capacitance VO = 0V or VCC; 3-State 6 pF
I
CCZ
Outputs disabled; VCC = 5.5V 500 µA
I
CCL
Outputs Low; VCC = 5.5V 9 mA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-pin SSOP Type III –40°C to +85°C 74ABT16825A DL BT16825A DL SOT371-1
56-pin TSSOP Type II –40°C to +85°C 74ABT16825A DGG BT16825A DGG SOT364-1
56-pin SSOP Type III –40°C to +85°C 74ABTH16825A DL BH16825A DL SOT371-1
56-pin TSSOP Type II –40°C to +85°C 74ABTH16825A DGG BH16825A DGG SOT364-1
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
55, 54, 52, 51, 49, 48, 47, 45, 44,
41, 40, 38, 37, 36, 34, 33, 31, 30
1A0 – 1A9
2A0 – 2A9
Data inputs
2, 3, 5, 6, 8, 9, 10, 12, 13
16, 17, 19, 20, 21, 23, 24, 26, 27
1Y0 – 1Y9
2Y0 – 2Y9
Data outputs
1, 56
28, 29
1OE0, 1OE1
2OE0, 2OE1
Output enable inputs (active-Low)
4, 11, 14, 15, 18, 25, 32, 39, 42, 43, 46, 53 GND Ground (0V)
7, 22, 35, 50 V
CC
Positive supply voltage
Philips Semiconductors Product specification
74ABT16825A
74ABTH16825A
18-bit buffer/line driver; non-inverting (3-State)
1998 Feb 25
3
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE0
1Y0
1Y1
GND
1Y2
1Y3
1Y4
1Y5
GND
1Y6
1Y7
1Y8
2Y1
GND
V
CC
2Y2
V
CC
2Y0
2Y3
2Y7
2OE
0
2Y6
1OE
1
1A0
1A1
GND
1A2
1A3
1A4
1A5
GND
1A6
1A7
2A0
2A1
GND
2A3
V
CC
2A4
V
CC
2A2
2A5
GND
2A7
2OE1
2A6
SA00073
GND
GND
2Y4
28
27
26
25
49
50
51
52
53
54
55
56
2A8
GND
1A8
GND
2Y8
GND
2Y5
LOGIC SYMBOL (IEEE/IEC)
EN1
1 ∇
EN2
2 ∇
SA00074
1
56
28
29
55
54
52
51
49
48
47
45
44
41
40
38
37
36
34
33
31
30
2
3
5
6
8
9
10
12
13
16
17
19
20
21
23
24
26
27
&
&
1OE
0
2OE
0
1OE
1
1A0
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A3
2A4
2A2
2A5
2A7
2OE
1
2A6
2A8
1A8
1Y0
1Y1
1Y2
1Y3
1Y4
1Y5
1Y6
1Y7
1Y8
2Y1
2Y2
2Y0
2Y3
2Y7
2Y6
2Y4
2Y8
2Y5
LOGIC DIAGRAM
nA0
nY0
nOE
0
nA1
nY1
nA2
nY2
nA3
nY3
nA4
nY4
nA5
nY5
nA6
nY6
nA7
nY7
nA8
nY8
nOE1
SA00075