Philips 74abt h16652 DATASHEETS
INTEGRATED CIRCUITS
74ABT16652
74ABTH16652
16-bit transceiver/register, non-inverting
(3-State)
Product specification
Supersedes data of 1995 Aug 17
IC23 Data Handbook
1998 Feb 27
Philips Semiconductors Product specification
Quiescent supply current
16-bit transceiver/register, non-inverting (3-State)
FEA TURES
•Independent registers for A and B buses
•Multiple V
and GND pins minimize switching noise
CC
•Power-up 3-State
•74ABTH16652 incorporates bus-hold data inputs which eliminate
the need for external pull-up resistors to hold unused inputs
•Power-up reset
•Live insertion/extraction permitted
•Multiplexed real-time and stored data
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
QUICK REFERENCE DATA
SYMBOL PARAMETER
t
PLH
t
PHL
C
C
I
CCZ
I
CCL
IN
I/O
Propagation delay nAx to nBx CL = 50pF; VCC = 5V
Input capacitance VI = 0V or V
I/O capacitance VO = 0V or VCC; 3-State 7 pF
Outputs disabled; VCC =5.5V 500 µA
pp
Outputs low; VCC = 5.5V 8 mA
DESCRIPTION
The 74ABT16652 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT16652 transceiver/register consists of two sets of bus
transceiver circuits with 3-State outputs, D-type flip-flops, and
control circuitry arranged for multiplexed transmission of data
directly from the input bus or the internal registers. Data on the A or
B bus will be clocked into the registers as the appropriate clock pin
goes HIGH. Output Enable (nOEAB, (nOEBA
) pins are provided for bus management.
nSBA
Two options are available, 74ABT16652 which does not have the
bus-hold feature and 74ABTH16652 which incorporates the
bus-hold feature.
CONDITIONS
T
= 25°C; GND = 0V
amb
CC
74ABT16652
74ABTH16652
) and Select (nSAB,
TYPICAL UNIT
2.3
1.8
4 pF
ns
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16652 DL BT16652 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16652 DGG BT16652 DGG SOT364-1
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16652 DL BH16652 DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16652 DGG BH16652 DGG SOT364-1
LOGIC SYMBOL
2A7
2A6
2A5
2A4
2A3
2A2
2A1
2A0
28 29
2OEAB
2CPAB
2SAB
26 3127 30
2OEBA
2SBA
2CPBA
2B7
2B6
2B5
2B4
2B3
2B2
2B1
2B0
33
34
36
37
38
40
41
42
SH00047
156
14
1A7
1OEAB
13
1A6
12
1A5
10
1A4
1A3
9
1A2
8
1A1
6
1A0
5
1OEBA
1CPAB
1SAB
1SBA
1CPBA
354255
1B7
1B6
1B5
1B4
1B3
1B2
1B1
1B0
43
44
45
47
48
49
51
52
24
23
21
20
19
17
16
15
1998 Feb 27 853-1790 19026
2
Philips Semiconductors Product specification
16-bit transceiver/register, non-inverting (3-State)
PIN CONFIGURATION
1
1OEAB
2
1CPAB
3
1SAB
4
GND
5
1A0
6
1A1
7
V
CC
8
1A2
9
1A3
10
1A4
11
GND
12
1A5
13
1A6
14
1A7
15
2A0
16
2A1
17
2A2
18
GND
19
2A3
20
2A4
21
2A5
22
V
CC
23
2A6
24
2A7
GND
25
26
2SAB
27
2CPAB
28
20EAB
SH00046
1OE
56
BA
1CPBA
55
54
1SBA
53
GND
52
1B0
51
1B1
50
V
CC
49
1B2
48
1B3
47
1B4
46
GND
45
1B5
44
1B6
43
1B7
42
2B0
41
2B1
40
2B2
39
GND
38
2B3
37
2B4
36
2B5
35
V
CC
34
2B6
33
2B7
32
GND
31
2SBA
30
2CPBA
29
2OE
BA
LOGIC SYMBOL (IEEE/IEC)
1OEBA
1OEAB
1CPBA
1SBA
1CPAB
1SAB
2OEBA
2OEAB
2CPBA
2SBA
2CPAB
2SAB
1AO
1A1
1A2
1A3
1A4
1A5
1A6
1A7
2A0
2A1
2A2
2A3
2A4
2A5
2A6
2A7
74ABT16652
74ABTH16652
56
1
55
54
2
3
29
28
30
31
27
26
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
EN1 [BA]
EN2 [AB]
C3
G4
C5
G6
EN7 [BA]
EN8 [AB]
C9
G10
C11
G12
1
∇1
5D
16
1
∇7
11D 12
112
43D
1
4
1
6
10 9D
10 1
1
52
1B0
2∇
51
1B1
49
1B2
48
1B3
47
1B4
45
1B5
44
1B6
43
1B7
42
2B0
8∇
41
2B1
40
2B2
38
2B3
37
2B4
36
2B5
34
2B6
33
2B7
SH00045
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 55, 27, 30 1CPAB, 1CPBA, 2CPAB, 2CPBA Clock input A to B / Clock input B to A
3, 54, 26, 31 1SAB, 1SBA, 2SAB, 2SBA Select input A to B / Select input B to A
5, 6, 8, 9, 10, 12, 13, 14
15, 16, 17, 19, 20, 21, 23, 24
52, 51, 49, 48, 47, 45, 44, 43
42, 41, 40, 38, 37, 36, 34, 33
1, 56, 28, 29
4, 11, 18, 25, 32, 39, 46, 53 GND Ground (0V)
7, 22, 35, 50 V
1998 Feb 27
1A0 – 1A7,
2A0 – 2A7
1B0 – 1B7,
2B0 – 2B7
1OEAB, 1OEBA,
2OEAB, 2OEBA
CC
3
Data inputs/outputs (A side)
Data inputs/outputs (B side)
Output enable inputs
Positive supply voltage
Philips Semiconductors Product specification
16-bit transceiver/register, non-inverting (3-State)
LOGIC DIAGRAM
nOE
BA
nOEAB
nCPBA
nSBA
nCPAB
nSAB
1of 8 Channels
nA0
1D
C1
Q
74ABT16652
74ABTH16652
1D
C1
Q
nB0
nA1 nB1
nA2
nA3
nA4
nA5
nA6
nA7
DETAIL A X 7
nB2
nB3
nB4
nB5
nB6
nB7
SH00065
FUNCTION TABLE
INPUTS DATA I/O OPERATING MODE
nOEAB nOEBA nCPAB nCPBA nSAB
L
L
X
H
L
L
L
L
H
H
H
H
H
H
X
L
L
L
H
H
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
H L H or L H or L H H Output Output
H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
* The data output function may be enabled or disabled by various signals at the nOEBA
always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.
** If both Select controls (nSAB and nSBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must
be staggered in order to load both registers.
nSB
X
X
X
**
X
X
X
X
L
H
A
X
X
X
X
nAx nBx
Input Input
Input
X**Unspecified
output*
L
H
X
X
Output Input
Input Output
Unspecified
output*
Input
Isolation
Store A and B data
Store A, Hold B
Store A in both registers
Hold A, Store B
Store B in both registers
Real time B data to A bus
Stored B data to A bus
Real time A data to B bus
Store A data to B bus
Stored A data to B bus
Stored B data to A bus
and nOEAB inputs. Data input functions are
1998 Feb 27
4
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