Philips 74abt h16501a DATASHEETS
INTEGRATED CIRCUITS
74ABT16501A
74ABTH16501A
18-bit universal bus transceiver (3-State)
Product specification
Supersedes data of 1997 Jun 12
IC23 Data Handbook
1998 Feb 27
Philips Semiconductors Product specification
Quiescent supply current
18-bit universal bus transceiver (3-State)
FEA TURES
•18-bit bidirectional bus interface
•3-State buffers
•Output capability: +64mA/-32mA
•TTL input and output switching levels
•74ABTH16501A incorporates bus-hold data inputs which
eliminate the need for external pull-up resistors to hold unused
inputs
•Live insertion/extraction permitted
•Power-up reset
•Power-up 3-State
•Positive edge-triggered clock inputs
•Latch-up protection exceeds 500mA per JEDEC Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Flexible operation permits 18 embedded D-type latches or
flip-flops to operate in clocked, transparent, and latched modes.
QUICK REFERENCE DATA
SYMBOL PARAMETER
t
PLH
t
PHL
C
C
I
CCZ
I
CCL
IN
I/O
Propagation delay
An to Bn or Bn to An
Input capacitance (Control pins) VI = 0V or V
I/O pin capacitance Outputs disabled; V
pp
CL = 50pF;
VCC = 5V
Outputs disabled; VCC = 5.5V 500 µA
Outputs low; VCC = 5.5V 9 mA
74ABT16501A
74ABTH16501A
DESCRIPTION
The 74ABT16501A high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
This device is an 18-bit universal transceiver featuring non-inverting
3-State bus compatible outputs in both send and receive directions.
Data flow in each direction is controlled by output enable (OEAB and
OEBA
), latch enable (LEAB and LEBA), and clock (CPAB and
CPBA) inputs. For A-to-B data flow, the device operates in the
transparent mode when LEAB is High. When LEAB is Low, the A
data is latched if CPAB is held at a High or Low logic level. If LEAB
is Low, the A-bus data is stored in the latch/flip-flop on the
Low-to-High transition of CP AB. When OEAB is High, the outputs
are active. When OEAB is Low, the outputs are in the
high-impedance state.
Data flow for B-to-A is similar to that of A-to-B but uses OEBA
LEBA and CPBA. The output enables are complimentary (OEAB is
active High, and OEBA
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
Two options are available, 74ABT16501A which does not have the
bus-hold feature and 74ABTH16501A which incorporates the
bus-hold feature.
CONDITIONS
T
= 25°C; GND = 0V
amb
CC
= 0V or V
I/O
is active Low).
CC
TYPICAL UNIT
2.2
1.8
3 pF
7 pF
,
ns
ORDERING INFORMATION
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABT16501A DL BT16501A DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABT16501A DGG BT16501A DGG SOT364-1
56-Pin Plastic SSOP Type III –40°C to +85°C 74ABTH16501A DL BH16501A DL SOT371-1
56-Pin Plastic TSSOP Type II –40°C to +85°C 74ABTH16501A DGG BH16501A DGG SOT364-1
1998 Feb 27 853-1788 19027
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
2
Philips Semiconductors Product specification
18-bit universal bus transceiver (3-State)
LOGIC SYMBOL
1255272830
54
52
51
49
48
47
45
44
43
42
41
40
38
37
36
34
33
31
B0
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
LEBA
OEBA
CPBA
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
1 OEAB A-to-B Output enable input
27 OEBA B-to-A Output enable input
2, 28 LEAB/LEBA A-to-B/B-to-A Latch
55,30 CPAB/
3, 5, 6, 8, 9, 10, 12,
13, 14, 15, 16, 17,
19, 20, 21, 23, 24, 26
54, 52, 51, 49, 48,
47, 45, 44, 43, 42,
41, 40, 38, 37, 36,
34, 33, 31
4, 11, 18, 25, 32, 39,
46, 53
7, 22, 35, 50 V
CPBA
A0-A17
B0-B17
GND Ground (0V)
CC
OEAB
LEAB
CPAB
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
SA00127
(active low)
enable input
A-to-B/B-to-A Clock input
(active rising edge)
Data inputs/outputs
(A side)
Data inputs/outputs
(B side)
Positive supply voltage
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
PIN CONFIGURA TION
OEAB
1
LEAB
2
A0
3
4
GND
5
A1
6
A2
7
V
CC
8
A3
9
A4
10
A5
11
GND
12
A6
13
A7
14
A8
15
A9
16
A10
17
A11
18
GND GND
19
A12
20
A13
21
A14
22
V
CC
23
A15
24
A16
25
GND
26
A17
27
OEBA
28 29
LEBA
74ABT16501A
74ABTH16501A
56
GND
CPAB
55
B0
54
53
GND
B1
52
B2
51
50
V
CC
49
B3
48
B4
47
B5
46
GND
45
B6
44
B7
43
B8
42
B9
41
B10
40
B11
39
38
B12
37
B13
36
B14
35
V
CC
34
B15
33
B16
32
GND
31
B17
30
CPBA
GND
SA00128
1998 Feb 27
3
Philips Semiconductors Product specification
18-bit universal bus transceiver (3-State)
LOGIC SYMBOL (IEEE/IEC)
OEAB
CPAB
LEAB
OEBA
CPBA
LEBA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
1
55
2
27
30
28
3
5
6
8
9
10
12
13
14
15
16
17
19
20
21
23
24
26
EN1
2C3
C3
G2
EN4
5C6
C6
G5
3D 1 1
416D
54
B0
52
B1
51
B2
49
B3
48
B4
47
B5
45
B6
44
B7
43
B8
42
B9
41
B10
40
B11
38
B12
37
B13
36
B14
34
B15
33
B16
31
B17
74ABT16501A
74ABTH16501A
1998 Feb 27
SA00129
4
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