INTEGRATED CIRCUITS
74ABT162827A
74ABTH162827A
20-bit buffer/line driver, non-inverting, with 30 termination resistors (3-State)
Product specification |
1998 Feb 27 |
Supersedes data of 1997 Feb 26
IC23 Data Handbook
m n r
Philips Semiconductors |
Product specification |
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20-bit buffer/line driver, non-inverting, |
74ABT162827A |
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with 30 termination resistors (3-State) |
74ABTH162827A |
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FEATURES
•Multiple VCC and GND pins minimize switching noise
•Live insertion/extraction permitted
•3-State output buffers
•Power-up 3-State
•74ABTH162827A incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs
•Output capability: +64mA/-32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
DESCRIPTION
The 74ABT162827A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT162827A 20-bit buffers provide high performance bus interface buffering for wide data/address paths or buses carrying parity. They have NOR Output Enables (nOE1, nOE2) for maximum control flexibility.
The 74ABT162827A is designed with 30 series resistance in both the pull±up and pull±down output structures. This design reduces line noise in applications such as memory address drivers, clock drivers and bus receivers/transmitters.
Two options are available, 74ABT162827A which does not have the bus-hold feature and 74ABTH162827A which incorporates the bus-hold feature.
QUICK REFERENCE DATA
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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Tamb = 25°C; GND = 0V |
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tPLH |
Propagation delay |
CL = 50pF; VCC = 5V |
1.8 |
ns |
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tPHL |
nAx to nYx |
1.9 |
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CIN |
Input capacitance |
VI = 0V or VCC |
4 |
pF |
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COUT |
Output capacitance |
VO = 0V or VCC; 3-State |
6 |
pF |
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ICCZ |
Quiescent supply current |
Outputs disabled; VCC = 5.5V |
500 |
μA |
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ICCL |
Outputs Low; VCC = 5.5V |
9 |
mA |
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ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
DWG NUMBER |
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56-Pin Plastic SSOP Type III |
±40°C to +85°C |
74ABT162827A DL |
BT162827A DL |
SOT371-1 |
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56-Pin Plastic TSSOP Type II |
±40°C to +85°C |
74ABT162827A DGG |
BT162827A DGG |
SOT364-1 |
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56-Pin Plastic SSOP Type III |
±40°C to +85°C |
74ABTH162827A DL |
BH162827A DL |
SOT371-1 |
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56-Pin Plastic TSSOP Type II |
±40°C to +85°C |
74ABTH162827A DGG |
BH162827A DGG |
SOT364-1 |
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PIN DESCRIPTION
PIN NUMBER |
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SYMBOL |
FUNCTION |
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55, 54, 52, 51, 49, 48, 47, 45, 44, 43, |
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1A0 - 1A9 |
Data inputs |
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42, 41, 40, 38, 37, 36, 34, 33, 31, 30 |
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2A0 - 2A9 |
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2, 3, 5, 6, 8, 9, 10, 12, 13, 14, |
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1Y0 - 1Y9 |
Data outputs |
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15, 16, 17, 19, 20, 21, 23, 24, 26, 27 |
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2Y0 - 2Y9 |
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1, 56, |
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1OE0, 1OE1 |
Output enable inputs (active-Low) |
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28, 29 |
2OE0, 2OE1 |
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4, 11, 18, 25, 32, 39, 46, 53 |
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GND |
Ground (0V) |
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7, 22, 35, 50 |
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VCC |
Positive supply voltage |
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1998 Feb 27 |
2 |
853-1928 19025 |
Philips Semiconductors |
Product specification |
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20-bit buffer/line driver, non-inverting, |
74ABT162827A |
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with 30 termination resistors (3-State) |
74ABTH162827A |
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PIN CONFIGURATION
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1OE0 |
1 |
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56 |
1OE1 |
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1Y0 |
2 |
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55 |
1A0 |
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1Y1 |
3 |
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54 |
1A1 |
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GND |
4 |
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53 |
GND |
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1Y2 |
5 |
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52 |
1A2 |
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1Y3 |
6 |
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51 |
1A3 |
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VCC |
7 |
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50 |
VCC |
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1A4 |
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1Y4 |
8 |
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49 |
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1A5 |
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1Y5 |
9 |
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48 |
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1A6 |
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1Y6 |
10 |
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47 |
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GND |
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GND |
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11 |
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46 |
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1Y7 |
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1A7 |
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12 |
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45 |
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1Y8 |
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1A8 |
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13 |
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44 |
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1Y9 |
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1A9 |
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14 |
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43 |
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2Y0 |
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2A0 |
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15 |
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42 |
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2Y1 |
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2A1 |
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16 |
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41 |
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2Y2 |
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2A2 |
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17 |
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40 |
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GND |
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GND |
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18 |
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39 |
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2Y3 |
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2A3 |
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19 |
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38 |
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2Y4 |
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2A4 |
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20 |
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37 |
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2Y5 |
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2A5 |
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21 |
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36 |
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VCC |
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VCC |
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22 |
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35 |
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2Y6 |
23 |
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34 |
2A6 |
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2Y7 |
24 |
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33 |
2A7 |
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GND |
25 |
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32 |
GND |
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2Y8 |
26 |
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31 |
2A8 |
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2Y9 |
27 |
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30 |
2A9 |
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2OE0 |
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28 |
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29 |
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2OE1 |
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SH00010 |
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LOGIC SYMBOL
55 |
54 |
52 |
51 |
49 |
48 |
47 |
45 |
44 |
43 |
1A0 1A1 1A2 1A3 1A4 1A5 1A6 1A7 1A8 1A9
1 
1OE0
56 
1OE1
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6 1Y7 1Y8 1Y9
2 |
3 |
5 |
6 |
8 |
9 |
10 |
12 |
13 |
14 |
42 |
41 |
40 |
38 |
37 |
36 |
34 |
33 |
31 |
30 |
2A0 2A1 2A2 2A3 2A4 2A5 2A6 2A7 2A8 2A9
28
2OE0
29
2OE1
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6 2Y7 2Y8 2Y9
15 |
16 |
17 |
19 |
20 |
21 |
23 |
24 |
26 |
27 |
SH00011
LOGIC SYMBOL (IEEE/IEC)
1 |
& |
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56 |
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EN1 |
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28 |
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& |
EN2 |
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29 |
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55 |
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1 |
1 |
2 |
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54 |
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3 |
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52 |
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5 |
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51 |
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6 |
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49 |
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8 |
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48 |
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9 |
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47 |
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10 |
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45 |
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12 |
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44 |
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13 |
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43 |
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14 |
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42 |
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15 |
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1 |
2 |
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41 |
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16 |
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40 |
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17 |
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38 |
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19 |
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37 |
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20 |
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36 |
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21 |
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34 |
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23 |
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33 |
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24 |
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31 |
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26 |
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30 |
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27 |
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SH00012 |
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FUNCTION TABLE
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INPUTS |
OUTPUTS |
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OPERATING MODE |
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nOEx |
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nAx |
nYx |
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L |
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L |
L |
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Transparent |
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L |
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H |
H |
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Transparent |
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H |
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X |
Z |
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High impedance |
X |
= |
Don't care |
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Z |
= |
High impedance ªoff º state |
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H |
= |
High voltage level |
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L |
= |
Low voltage level |
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1998 Feb 27 |
3 |
Philips Semiconductors |
Product specification |
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20-bit buffer/line driver, non-inverting, |
74ABT162827A |
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with 30 termination resistors (3-State) |
74ABTH162827A |
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SCHEMATIC OF Y OUTPUTS
VCC
27Ω
OUTPUT
27Ω
GND
SA00042
LOGIC DIAGRAM
nA0 |
nA1 |
nA2 |
nA3 |
nA4 |
nA5 |
nA6 |
nA7 |
nA8 |
nA9 |
nOE0 |
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nOE1 |
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nY0 |
nY1 |
nY2 |
nY3 |
nY4 |
nY5 |
nY6 |
nY7 |
nY8 |
nY9 |
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SH00013 |
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage |
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±0.5 to +7.0 |
V |
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IIK |
DC input diode current |
VI < 0 |
±18 |
mA |
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VI |
DC input voltage3 |
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±1.2 to +7.0 |
V |
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IOK |
DC output diode current |
VO < 0 |
±50 |
mA |
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V |
DC output voltage3 |
Output in Off or High state |
±0.5 to +5.5 |
V |
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OUT |
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IOUT |
DC output current |
Output in Low state |
128 |
mA |
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Output in High state |
±64 |
mA |
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Tstg |
Storage temperature range |
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±65 to 150 |
°C |
NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Feb 27 |
4 |
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