Philips 74ABTH16273DL, 74ABTH16273DGG, 74ABT16273DL, 74ABT16273DGG Datasheet

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74ABT16273

74ABTH16273

16-bit D-type flip-flop

Product specification

1998 Feb 27

Supersedes data of 1995 Sep 28

IC23 Data Handbook

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	Philips Semiconductors	Product specification
	16-bit D-type flip-flop	74ABT16273
		74ABTH16273

FEATURES

•16-bit D-type edge triggered flip-flops

•Output capability: +64mA/±32mA

•TTL input and output switching levels

•Live insertion/extraction permitted

•Power-up reset

•74ABTH16273 incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs

•Latch-up protection exceeds 500mA per JEDEC Std 17

•ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model

DESCRIPTION

The 74ABT16273 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

This part is a 16-bit edge triggered D-type flip-flop with non-inverting high drive outputs. This device can be used as two 8-bit flip-flops or one 16-bit flip-flop. When the clock (CP) goes High, the data on the

D inputs is stored and the Q outputs display the stored data.

This device also features a master reset (MR) that resets all

flip-flops to the Low state when MR is set to the Low state.

Two options are available, 74ABT16273 which does not have the bus-hold feature and 74ABTH16273 which incorporates the bus-hold feature.

QUICK REFERENCE DATA

	SYMBOL	PARAMETER	CONDITIONS	TYPICAL	UNIT
			Tamb = 25°C; GND = 0V
	tPLH	Propagation delay	CL = 50pF;	2.5	ns
	tPHL	An to Bn or Bn to An	VCC = 5.0V	2.0
	CIN	Input capacitance	VI = 0V or VCC	4	pF
	ICCH	Quiescent supply current	Outputs High; VCC = 5.5V	200	μA
	ICCL		Outputs low; VCC = 5.5V	8	mA

ORDERING INFORMATION

PACKAGES	TEMPERATURE RANGE	OUTSIDE NORTH AMERICA	NORTH AMERICA	DWG NUMBER
48-Pin Plastic SSOP Type III	±40°C to +85°C	74ABT16273 DL	BT16273 DL	SOT370-1
48-Pin Plastic TSSOP Type II	±40°C to +85°C	74ABT16273 DGG	BT16273 DGG	SOT362-1
48-Pin Plastic SSOP Type III	±40°C to +85°C	74ABTH16273 DL	BH16273 DL	SOT370-1
48-Pin Plastic TSSOP Type II	±40°C to +85°C	74ABTH16273 DGG	BH16273 DGG	SOT362-1

LOGIC SYMBOL																				PIN DESCRIPTION
																				PIN NUMBER	SYMBOL					NAME AND
	47			46		44		43		41		40		38		37										FUNCTION
																										Master reset input
																				1, 24	1MR, 2MR
																										(active-Low)
		1D0 1D1 1D2 1D3								1D4 1D5 1D6 1D7
																				2, 3, 5, 6, 8, 9, 11, 12,13,	1Q0-1Q7
48		CP																								Data outputs
																				14, 16, 17, 19, 20, 22, 23	2Q0-2Q7
1		MR
																				47, 46, 44, 43, 41, 40, 38, 37,	1D0-1D7					Data inputs
		1Q0 1Q1 1Q2 1Q3 1Q4 1Q5 1Q6 1Q7
																				36, 35, 33, 32, 30, 29, 27, 26	2D0-2D7
																				25, 48	1CP, 2CP					Clock pulse input
	2			3		5		6		8		9		11		12										(active rising edge)
																				4, 10, 15, 21, 28, 34, 39, 45		GND				Ground (0V)
	36			35		33		32		30		29		27		26
																				7, 18, 31, 42		VCC				Positive supply
																										voltage
		2D0 2D21 2D2 2D3								2D4 2D5 2D6 2D7
25		CP
24		MR
		2Q0 2Q1 2Q2 2Q3								2Q4 2Q5 2Q6 2Q7
	13			14		16		17		19		20		22		23
														SH00052

1998 Feb 27

2

853-1793 19027

Philips Semiconductors	Product specification

16-bit D-type flip-flop

74ABT16273

74ABTH16273

LOGIC SYMBOL (IEEE/IEC)

					1
						R1
	1MR
		CP			48	C1
					24
	2MR					R2
	2CP				25	C2
					47				2
	1D0					1D		1			1Q0
					46					3
	1D1										!Q1
					44				5
	1D2										1Q2
					43					6
	1D3										1Q3
					41				8
	1D4										1Q4
					40					9
	1D5										1Q5
					38				11
	1D6										1Q6
					37				12
	1D7										1Q7
					36				13
	2D0					2D		2			2Q0
					35				14
	2D1										2Q1
					33					16
	2D2										2Q2
					32				17
	2D3										2Q3
					30				19
	2D4										2Q4
					29					20
	2D5										2Q5
					27					22
	2D6										2Q6
					26				23
	2D7										2Q7
											SH00053

FUNCTION TABLE

			Inputs		Output	operating
						mode
			nCP	nDX	nQ0-nQ7
nMR
	L		X	X	L	Reset (clear)
	H		↑	h	H	Load ª1º
	H		↑	I	L	Load ª0º
	H		L	X	Q0	Retain state

PIN CONFIGURATION

1MR					1			48			CP
1Q0											1D0
					2				47
!Q1											1D1
					3				46
GND											GND
					4				45
1Q2											1D2
					5				44
1Q3											1D3
					6				43
VCC					7				42		VCC
1Q4					8				41		1D4
1Q5											1D5
					9				40
GND											GND
					10				39
1Q6											1D6
					11				38
1Q7											1D7
					12				37
2Q0											2D0
					13				36
2Q1											2D1
					14			35
GND											GND
					15				34
2Q2					16			33			2D2
2Q3											2D3
					17			32
VCC					18			31			VCC
2Q4											2D4
					19			30
2Q5											2D5
					20				29
GND					21				28		GND
2Q6					22				27		2D6
2Q7					23				26		2D7
2MR					24			25			2CP
							SH00054

H = High voltage level

h= high voltage level one set-up time prior to the Low-to-High clock transition

L	=	Low voltage level
I	=	Low voltage level one set-up time prior to the Low-to-High
		clock transition
X	=	Don't care
↑	=	Low-to-High clock transition
Q0 =		Output as it was

1998 Feb 27

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