INTEGRATED CIRCUITS
74ABT863
9-bit bus transceiver (3-State)
Product specification |
1998 Jan 16 |
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Supersedes data of 1993 Jun 21 |
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IC23 Data Handbook |
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m n r
Philips Semiconductors |
Product specification |
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9-bit bus transceiver (3-State) |
74ABT863 |
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FEATURES
•Provides high performance bus interface buffering for wide data/address paths or buses carrying parity
•Buffered control inputs for light loading, or increased fan-in as required with MOS microprocessors
•Output capability: +64mA/±32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200 V per Machine Model
•Power-up 3-State
•Live insertion/extraction permitted
•Inputs are disabled during 3-State mode
DESCRIPTION
The 74ABT863 bus transceiver provides high performance bus interface buffering for wide data/address paths of buses carrying parity.
The 74ABT863 9-bit bus transceiver has NOR-ed transmit and receive output enables for maximum control flexibility.
QUICK REFERENCE DATA
SYMBOL |
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
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Tamb = 25°C; GND = 0V |
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tPLH |
Propagation delay |
CL = 50pF; VCC = 5V |
3.3 |
ns |
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tPHL |
An to Bn or Bn to An |
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CIN |
Input capacitance |
VI = 0V or VCC |
4 |
pF |
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CI/O |
I/O capacitance |
Outputs disabled; VO = 0V or VCC |
7 |
pF |
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ICCZ |
Total supply current |
Outputs disabled; VCC = 5.5V |
110 |
μA |
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
DWG NUMBER |
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24-Pin Plastic DIP |
±40°C to +85°C |
74ABT863 N |
74ABT863 N |
SOT222-1 |
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24-Pin plastic SO |
±40°C to +85°C |
74ABT863 D |
74ABT863 D |
SOT137-1 |
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24-Pin Plastic SSOP Type II |
±40°C to +85°C |
74ABT863 DB |
74ABT863 DB |
SOT340-1 |
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24-Pin Plastic TSSOP Type I |
±40°C to +85°C |
74ABT863 PW |
74ABT863PW DH |
SOT355-1 |
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PIN CONFIGURATION |
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PIN DESCRIPTION |
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PIN NUMBER |
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SYMBOL |
FUNCTION |
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Output enable inputs |
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24 |
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14, 13 |
OEAB0, OEAB1 |
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OEBA0 |
1 |
VCC |
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(active-Low) |
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A0 |
2 |
23 |
B0 |
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2, 3, 4, 5, |
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A0-A8 |
Data inputs/outputs (A |
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A1 |
3 |
22 |
B1 |
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6, 7, 8, 9, 10 |
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side) |
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A2 |
4 |
21 |
B2 |
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23, 22, 21, 20, |
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B0-B8 |
Data inputs/outputs (B |
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19, 18, 17, 16, 15 |
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A3 |
5 |
20 |
B3 |
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Output enable inputs |
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A4 |
6 |
19 |
B4 |
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1, 11 |
OEBA0, OEBA1 |
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(active-Low) |
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TOP VIEW |
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A5 |
7 |
18 |
B5 |
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12 |
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GND |
Ground (0V) |
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A6 |
8 |
17 |
B6 |
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24 |
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VCC |
Positive supply voltage |
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A7 |
9 |
16 |
B7 |
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A8 |
10 |
15 |
B8 |
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11 |
14 |
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OEBA1 |
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OEAB0 |
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GND |
12 |
13 |
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OEAB1 |
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SA00283 |
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1998 Jan 16 |
2 |
853±1622 18869 |
Philips Semiconductors |
Product specification |
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9-bit bus transceiver (3-State) |
74ABT863 |
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LOGIC SYMBOL |
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LOGIC SYMBOL (IEEE/IEC) |
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1 |
& |
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11 |
EN1(BA) |
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2 |
3 |
4 |
5 |
6 |
7 |
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9 |
10 |
14 |
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13 |
& |
EN2(AB) |
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A0 |
A1 |
A2 |
A3 |
A4 |
A5 |
A6 |
A7 |
A8 |
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1 |
OEBA0 |
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2 |
1 |
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23 |
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11 |
OEBA1 |
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2 |
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14 |
OEAB0 |
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3 |
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22 |
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13 |
OEAB1 |
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4 |
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21 |
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B0 |
B1 |
B2 |
B3 |
B4 |
B5 |
B6 |
B7 |
B8 |
5 |
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20 |
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6 |
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19 |
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7 |
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18 |
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23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
8 |
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17 |
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9 |
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16 |
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10 |
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15 |
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SA00284 |
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SA00285 |
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FUNCTION TABLE |
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LOGIC DIAGRAM |
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INPUTS |
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OPERATING |
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MODE |
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OEAB0 |
OEAB1 |
OEBA0 |
OEBA1 |
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L |
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L |
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H |
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X |
A data to B bus |
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L |
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L |
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X |
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H |
A data to B bus |
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H |
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X |
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L |
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L |
B data to A bus |
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X |
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H |
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L |
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L |
B data to A bus |
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H |
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H |
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H |
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H |
Z |
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H |
= |
High voltage level |
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L |
= |
Low voltage level |
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X |
= |
Don't care |
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Z |
= |
High impedance ªoffº state |
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OEAB0
OEAB1
9 |
9 |
An |
Bn |
OEBA0
OEBA1
SA00286
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
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VCC |
DC supply voltage |
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±0.5 to +7.0 |
V |
IIK |
DC input diode current |
VI < 0 |
±18 |
mA |
VI |
DC input voltage3 |
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±1.2 to +7.0 |
V |
IOK |
DC output diode current |
VO < 0 |
±50 |
mA |
V |
DC output voltage3 |
output in Off or High state |
±0.5 to +5.5 |
V |
OUT |
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IOUT |
DC output current |
output in Low state |
128 |
mA |
Tstg |
Storage temperature range |
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±65 to 150 |
°C |
NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jan 16 |
3 |
Philips Semiconductors |
Product specification |
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9-bit bus transceiver (3-State) |
74ABT863 |
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RECOMMENDED OPERATING CONDITIONS
SYMBOL |
PARAMETER |
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LIMITS |
UNIT |
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Min |
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Max |
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VCC |
DC supply voltage |
4.5 |
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5.5 |
V |
VI |
Input voltage |
0 |
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VCC |
V |
VIH |
High-level input voltage |
2.0 |
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V |
VIL |
Low-level Input voltage |
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0.8 |
V |
IOH |
High-level output current |
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±32 |
mA |
IOL |
Low-level output current |
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64 |
mA |
t/ v |
Input transition rise or fall rate |
0 |
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5 |
ns/V |
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Tamb |
Operating free-air temperature range |
±40 |
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+85 |
°C |
DC ELECTRICAL CHARACTERISTICS
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LIMITS |
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SYMBOL |
PARAMETER |
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TEST CONDITIONS |
Tamb = +25°C |
Tamb = ±40°C |
UNIT |
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to +85°C |
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Min |
Typ |
Max |
Min |
Max |
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VIK |
Input clamp voltage |
VCC = 4.5V; IIK = ±18mA |
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±0.9 |
±1.2 |
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±1.2 |
V |
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VCC = 4.5V; IOH = ±3mA; VI = VIL or VIH |
2.5 |
3.2 |
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2.5 |
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V |
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VOH |
High-level output voltage |
VCC = 5.0V; IOH = ±3mA; VI = VIL or VIH |
3.0 |
3.7 |
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3.0 |
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V |
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VCC = 4.5V; IOH = ±32mA; VI = VIL or VIH |
2.0 |
2.3 |
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2.0 |
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V |
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VOL |
Low-level output voltage |
VCC = 4.5V; IOL = 64mA; VI = VIL or VIH |
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0.42 |
0.55 |
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0.55 |
V |
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II |
Input leakage |
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Control pins |
VCC = 5.5V; VI = GND or 5.5V |
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±0.01 |
±1.0 |
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±1.0 |
μA |
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current |
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Data pins |
VCC = 5.5V; VI = GND or 5.5V |
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±5 |
±100 |
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±100 |
μA |
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IOFF |
Power-off leakage current |
VCC = 0.0V; VO or VI ≤ 4.5V |
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±5.0 |
±100 |
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±100 |
μA |
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IPU/PD |
Power-up/down 3-State |
VCC = 2.0V; VO = 0.5V; VI = GND or VCC; = |
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±5.0 |
±50 |
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±50 |
μA |
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output current3 |
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V OE= Don't care |
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IIH + IOZH |
3-State output High current |
VCC = 5.5V; VO = 2.7V; VI = VIL or VIH |
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5.0 |
50 |
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50 |
μA |
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IIL + IOZL |
3-State output Low current |
VCC = 5.5V; VO = 0.5V; VI = VIL or VIH |
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±5.0 |
±50 |
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±50 |
μA |
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ICEX |
Output high leakage current |
VCC = 5.5V; VO = 5.5V; VI = GND or VCC |
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5.0 |
50 |
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50 |
μA |
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I |
Output current1 |
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V |
= 5.5V; V = 2.5V |
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±50 |
±63 |
±180 |
±50 |
±180 |
mA |
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O |
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CC |
O |
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ICCH |
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VCC = 5.5V; Outputs High, VI = GND or VCC |
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110 |
250 |
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250 |
μA |
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ICCL |
Quiescent supply current |
VCC = 5.5V; Outputs Low, VI = GND or VCC |
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25 |
38 |
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38 |
mA |
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ICCZ |
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VCC = 5.5V; Outputs 3±State; |
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110 |
250 |
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250 |
μA |
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VI = GND or VCC |
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Outputs enabled, one input at 3.4V, |
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0.5 |
1.5 |
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1.5 |
mA |
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other inputs at VCC or GND; VCC = 5.5V |
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ICC |
Additional supply current per |
Outputs 3-State, one data input at 3.4V, |
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110 |
250 |
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250 |
μA |
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input pin2 |
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other inputs at V |
CC |
or GND; V |
= 5.5V |
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CC |
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Outputs 3-State, one enable input at 3.4V, |
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0.5 |
1.5 |
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1.5 |
mA |
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other inputs at VCC or GND; VCC = 5.5V |
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NOTES:
1.Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
2.This is the increase in supply current for each input at 3.4V.
3.This parameter is valid for any VCC between 0V and 2.1V, with a transition time of up to 10msec. From VCC = 2.1V to VCC = 5V ± 10%, a transition time of up to 100μsec is permitted.
1998 Jan 16 |
4 |
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