Philips 74ABT823PW, 74ABT823N, 74ABT823DB, 74ABT823D Datasheet

Philips Semiconductors Product specification

9-bit D-type flip-flop with reset and enable
(3-State)

FEA TURES

•High speed parallel registers with positive edge-triggered D-type

flip-flops

•Ideal where high speed, light loading, or increased fan-in are

required with MOS microprocessors

•Output capability: +64mA/–32mA

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

•Power-up 3-State

•Power-up Reset

QUICK REFERENCE DAT A

SYMBOL PARAMETER

C

t

PLH

t

PHL

C

OUT

I

CCZ

IN

Propagation delay
CP to Qn

CL = 50pF; VCC = 5V 4.4 ns

Input capacitance VI = 0V or V

Output capacitance

Outputs disabled;

= 0V or V

V

O

Total supply current Outputs disabled; VCC =5.5V 500 nA

74ABT823

DESCRIPTION

The 74ABT823 Bus interface Register is designed to eliminate the
extra packages required to buffer existing registers and provide
extra data width for wider data/address paths of buses carrying
parity.

The 74ABT823 is a 9-bit wide buffered register with Clock Enable
(CE

) and Master Reset (MR) which are ideal for parity bus

interfacing in high microprogrammed systems.
The register is fully edge-triggered. The state of each D input, one

set-up time before the Low-to-High clock transition is transferred to
the corresponding flip-flop’s Q output.

CONDITIONS
= 25°C; GND = 0V

T

amb

CC

CC

TYPICAL UNIT

4 pF

7 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic DIP –40°C to +85°C 74ABT823 N 74ABT823 N SOT222-1
24-Pin plastic SO –40°C to +85°C 74ABT823 D 74ABT823 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT823 DB 74ABT823 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT823 PW 74ABT823PW DH SOT355-1

PIN CONFIGURA TION

1

OE

2

D0

3

D1

4

D2

5

D3

6

D4

7

D5

8

D6

9

D7 Q7

10 15

D8

11 14MR
12 13GND

TOP VIEW

24

V

CC

Q0

23

Q1

22

Q2

21

Q3

20

Q4

19

Q5

18

Q6

17
16

Q8
CE
CP

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

1 OE

2, 3, 4, 5, 6,

7, 8, 9, 10

23, 22, 21, 20,

19,18, 17, 16, 15

D0-D8 Data inputs

Q0-Q8 Data outputs

13 CP

14 CE

11 MR
12 GND Ground (0V)

24 V

CC

Output enable input
(active-Low)

Clock pulse input (active
rising edge)

Clock enable input
(active-Low)

Master reset input
(active-Low)

Positive supply voltage

SA00227

1995 Sep 06 853–1617 15703

1

Philips Semiconductors Product specification

9-bit D-type flip-flop with reset and enable
(3-State)

LOGIC SYMBOL

2345678910

D0 D1 D2 D3 D4 D5 D6 D7 D8

13

CP

14

CE

11

MR

1

OE

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8

23 22 21 20 19 18 17 16 15

SA00228

LOGIC SYMBOL (IEEE/IEC)

1
11
14
13

10 15

EN
R
G1

1C2

223

2D

322
421
520
619
718
817
916

74ABT823

SA00229

FUNCTION TABLE

INPUTS OUTPUTS OPERATING MODE

OE MR CE CP Dn Q0 – Q8

L L X X X L Clear
L H L ↑ h H Load and read data
L H L ↑ l L
L H H ↑ X NC Hold

H X X X X Z High impedance

H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High

clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High

NC = No change
X = Don’t care
Z = High impedance “off” state

↑ = Low to High clock transition
↑

clock transition

LOGIC DIAGRAM

14

CE

CP

D0

13

D

RQ

D1

2

CP CP CP CP CP CP CP CP CP

3

D

RQ

D2

4

D

RQ

D3

5

D

RR Q

= Not a Low-to-High clock transition

D4

D

RQ

6

D5

D

RQ

7

D6

8

D

RQ

D7

9

D

RQ

D8

10

D

RQ

1995 Sep 06

MR

OE

11

1

23

Q0

Q1

22

Q2

21

Q3

20

Q4

19

Q5

18

Q6

17

Q7

16

15

Q8

SA00230

2

Philips Semiconductors Product specification

9-bit D-type flip-flop with reset and enable
(3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

I

V

I
V

I

OK

OUT

OUT

T

CC

IK

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage

I

DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the

device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction

temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

PARAMETER CONDITIONS RATING UNIT

3

3

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT

V

CC

V
V
V
I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 5 ns/V

T

amb

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

1, 2

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

Min Max

74ABT823

CC

V

1995 Sep 06

3