Philips 74ABT648PW, 74ABT648N, 74ABT648DB, 74ABT648D Datasheet

INTEGRATED CIRCUITS

74ABT648

Octal transceiver/register, inverting (3-State)

Product specification

1998 Jun 08

Supersedes data of 1995 Apr 17

IC23 Data Handbook

m n r

Philips Semiconductors	Product specification
Octal bus transceiver/register, inverting (3-State)	74ABT648

FEATURES

•Combines 74ABT245 and 74ABT374 type functions in one device

•Independent registers for A and B buses

•Multiplexed real-time and stored data

•Output capability: +64mA/±32mA

•Power-up 3-state

•Power-up reset

•Live insertion/extraction permitted

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model

DESCRIPTION

The 74ABT648 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.

The 74ABT648 transceiver/register consists of bus transceiver circuits with inverting 3-State outputs, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or the internal registers. Data on the A or B bus will be clocked into the registers as the appropriate clock pin goes High. Output Enable (OE) and DIR pins are provided to control the transceiver function. In the transceiver mode, data present at the high impedance port may be stored in either the A or B register or both.

The Select (SAB, SBA) pins determine whether data is stored or transferred through the device in real±time. The DIR determines which bus will receive data when the OE is active (Low). In the isolation mode (OE = High), data from Bus A may be stored in the B register and/or data from Bus B may be stored in the A register. Outputs from real-time, or stored registers will be inverted. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses,

A or B may be driven at a time. The examples on the next page demonstrate the four fundamental bus management functions that can be performed with the 74ABT648.

QUICK REFERENCE DATA

	SYMBOL			PARAMETER	CONDITIONS	TYPICAL	UNIT
					Tamb = 25°C; GND = 0V
	tPLH	Propagation delay			CL = 50pF; VCC = 5V	5.9	ns
	tPHL	An to Bn or Bn to An
	CIN	Input capacitance			VI = 0V or VCC	4	pF
		CP, S,	OE,	DIR
	CI/O	I/O capacitance			Outputs disabled;	7	pF
					VO = 0V or VCC
	ICCZ	Total supply current			Outputs disabled; VCC =5.5V	110	μA

ORDERING INFORMATION

PACKAGES	TEMPERATURE RANGE	OUTSIDE NORTH AMERICA	NORTH AMERICA	DWG NUMBER
24-Pin Plastic DIP	±40°C to +85°C	74ABT648 N	74ABT648 N	SOT222-1
24-Pin plastic SO	±40°C to +85°C	74ABT648 D	74ABT648 D	SOT137-1
24-Pin Plastic SSOP Type II	±40°C to +85°C	74ABT648 DB	74ABT648 DB	SOT340-1
24-Pin Plastic TSSOP Type I	±40°C to +85°C	74ABT648 PW	74ABT648PW DH	SOT355-1

PIN CONFIGURATION						PIN DESCRIPTION
						PIN NUMBER	SYMBOL			FUNCTION
CPAB	1	24	VCC
						1, 23	CPAB /			A to B clock input / B to A clock
SAB	2	23	CPBA				CPBA			input
DIR	3	22	SBA			2, 22	SAB / SBA			A to B select input / B to A select
										input
A0	4	21
			OE
						3	DIR			Direction control input
A1	5	20	B0
A2	6	19	B1			4, 5, 6, 7,	A0 ± A7			Data inputs/outputs (A side)
						8, 9, 10, 11
A3	7	18	B2
						20, 19, 18, 17,	B0 ± B7			Data inputs/outputs (B side)
A4	8	17	B3
						16, 15, 14, 13
A5	9	16	B4
						21		OE		Output enable input (active-Low)
A6	10	15	B5			12	GND			Ground (0V)
A7	11	14	B6
						24	VCC			Positive supply voltage
GND	12	13	B7
		SA00082

1998 Jun 08

2

853±1613 19516

Philips Semiconductors	Product specification
Octal bus transceiver/register, inverting (3-State)	74ABT648

LOGIC SYMBOL

LOGIC SYMBOL (IEEE/IEC)

4

5

6

7

8

9

10

11

A0 A1 A2 A3 A4 A5 A6 A7

1CPAB

2SAB

3DIR

23	CPBA
22	SBA
21	OE
	B0	B1	B2	B3	B4	B5	B6	B7
	20	19	18	17	16	15	14	13

SA00083

21				G3
				3EN1 [BA]
3				3EN2 [AB]
22				G6
2				G7
23				C4
1				C5

4	≥ 1		6	4D	20
	1
			6 1
	5D	7	≥ 1	2
	1	7
					19
	5
	6				18
	7				17
	8				16
	9				15
	10				14
	11				13
					SA00156

REAL TIME BUS TRANSFER

REAL TIME BUS TRANSFER

STORAGE FROM

TRANSFER STORED DATA

BUS B TO BUS A

BUS A TO BUS B

A, B, OR A AND B

TO A OR B

}

}

}

}

DIR CPAB CPBA SAB

SBA

DIR CPAB CPBA SAB

SBA

DIR CPAB CPBA SAB

SBA

DIR CPAB CPBA SAB

SBA

OE

OE

OE

OE

L

L

X

X

X

L

L

H

X

X

L

X

L

H

↑

X

L

X

L

L

H H or L X

H

L

X

X

↑

X

X

L

H H or L X

H

X

H

X

↑

↑

X

X

SA00177

1998 Jun 08

3

Philips Semiconductors	Product specification
Octal bus transceiver/register, inverting (3-State)	74ABT648

FUNCTION TABLE

INPUTS

DATA I/O

OPERATING MODE

DIR

CPAB

CPBA

SAB

SBA

An

Bn

OE

X

X

↑

X

X

X

Input

Unspecified

Store A, B unspecified

output*

X

X

X

↑

X

X

Unspecified

Input

Store B, A unspecified

output*

H

X

↑

↑

X

X

Input

Input

Store A and B data

H

X

H or L

H or L

X

X

Isolation, hold storage

L

L

X

X

X

L

Real time

data to A bus

Output

Input

B

L

L

X

H or L

X

H

Stored B data to A bus

L

H

X

X

L

X

Real time

data to B bus

Input

Output

A

L

H

H or L

X

H

X

Stored A data to B bus

H

=

High voltage level

L

=

Low voltage level

X

=

Don't care

↑

=

Low-to-High clock transition

*The data output function may be enabled or disabled by various signals at the OE input. Data input functions are always enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.

LOGIC DIAGRAM

OE 21

DIR	3
23
CPBA
SBA 22
CPAB	1
SAB	2
	1of 8 Channels
	1D
	C1
	Q
4	20
A0	B0
	1D
	C1
	Q

	A1	5		19	B1
		6		18
	A2				B2
		7		17
	A3				B3
		8	DETAIL A X 7	16
	A4				B4
		9		15
	A5				B5
		10		14
	A6				B6
		11		13
	A7				B7

SA00081

1998 Jun 08

4

Philips Semiconductors	Product specification
Octal bus transceiver/register, inverting (3-State)	74ABT648

ABSOLUTE MAXIMUM RATINGS1, 2

SYMBOL	PARAMETER	CONDITIONS	RATING	UNIT
VCC	DC supply voltage		±0.5 to +7.0	V
IIK	DC input diode current	VI < 0	±18	mA
VI	DC input voltage3		±1.2 to +7.0	V
IOK	DC output diode current	VO < 0	±50	mA
V	DC output voltage3	output in Off or High state	±0.5 to +5.5	V
OUT
IOUT	DC output current	output in Low state	128	mA
Tstg	Storage temperature range		±65 to 150	°C

NOTES:

1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL	PARAMETER		LIMITS		UNIT
		Min		Max
VCC	DC supply voltage	4.5		5.5	V
VI	Input voltage	0		VCC	V
VIH	High-level input voltage	2.0			V
VIL	Low-level Input voltage			0.8	V
IOH	High-level output current			±32	mA
IOL	Low-level output current			64	mA
t/ v	Input transition rise or fall rate	0		10	ns/V
Tamb	Operating free-air temperature range	±40		+85	°C

1998 Jun 08

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