Philips 74ABT648PW, 74ABT648N, 74ABT648DB, 74ABT648D Datasheet

INTEGRATED CIRCUITS

74ABT648

Octal transceiver/register, inverting
(3-State)

Product specification
Supersedes data of 1995 Apr 17
IC23 Data Handbook

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1998 Jun 08

Philips Semiconductors Product specification

74ABT648Octal bus transceiver/register, inverting (3-State)

FEA TURES

•Combines 74ABT245 and 74ABT374 type functions in one device

•Independent registers for A and B buses

•Multiplexed real-time and stored data

•Output capability: +64mA/–32mA

•Power-up 3-state

•Power-up reset

•Live insertion/extraction permitted

•Latch-up protection exceeds 500mA per Jedec Std 17

•ESD protection exceeds 2000 V per MIL STD 883 Method 3015

and 200 V per Machine Model

DESCRIPTION

The 74ABT648 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.

QUICK REFERENCE DATA

SYMBOL PARAMETER

t

PLH

t

PHL

C

C

I

CCZ

IN

I/O

Propagation delay
An to Bn or Bn to An

Input capacitance
CP, S, OE, DIR

I/O capacitance
Total supply current Outputs disabled; VCC =5.5V 110 µA

The 74ABT648 transceiver/register consists of bus transceiver
circuits with inverting 3-State outputs, D-type flip-flops, and control
circuitry arranged for multiplexed transmission of data directly from
the input bus or the internal registers. Data on the A or B bus will be
clocked into the registers as the appropriate clock pin goes High.
Output Enable (OE

) and DIR pins are provided to control the
transceiver function. In the transceiver mode, data present at the
high impedance port may be stored in either the A or B register or
both.

The Select (SAB, SBA) pins determine whether data is stored or
transferred through the device in real–time. The DIR determines
which bus will receive data when the OE
isolation mode (OE

= High), data from Bus A may be stored in the B

is active (Low). In the

register and/or data from Bus B may be stored in the A register.
Outputs from real-time, or stored registers will be inverted. When an
output function is disabled, the input function is still enabled and
may be used to store and transmit data. Only one of the two buses,
A or B may be driven at a time. The examples on the next page
demonstrate the four fundamental bus management functions that
can be performed with the 74ABT648.

CONDITIONS

T

= 25°C; GND = 0V

amb

TYPICAL UNIT

CL = 50pF; VCC = 5V 5.9 ns

VI = 0V or V

CC

Outputs disabled;
VO = 0V or V

CC

4 pF

7 pF

ORDERING INFORMATION

PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER

24-Pin Plastic DIP –40°C to +85°C 74ABT648 N 74ABT648 N SOT222-1
24-Pin plastic SO –40°C to +85°C 74ABT648 D 74ABT648 D SOT137-1
24-Pin Plastic SSOP Type II –40°C to +85°C 74ABT648 DB 74ABT648 DB SOT340-1
24-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT648 PW 74ABT648PW DH SOT355-1

PIN CONFIGURATION

1

CPAB

2

SAB

3

DIR

4

A0

5

A1

6

A2

7

A3

8

A4

9

A5

10

A6

11

A7

12

GND

V

24

CPBA

23

SBA

22

OE

21

B0

20

B1

19

B2

18

B3

17

B4

16

B5

15

B6

14

B713

SA00082

CC

PIN DESCRIPTION

PIN NUMBER SYMBOL FUNCTION

1, 23

CPAB /

CPBA

2, 22 SAB / SBA

3 DIR Direction control input

4, 5, 6, 7,

8, 9, 10, 11

20, 19, 18, 17,

16, 15, 14, 13

A0 – A7 Data inputs/outputs (A side)

B0 – B7 Data inputs/outputs (B side)

21 OE Output enable input (active-Low)
12 GND Ground (0V)
24 V

CC

A to B clock input / B to A clock
input

A to B select input / B to A select
input

Positive supply voltage

1998 Jun 08 853–1613 19516

2

Philips Semiconductors Product specification

74ABT648Octal bus transceiver/register, inverting (3-State)

LOGIC SYMBOL

3
23
22 SBA
21 OE

4567 891011

A0 A1 A2 A3 A4 A5 A6 A7
CPAB1
SAB2

DIR
CPBA

B0 B1 B2 B3 B4 B5 B6 B7

20 19 18 17 16 15 14 13

SA00083

LOGIC SYMBOL (IEEE/IEC)

21

3

22

2

23

1

4

5

6

7
8

9

10
11

G3
3EN1 [BA]
3EN2 [AB]
G6
G7
C4
C5

≥1

∇1

5D 7
17

64D
6

1

≥1

2∇

20

19

18

17
16

15
14

13

SA00156

REAL TIME BUS TRANSFER

BUS B TO BUS A

}

DIR CPABCPBA SAB SBA

OE

LLXXXL

REAL TIME BUS TRANSFER

BUS A TO BUS B

}

DIR CPABCPBA SAB SBA

OE

LHXXLX

STORAGE FROM
A, B, OR A AND B

}

DIR CPABCPBA SAB SBA

OE

LH↑ XLX
LXX↑ XX
HX↑↑XX

TRANSFER STORED DATA

TO A OR B

}

DIR CPABCPBA SAB SBA

OE

L L H H or L X H
L H H or L X H X

SA00177

1998 Jun 08

3

Philips Semiconductors Product specification

74ABT648Octal bus transceiver/register, inverting (3-State)

FUNCTION TABLE

INPUTS DATA I/O OPERATING MODE

OE DIR CPAB CPBA SAB SBA An Bn

X X ↑ X X X Input

X
X

L
H

X
X

Unspecified

output*

Input Input

Output Input

Input Output

X X X ↑ X X
H

H
L

L
L

L

X
X

L
L

H
H

↑

H or L

X
X

X

H or L

↑

H or L

X

H or L

X
X

X
X

X
X

L
H

H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
* The data output function may be enabled or disabled by various signals at the OE

data at the bus pins will be stored on every Low-to-High transition of the clock.

Unspecified

output*

Store A, B unspecified

Input Store B, A unspecified

Store A and B data
Isolation, hold storage

Real time B data to A bus
Stored B data to A bus

Real time A data to B bus
Stored A data to B bus

input. Data input functions are always enabled, i.e.,

LOGIC DIAGRAM

OE

DIR

CPBA

SBA

CPAB

SAB

A0

21

3
23

22

1

2

1of 8 Channels

4

1D

C1

Q

1D

C1

Q

20

B0

1998 Jun 08

5

A1

6

A2

7

A3

8

A4

9

A5

10

A6

11

A7

DETAIL A X 7

19

B1

18

B2

17

B3

16

B4

15

B5

14

B6

13

B7

SA00081

4

Philips Semiconductors Product specification

74ABT648Octal bus transceiver/register, inverting (3-State)

ABSOLUTE MAXIMUM RATINGS

SYMBOL

V

CC

I

IK

V

I

I

OK

V

OUT

I

OUT

T

stg

DC supply voltage –0.5 to +7.0 V
DC input diode current VI < 0 –18 mA
DC input voltage
DC output diode current VO < 0 –50 mA
DC output voltage
DC output current output in Low state 128 mA
Storage temperature range –65 to 150 °C

PARAMETER CONDITIONS RATING UNIT

3

3

1, 2

–1.2 to +7.0 V

output in Off or High state –0.5 to +5.5 V

NOTES:

1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .

2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.

3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

RECOMMENDED OPERATING CONDITIONS

SYMBOL PARAMETER LIMITS UNIT

Min Max

V

CC

V

V

V

I

OH

I

OL

∆t/∆v Input transition rise or fall rate 0 10 ns/V
T

amb

DC supply voltage 4.5 5.5 V
Input voltage 0 V

I

High-level input voltage 2.0 V

IH

Low-level Input voltage 0.8 V

IL

High-level output current –32 mA
Low-level output current 64 mA

Operating free-air temperature range –40 +85 °C

CC

V

1998 Jun 08

5