INTEGRATED CIRCUITS
74ABT640
Octal transceiver with direction pin, inverting (3-State)
Product specification |
1998 Jan 16 |
|
Supersedes data of 1993 Jun 21 |
||
|
||
IC23 Data Handbook |
|
m n r
Philips Semiconductors |
Product specification |
|
|
|
|
|
|
|
Octal transceiver with direction pin, inverting
74ABT640
(3-State)
FEATURES
•Octal bidirectional bus interface
•3-State buffers
•Power-up 3-State
•Live insertion/extraction permitted
•Output capability: +64mA/±32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model
DESCRIPTION
The 74ABT640 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive.
The 74ABT640 device is an octal transceiver featuring inverting 3-State bus compatible outputs in both send and receive directions. The control function implementation minimizes external timing requirements. The device features an Output Enable (OE) input for easy cascading and a Direction (DIR) input for direction control.
QUICK REFERENCE DATA
SYMBOL |
|
|
PARAMETER |
CONDITIONS |
TYPICAL |
UNIT |
|
|
|
Tamb = 25°C; GND = 0V |
|||||
|
|
|
|
|
|
||
tPLH |
Propagation delay |
CL = 50pF; VCC = 5V |
3.1 |
ns |
|||
tPHL |
An to Bn or Bn to An |
||||||
|
|
|
|||||
CIN |
Input capacitance |
VI = 0V or VCC |
4 |
pF |
|||
DIR, |
OE |
|
|||||
CI/O |
I/O capacitance |
Outputs disabled; VO = 0V or VCC |
7 |
pF |
|||
ICCZ |
Total supply current |
Outputs disabled; VCC =5.5V |
50 |
μA |
ORDERING INFORMATION
PACKAGES |
TEMPERATURE RANGE |
OUTSIDE NORTH AMERICA |
NORTH AMERICA |
DWG NUMBER |
|
|
|
|
|
20-Pin Plastic DIP |
±40°C to +85°C |
74ABT640 N |
74ABT640 N |
SOT146-1 |
|
|
|
|
|
20-Pin plastic SO |
±40°C to +85°C |
74ABT640 D |
74ABT640 D |
SOT163-1 |
|
|
|
|
|
20-Pin Plastic SSOP Type II |
±40°C to +85°C |
74ABT640 DB |
74ABT640 DB |
SOT339-1 |
|
|
|
|
|
20-Pin Plastic TSSOP Type I |
±40°C to +85°C |
74ABT640 PW |
74ABT640PW DH |
SOT360-1 |
|
|
|
|
|
PIN CONFIGURATION |
|
|
|
|
|
PIN DESCRIPTION |
|
||||
|
|
|
|
|
|
|
PIN |
SYMBOL |
NAME AND FUNCTION |
||
|
|
|
|
|
|
|
NUMBER |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
1 |
DIR |
Direction control input |
||
|
|
|
|
|
|
|
|
|
|
|
|
DIR |
1 |
20 |
VCC |
|
2, 3, 4, 5, |
A0 ± A7 |
Data inputs/outputs (A side) |
||||
|
6, 7, 8, 9 |
||||||||||
A0 |
2 |
19 |
|
|
|
|
|
|
|
|
|
|
OE |
|
|
|
|
|
|
|
|||
|
|
|
18, 17, 16, |
|
|
|
|
||||
A1 |
3 |
18 |
B0 |
|
|
|
|
|
|||
|
15, |
B0 ± B7 |
Data inputs/outputs (B side) |
||||||||
|
4 |
17 |
|
|
|
|
|||||
A2 |
B1 |
|
14, 13, 12, 11 |
|
|
|
|
||||
A3 |
5 |
16 |
B2 |
|
|
|
|
|
|
||
|
|
|
|
|
Output enable input, B side to A |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
6 |
15 |
|
|
|
|
19 |
OE |
|||
A4 |
B3 |
|
side (active-Low) |
||||||||
|
|
|
|
|
|||||||
A5 |
7 |
14 |
B4 |
|
|
|
|
|
|
||
|
10 |
GND |
Ground (0V) |
||||||||
|
|
|
|
|
|
|
|||||
A6 |
8 |
13 |
B5 |
|
|
|
|
|
|
||
|
20 |
VCC |
Positive supply voltage |
||||||||
A7 |
9 |
12 |
B6 |
|
|||||||
GND |
10 |
11 |
B7 |
|
|
|
|
|
|
||
|
|
SA00208 |
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
1998 Jan 16 |
2 |
853±1612 18864 |
Philips Semiconductors |
Product specification |
|
|
|
|
Octal transceiver with direction pin, inverting
74ABT640
(3-State)
LOGIC SYMBOL
|
1 |
|
DIR |
19 |
|
|
||
|
OE |
|
A0 |
2 |
|
18 |
||
|
||
|
B0 |
|
A1 |
3 |
|
17 |
||
|
||
|
B1 |
|
A2 |
4 |
|
16 |
||
|
||
|
B2 |
|
A3 |
5 |
|
15 |
||
|
||
|
B3 |
|
A4 |
6 |
|
14 |
||
|
||
|
B4 |
|
A5 |
7 |
|
13 |
||
|
||
|
B5 |
|
A6 |
8 |
|
12 |
||
|
||
|
B6 |
|
A7 |
9 |
|
11 |
||
|
||
|
B7 |
|
|
SA00209 |
LOGIC SYMBOL (IEEE/IEC)
19
|
G3 |
|
3 EN1 (BA) |
1 |
3 EN2 (AB) |
|
|
2 |
18 |
|
1 |
|
2 |
3 |
17 |
4 |
16 |
5 |
15 |
6 |
14 |
7 |
13 |
8 |
12 |
9 |
11 |
|
SA00210 |
FUNCTION TABLE
|
|
|
INPUTS |
|
|
INPUTS/OUTPUTS |
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
DIR |
An |
Bn |
||||
|
|
OE |
|||||||||
|
|
|
|
|
|
|
|
|
|
||
|
|
L |
|
L |
|
|
|
Inputs |
|||
|
|
|
Bn |
||||||||
|
|
|
|
|
|
|
|
|
|||
|
|
L |
|
H |
Inputs |
|
|
|
|||
|
|
|
|
An |
|||||||
|
|
|
|
|
|
|
|
|
|||
|
|
H |
|
X |
|
Z |
|
Z |
|||
|
|
|
|
|
|
|
|
|
|
|
|
H |
= High voltage level |
|
|
|
|
|
|
||||
L |
= Low voltage level |
|
|
|
|
|
|
||||
X |
= Don't care |
|
|
|
|
|
|
|
Z = High impedance ºoffº state
ABSOLUTE MAXIMUM RATINGS1, 2
SYMBOL |
PARAMETER |
CONDITIONS |
RATING |
UNIT |
|
|
|
|
|
VCC |
DC supply voltage |
|
±0.5 to +7.0 |
V |
IIK |
DC input diode current |
VI < 0 |
±18 |
mA |
VI |
DC input voltage3 |
|
±1.2 to +7.0 |
V |
IOK |
DC output diode current |
VO < 0 |
±50 |
mA |
V |
DC output voltage3 |
output in Off or High state |
±0.5 to +5.5 |
V |
OUT |
|
|
|
|
IOUT |
DC output current |
output in Low state |
128 |
mA |
Tstg |
Storage temperature range |
|
±65 to 150 |
°C |
NOTES:
1.Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under ªrecommended operating conditionsº is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2.The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3.The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Jan 16 |
3 |