Philips Semiconductors Product specification
74ABT125Quad buffer (3-State)
2
1998 Jan 16 853–1606 18868
FEA TURES
•Quad bus interface
•3-State buffers
•Live insertion/extraction permitted
•Output capability: +64mA/–32mA
•Latch-up protection exceeds 500mA per Jedec Std 17
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Power-up 3-State
•Inputs are disabled during 3-State mode
DESCRIPTION
The 74ABT125 high-performance BiCMOS device combines low
static and dynamic power dissipation with high speed and high
output drive.
The 74ABT125 device is a quad buffer that is ideal for driving bus
lines. The device features four Output Enables (OE
0, OE1, OE2,
OE
3), each controlling one of the 3-State outputs.
QUICK REFERENCE DA TA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
An to Yn
CL = 50pF; VCC = 5V 2.9 ns
C
IN
Input capacitance VI = 0V or V
CC
4 pF
C
OUT
Output capacitance
Outputs disabled;
VO = 0V or V
CC
7 pF
I
CCZ
Total supply current Outputs disabled; VCC =5.5V 65 µA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
14-Pin Plastic DIP –40°C to +85°C 74ABT125 N 74ABT125 N SOT27-1
14-Pin plastic SO –40°C to +85°C 74ABT125 D 74ABT125 D SOT108-1
14-Pin Plastic SSOP Type II –40°C to +85°C 74ABT125 DB 74ABT125 DB SOT337-1
14-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT125 PW 74ABT125PW DH SOT402-1
PIN DESCRIPTION
PIN NUMBER SYMBOL NAME AND FUNCTION
2, 5, 9, 12 A0 – A3 Data inputs
3, 6, 8, 11 Y0 – Y3 Data outputs
1, 4, 10, 13 OE0 – OE3 Output enable inputs (active-Low)
7 GND Ground (0V)
14 V
CC
Positive supply voltage
PIN CONFIGURATION
OE0
A0
Y0
OE1
A1
Y1
GND Y2
A2
OE
2
Y3
A3
OE
3
V
CC
1
2
3
4
5
6
78
9
10
11
12
13
14
SA00025
LOGIC SYMBOL
2
3
Y0
OE
0
1
5
6
Y1
OE
1
4
9
8
Y2
OE
2
10
12
11
Y3
OE
3
13
A0
A1
A2
A3
SA00026