PHILIPS 26PFL4007H/12, 26PFL4007K/12, 26PFL4007T/12, 32PFL4007H/12, 32PFL4007H/60 Service manual & schematics

Colour Television Chassis

Q552.4E

LA

Contents Page

1. Revision List 2

2. Technical Specs, Diversity, and Connections 2

3. Precautions, Notes, and Abbreviation List 7

4. Mechanical Instructions 11

5. Service Modes, Error Codes, and Fault Finding 20

6. Alignments 39

7. Circuit Descriptions 47

8. IC Data Sheets 53

9. Block Diagrams Drawing Wiring diagram 4000 series 32" Wiring diagram 4000 series 37" 70 Wiring diagram 4000 series 42" 71 Wiring diagram 4000 series 47" 72 Wiring diagram 5000 & 5500 series 32" 73 Wiring diagram 5000 & 5500 series 40" 74 Wiring diagram 5000 & 5500 series 46" 75 Wiring diagram 5000 series 55" 76 Block Diagram Video 77 Block Diagram Audio 78 Block Diagram Control & Clock Signals 79 Block Diagram I2C 80 Supply Lines Overview 81

10. Circuit Diagrams and PWB Layouts Drawing A 715G5194 PSU 32" & 37" 3500/4000 series A01 715G5246 PSU 42" 3500/4000 series 88 B 313912365313 SSB 93 B 313912365333 - 313912365334 SSB 130 J 272217190529 Sensor board 167 J 272217190532 Sensor board 169 J 715G5255 Sensor board 171 E 2722171 90545, 90547, 90549, 90552, 90558

Keyboard control panel 173 E 715G5252 Keyboard control panel 3500/4000 series 175

11. Styling Sheets Drawing 4000 series 32" 4000 series 37" 178 4000 series 42" 179 4000 series 47" 180 5000 series 32" 181 5000 series 40" 182 5000 series 46" 183 5000 series 55" 184

69

82

177

PWB

82-82 91-92 128-129 163-166 168 170 172

174 175

Published by ER/TY 1266 Quality Printed in the Netherlands Subject to modification EN 3122 785 19222

2012-Jun-29

2012 ©

TP Vision Netherlands B.V.

All rights reserved. Specifications are subject to change without notice. Trademarks are the property of Koninklijke Philips Electronics N.V. or their respective owners. TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust earlier supplies accordingly. PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Phili ps Electronics N.V.

EN 2 Q552.4E LA1.

Revision List

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

Manual xxxx xxx xxxx.1

• Chapter 2: Table 2-1

updated (added CTNs).

Manual xxxx xxx xxxx.2

• Chapter 4: added additional LVDS cable handling info; see section 4.4.2

.

2. Technical Specs, Diversity, and Connections

Index of this chapter:

Technical Specifications

2.1

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

2.1 Technical Specifications

For on-line product support please use the CTN links in Table 2-1 getting started, user manuals, frequently asked questions and software & drivers.

. Here is product information available, as well as

Table 2-1 Described Model Numbers and Diversity

24 9 10 11

Mechanics Block Diagrams

CTN

32PFL4007H/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4007H/60 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4007K/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4007M/08 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4007T/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4007T/60 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4027H/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4027H/60 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4027K/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4027T/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4027T/60 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4037H/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4037H/60 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4037K/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4037T/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4037T/60 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL4047T/12 2.3 4-1 4.4 9.1 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.1 32PFL5007H/12 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.5 32PFL5007H/60 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.5 32PFL5007K/12 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.5 32PFL5007M/08 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.5 32PFL5007T/12 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.5 32PFL5007T/60 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.5 32PFL5507H/12 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.5 32PFL5507H/60 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.5 32PFL5507K/12 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.5 32PFL5507M/08 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.5 32PFL5507T/12 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.5 32PFL5507T/60 2.3 4-5 4.4 9.5 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.5 37PFL4007H/12 2.3 4-2 4.4 9.2 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.2 37PFL4007K/12 2.3 4-2 4.4 9.2 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.2 37PFL4007M/08 2.3 4-2 4.4 9.2 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.2 37PFL4007T/12 2.3 4-2 4.4 9.2 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.2 37PFL4007T/60 2.3 4-2 4.4 9.2 9.9 9.10 9.11 9.12 9.13 10.1 10.4 10.7 10.9 4000 11.2

2012-Jun-29

Connection Overview

Wire Dressing

Dressing

Assembly Removal

Wiring Diagram

Video

Audio

Control & Clock

I2C

back to

div. table

Schemat ics Styling

Supply lines

Power Supply

SSB

J (Sensor Board)

E (Keyboard/Leading Edge)

Name

Sheet

Technical Specs, Diversity, and Connections

24 9 10 11

Mechanics Block Diagrams

Schemat ics Styling

EN 3Q552.4E LA 2.

CTN

40PFL5007H/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.6 40PFL5007H/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.6 40PFL5007K/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.6 40PFL5007M/08 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.6 40PFL5007T/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.6 40PFL5007T/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.6 40PFL5507H/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5507H/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5507K/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5507M/08 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5507T/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5507T/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5527H/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5527H/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5527K/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5527M/08 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5527T/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5527T/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5537H/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5537H/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5537K/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5537M/08 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5537T/12 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 40PFL5537T/60 2.3 4-6 4.4 9.6 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.6 42PFL4007H/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4007K/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4007M/08 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4007T/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4007T/60 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4047T/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4307H/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4307K/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4307T/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 42PFL4317K/12 2.3 4-3 4.4 9.3 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.3 46PFL5007H/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.7 46PFL5007K/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.7 46PFL5007M/08 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.7 46PFL5007T/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.4 10.5 10.8 5000 11.7 46PFL5507H/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5507H/60 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5507K/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5507M/08 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5507T/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5507T/60 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5527H/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5527H/60 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5527K/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5527M/08 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5527T/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5527T/60 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5537T/60 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5537H/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5537H/60 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5537K/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5537M/08 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 46PFL5537T/12 2.3 4-7 4.4 9.7 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.7 47PFL4007H/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4007H/60 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4007K/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4007M/08 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4007T/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4007T/60 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4037T/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4047T/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4

Connection Overview

Wire Dressing

Dressing

Assembly Removal

Wiring Diagram

Video

Audio

Control & Clock

I2C

Supply lines

Power Supply

SSB

J (Sensor Board)

E (Keyboard/Leading Edge)

Name

back to

div. table

2012-Jun-29

Sheet

EN 4 Q552.4E LA2.

Technical Specs, Diversity, and Connections

24 9 10 11

Mechanics Block Diagrams

Schemat ics Styling

CTN

47PFL4307H/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4307K/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 47PFL4307T/12 2.3 4-4 4.4 9.4 9.9 9.10 9.11 9.12 9.13 10.2 10.4 10.7 10.9 4000 11.4 55PFL5507H/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5507H/60 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5507K/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5507M/08 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5507T/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5507T/60 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5527H/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5527K/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5527M/08 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5527T/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5537H/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5537K/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5537M/08 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8 55PFL5537T/12 2.3 4-8 4.4 9.8 9.9 9.10 9.11 9.12 9.13 - 10.3 10.6 10.8 5000 11.8

Connection Overview

Wire Dressing

Dressing

Assembly Removal

Wiring Diagram

Video

Audio

Control & Clock

I2C

Supply lines

Power Supply

SSB

J (Sensor Board)

2.2 Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

E (Keyboard/Leading Edge)

Name

Sheet

2012-Jun-29

back to

div. table

2.3 Connections

REAR CONNECTORS

BOTTOM REAR CONNECTORS

SIDE CONNECTORS

HDMI

SIDE

DIGITAL

AUDIO OUT

(OPTICAL)

USB 3

USB 2

CI

NETWORK

AUDIO IN

Y/Pb/Pr

Y/Pb/Pr SERV.U

AUDIO IN

DVI/VGA

VGA SCART

(RGB/CVBS)

USB 1(3) (2) (1) ARC

HDMI

TV ANTENNA

75 Ω

19220_007_120222.eps

120222

5 6 8

10

11

12

14

13

97

21 3 4

10000_025_090121.eps

120320

1

6

10

11

5

15

10000_002_090121.eps

090127

Technical Specs, Diversity, and Connections

EN 5Q552.4E LA 2.

Note: The following connector colour abbreviations are used

(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Rear Connections

1 - RJ45: Ethernet

Figure 2-2 Ethernet connector

1 -TD+ Transmit signal k 2 -TD- Transmit signal k 3 -RD+ Receive signal j 4 -CT Centre Tap: DC level fixation 5 -CT Centre Tap: DC level fixation 6 -RD- Receive signal j 7 -GND Gnd H 8 -GND Gnd H

2 - Cinch: Audio - In (VGA/DVI)

Rd -Audio R 0.5 V Wh -Audio L 0.5 V

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

Figure 2-1 Connection overview

3 - Cinch: Video YPbPr - In, Audio - In

Gn -Video Y 1 V Bu - Video Pb 0.7 V Rd -Video Pr 0.7 V Rd -Audio - R 0.5 V Wh -Audio - L 0.5 V

4 - Service Connector (UART)

1 -Ground Gnd H 2 -UART_TX Transmit k 3 -UART_RX Receive j

2.3.2 Rear Connections - Bottom

5 - VGA: Video RGB - In

1 -Video Red 0.7 V 2 -Video Green 0.7 V 3 -Video Blue 0.7 V 4-n.c.

back to

div. table

5 -Ground Gnd H 6 -Ground Red Gnd H

/ 75 ohm jq

PP

PP PP RMS RMS

Figure 2-3 VGA Connector

PP PP PP

/ 75 ohm jq / 75 ohm jq

/ 10 kohm jq / 10 kohm jq

/ 75 ohm j / 75 ohm j / 75 ohm j

2012-Jun-29

EN 6 Q552.4E LA2.

21

20

1

2

10000_001_090121.eps

090121

10000_017_090121.eps

090428

19

1

18 2

1 2 3 4

10000_022_090121.eps

090121

1 2 3 4

10000_022_090121.eps

090121

10000_017_090121.eps

090428

19

1

18 2

Technical Specs, Diversity, and Connections

7 -Ground Green Gnd H 8 -Ground Blue Gnd H 9-+5V 10 - Ground Sync Gnd H

+5 V j

DC

11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j

6 - SCART: Video RGB - In, CVBS - In, Audio - In

Figure 2-4 SCART connector

1-n.c. 2 -Audio R 0.5 V 3-n.c.

/ 10 kohm j

RMS

4 -Ground Audio Gnd H 5 -Ground Blue Gnd H 6 -Audio L 0.5 V 7 -Video Blue 0.7 V

/ 10 kohm j

RMS

/ 75 ohm jk

PP

8 -Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j 9 -Ground Green Gnd H 10 - n.c. 11 - Video Green 0.7 V

/ 75 ohm j

PP

12 - n.c. 13 - Ground Red Gnd H 14 - Ground P50 Gnd H 15 - Video Red 0.7 V 16 - Status/FBL 0 - 0.4 V: INT

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j 17 - Ground Video Gnd H 18 - Ground FBL Gnd H 19 - n.c. 20 - Video CVBS 1 V 21 - Shield Gnd H

/ 75 ohm j

PP

8 - Aerial - In

- -IEC-type (EU) Coax, 75 ohm D

9 - USB 1: USB2.0

Figure 2-6 USB (type A)

1-+5V k 2 -Data (-) jk 3 -Data (+) jk 4 -Ground Gnd H

2.3.3 Side Connections

10 - Common Interface

68p- See diagram B05G 10-3-15

jk

11 - Head phone (Output)

Bk -Head phone 32 - 600 ohm / 10 mW ot

12 - Optical: S/PDIF - Out

Bk -Coaxial Optical signal k

13 - USB 2, 3: USB2.0

Figure 2-7 USB (type A)

1-+5V k 2 -Data (-) jk 3 -Data (+) jk 4 -Ground Gnd H

14 - HDMI SIDE: Digital Video, Digital Audio - In

7 - HDMI: Digital Video - In, Digital Audio with ARC - In/Out (optional)

1 -D2+ Data channel j 2-Shield Gnd H 3 -D2- Data channel j 4 -D1+ Data channel j 5-Shield Gnd H 6 -D1- Data channel j 7 -D0+ Data channel j 8-Shield Gnd H 9 -D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink/CEC Control channel jk 14 - ARC (optional) Audio Return Channel

15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

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Figure 2-5 HDMI (type A) connector

(optional) k

1 -D2+ Data channel j 2 -Shield Gnd H 3 -D2- Data channel j 4 -D1+ Data channel j 5 -Shield Gnd H 6 -D1- Data channel j 7 -D0+ Data channel j 8 -Shield Gnd H 9 -D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink/CEC Control channel jk 14 - n.c. 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

2.4 Chassis Overview

Refer to chapter Block Diagrams for PWB/CBA locations.

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Figure 2-8 HDMI (type A) connector

Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

Index of this chapter:

Safety Instructions

3.1

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

3.2 Warnings

• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).

• All capacitor values are given in micro-farads (10 nano-farads (n 10

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering

tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then

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-9

), or pico-farads (p 10

. Select

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-6

),

-12

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Precautions, Notes, and Abbreviation List

result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2010 week 10 / 2010 week 17). The 6 last digits contain the serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV),

6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels directly from a cable network by

means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA ATV See Auto TV Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz BDS Business Display Solutions (iTV) BLR Board-Level Repair BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections CL Constant Level: audio output to

connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:

manipulates steepness of chroma

transients CVBS Composite Video Blanking and

Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra

low frequency amplification DCM Data Communication Module. Also

referred to as System Card or

Smartcard (for iTV). DDC See “E-DDC” D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz DFI Dynamic Frame Insertion DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion

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Precautions, Notes, and Abbreviation List

EN 9Q552.4E LA 3.

DNR Digital Noise Reduction: noise

reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote

control designed for service

technicians DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display. EDID Extended Display Identification Data

(VESA standard) EEPROM Electrically Erasable and

Programmable Read Only Memory EMI Electro Magnetic Interference EPG Electronic Program Guide EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by

SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency

Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound

2

C Inter IC bus

I

2

I

D Inter IC Data bus

2

S Inter IC Sound bus

I

carrier distance is 6.0 MHz

IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used

for broadcast grade video.

Uncompressed digital component or

digital composite signals can be used.

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The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

iTV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's

preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz MHEG Part of a set of international standards

4. Mechanical Instructions

Index of this chapter:

Cable Dressing 4000 Styling (xxPFL4xx7x/xx series)

4.1

4.2 Cable Dressing 5000 styling (xxPFL5xx7x/xx series)

4.3 Service Positions

4.4 Assy/Panel Removal

4.5 Set Re-assembly

4.1 Cable Dressing 4000 Styling (xxPFL4xx7x/xx series)

EN 11Q552.4E LA 4.

Notes:

• Figures below can deviate slightly from the actual situation, due to the different set executions.

Figure 4-1 Cable dressing 32PFL4xx7x/xx

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Mechanical Instructions

Figure 4-2 Cable dressing 37PFL4xx7x/xx

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Figure 4-3 Cable dressing 42PFL4xx7x/xx

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Mechanical Instructions

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Figure 4-4 Cable dressing 47PFL4xx7x/xx

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3 × tape (150 m.m.) 11 × tape (100 m.m.) 3 × clamp 1 × adhesive saddle

Mechanical Instructions

4.2 Cab le Dressing 5000 styling (xxPFL5xx7x/xx series)

Figure 4-5 Cable dressing 32PFL5xx7x/xx

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Mechanical Instructions

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4 × tape (150 m.m.) 11 × tape (100 m.m.) 1 × adhesive clamp

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Figure 4-6 Cable dressing 40PFL5xx7x/xx

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2 × tape (200 m.m.) 2 × tape (150 m.m.) 10 × tape (100 m.m.) 6 × tape (80 m.m.) 3 × tape (50 m.m.) 2 × clamp

Mechanical Instructions

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Figure 4-7 Cable dressing 46PFL5xx7x/xx

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Mechanical Instructions

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4.3 Service Positions

For easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.

4.4 Assy/Panel Removal

Instructions below apply to the 32PFL5507K/12, but will be similar for other models.

4.4.1 Rear Cover

Warning: Disconnect the mains power cord before removing

the rear cover. Attention: Before lifting the rear cover, unplug the Keyboard Control connector [1], as indicated in Figure 4-9

Figure 4-8 Cable dressing 55PFL5xx7x/xx

.

Figure 4-9 Rear cover removal

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LVD S CABLELVD S CABLE

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120626

Click!

LVDS flat foil

Click!

4.4.2 Small Signal Board (SSB)

Caution: it is mandatory to remount all different screws at their

original position during re-assembly. Failure to do so may result in damaging the SSB.

ATTENTION!

The LVDS connector(s) require(s) a special procedure for disconnecting. Refer to Figure 4-10

to Figure 4-13 for clarification.

1. Press the catches [1] simultaneously.

2. Slide the LVDS cable sidewards carefully [2].

Failure to pressing the catches leads to a damaged LVDS cable [3]!

Any LVDS cable that is damaged at the notch area must be replaced with a new one to avoid future unnecessary repair actions.

1

LVD S CABLELVD S CABLE

2

Mechanical Instructions

Figure 4-12 LVDS cable - damaged notch area [3]

Upon re-connecting the LVDS cable, ensure the catches are locked after having inserted the LVDS cable.

1

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Figure 4-10 LVDS connector - correct handling

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Figure 4-11 Unlocking LVDS connector

120229

Figure 4-13 SSB LVDS - catch locking

4.4.3 IR/LED panel

111010

1. Unlock the catches at both sides.

2. Flip the board upside-down.

3. Unlock the cable from the connector. When defective, replace the whole unit.

4.4.4 Keyboard Control Panel

The keyboard control panel is located in the rear cover. When defective, replace the whole unit.

4.4.5 LCD Panel

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Refer to Figure 4-14

for details.

1. Remove the SSB as described earlier.

2. Remove the PSU.

3. Remove the stand.

4. Remove the stand bracket.

5. Remove the mains plug together with its subframe.

6. Remove the woofer.

7. Remove the IR/LED panel as earlier described.

8. Remove the WiFi module.

Mechanical Instructions

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9. Remove the speakers together with their subframes.

10. Remove all remaining boards and cables that do not belong to the LCD panel.

11. Remove the rims [1] and [2] at both sides of the set.

12. Lift the LCD panel from the bezel.

When defective, replace the whole unit.

4.5 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position.

• Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

Figure 4-14 LCD panel removal

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SDM

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

Test Points

5.1

5.2 Service Modes

5.3 Stepwise Start-up

5.4 Service Tools

5.5 Error Codes

5.6 The Blinking LED Procedure

5.7 Protections

5.8 Fault Finding and Repair Tips

5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

– Automatic volume levelling (AVL). – Skip/blank of non-favourite pre-sets.

How to Activate SDM

For this chassis there are two kinds of SDM: an analogue SDM and a digital SDM. Tuning will happen according Table 5-1

• Analogue SDM: use the standard RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or “HOME”) button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again. Analogue SDM can also be activated by grounding for a moment the solder path on the SSB, with the indication “SDM” (see Service mode pad

• Digital SDM: use the standard RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or "HOME") button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again.

.

).

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1

ComPair”).

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose

• To create a pre-defined setting, to get the same measurement results as given in this manual.

• To override software protections detected by stand-by processor and make the TV start up to the step just before protection (a sort of automatic stepwise start-up). See section “5.3

Stepwise Start-up”.

• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz) Default system

Europe, AP(PAL/Multi) 475.25 PAL B/G Europe, AP DVB-T 546.00 PID Video: 0B

06 PID PCR: 0B 06 PID Audio: 0B 07

DVB-T

Error Codes”).

Figure 5-1 Service mode pad

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

How to Navigate

When the “MENU” (or “HOME”) button is pressed on the RC transmitter, the TV set will toggle between the SDM and the normal user menu.

How to Exit SDM

Use one of the following methods:

• Switch the set to STAND-BY via the RC-transmitter.

• Via a standard customer RC-transmitter: key in “00”sequence.

5.2.2 Service Alignment Mode (SAM)

Purpose

• To perform (software) alignments.

• To change option settings.

• To easily identify the used software version.

• To view operation hours.

• To display (or clear) the error code buffer.

• All picture settings at 50% (brightness, colour, contrast).

• Sound volume at 25%.

• All service-unfriendly modes (if present) are disabled, like: – (Sleep) timer. – Child/parental lock. – Picture mute (blue mute or black mute).

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How to Activate SAM

Via a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” or “OK” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.

Contents of SAM

• Hardware Info.

Service Modes, Error Codes, and Fault Finding

Display option code

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– A. SW Version. Displays the software version of the

main software (example: Q555X-1.2.3.4 = AAAAB_X.Y.W.Z).

• AAAA= the chassis name.

• B= the software branch version. This is a sequential number (this is no longer the region indication, as the software is now multi-region).

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always compatible with a lower number).

– B. STBY PROC Version. Displays the software

version of the stand-by processor.

– C. Production Code. Displays the production code of

the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this.

• Operation Hours. Displays the accumulated total of operation hours (not the stand-by hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5

• Reset Error Buffer. When “cursor right” (or “OK” button) pressed here, followed by the “OK” button, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” submenu. See Chapter 6.

• Dealer Options. Extra features for the dealers.

• Options. Extra features for Service. For more info regarding option codes, see chapter 6. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored, otherwise changes will be lost.

• Initialize NVM. The moment the processor recognizes a corrupted NVM, the “initialize NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialize the NVM.

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. To adapt this option, it’s advised to use ComPair (the correct values for the options can be found in Chapter 6. or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or "HOME") button and “XXX” (where XXX is the 3 digit decimal display code as mentioned on the sticker in the set). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Stand-by mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

Error Codes”).

Alignments.

Alignments for details.

Alignments)

EN 21Q552.4E LA 5.

Figure 5-2 Location of Display Option Code sticker

• Store - go right. All options and alignments are stored when pressing “cursor right” (or the “OK” button) and then the “OK”-button.

• Operation hours display. Displays the accumulated total of operation hours of the screen itself. In case of a display replacement, reset to “0” or to the consumed operation hours of the spare display.

• SW Maintenance. – SW Events. In case of specific software problems, the

development department can ask for this info.

– HW Events. In case of specific software problems, the

development department can ask for this info :

- Event 26: refers to a power dip, this is logged after the TV set reboots due to a power dip.

- Event 17: refers to the power OK status, sensed even before the 3 x retry to generate the error code.

• Test settings. For development purposes only.

• Development file versions. Not useful for Service purposes, this information is only used by the development department.

• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Channel list”, “Personal settings”, “Option codes”, “Alignments”, “Identification data” (includes the set type and prod code + all 12NC like SSB, display, boards), “History list”. The “All” item supports to upload all several items at once.

First a directory “repair\” has to be created in the root of the USB stick.

To upload the settings, select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and wait until the message “Done” appears. In case the download to the USB stick was not successful, “Failure” will be displayed. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download into another TV or other SSB. Uploading is of course only possible if the software is running and preferably a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB.

• Download from USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as described in “Upload to USB”. To make sure that the download of the channel list from USB to the TV is executed properly, it is necessary to restart the TV and tune to a valid preset if necessary. The “All” item supports to download all several items at once.

• NVM editor. For NET TV the set “type number” must be entered correctly. Also the production code (AG code) can be entered here via the RC-transmitter. Correct data can be found on the side/rear sticker.

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EN 22 Q552.4E LA5.

Service Modes, Error Codes, and Fault Finding

How to Navigate

• In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAM

Use one of the following methods:

• Switch the TV set to STAND-BY via the RC-transmitter.

• Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose

When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible.

When in this chassis CSM is activated, a test pattern will be displayed during 5 seconds (1 second Blue, 1 second Green and 1 second Red, then again 1 second Blue and 1 second Green). This test pattern is generated by the PNX51X0 (located on the 200Hz board as part of the display). So if this test pattern is shown, it could be determined that the back end video chain (PNX51X0 and display) is working.For TV sets without the PNX51X0 inside, every menu from CSM will be used as check for the back end chain video.

When CSM is activated and there is a USB stick connected to the TV set, the software will dump the CSM content to the USB stick. The file (CSM_model number_serial number.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed.

When in CSM mode (and a USB stick connected), pressing “OK” will create an extended CSM dump file on the USB stick. This file (Extended_CSM_model number_serial number.txt) contains:

• The normal CSM dump information,

• All items (from SAM “load to USB”, but in readable format),

• Operating hours,

• Error codes,

• Software/Hardware event logs.

To have fast feedback from the field, a flashdump can be requested by development. When in CSM, push the “red” button and key in serial digits ‘2679’ (same keys to form the word ‘COPY’ with a cellphone). A file “Dump_model number_serial number.bin” will be written on the connected USB device. This can take 1/2 minute, depending on the quantity of data that needs to be dumped.

Also when CSM is activated, the LAYER 1 error is displayed via blinking LED. Only the latest error is displayed (see also section 5.5

Error Codes).

How to Activate CSM

Key in the code “123654” via the standard RC transmitter. Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to Navigate

By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, can be navigated through the menus.

Contents of CSM

The contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.

General

• Set Type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV-set. Note that if an NVM is replaced or is initialized after corruption, this set type has to be re-written to NVM. ComPair will foresee in a possibility to do this. The update can also be done via the NVM editor available in SAM.

• Production Code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. ComPair will foresee in a possibility to do this. The update can also be done via the NVM editor available in SAM.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired via time extraction.

• Options 1. Gives the option codes of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Gives the option codes of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. ComPair will foresee in a possibility to do this. This identification number is the 12nc number of the SSB.

• 12NC display. Shows the 12NC of the display.

• 12NC supply. Shows the 12NC of the power supply.

• 12NC 200Hz board. Shows the 12NC of the 200Hz Panel (when present).

• 12NC AV PIP. Shows the 12NC of the AV PIP board (when present).

Software versions

• Current main SW. Displays the build-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: Q55xx1.2.3.4

• Stand-by SW. Displays the build-in stand-by processor software version. Upgrading this software will be possible via ComPair or via USB (see section 5.9

Software Upgrading).

Example: STDBY_83.84.0.0.

• e-UM version. Displays the electronic user manual software-version (12NC version number). Most significant number here is the last digit.

• FPGA software.

Quality items

• Signal quality. Bad / average /good (not for DVB-S).

• Ethernet MAC address. Displays the MAC address present in the SSB.

• Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.

• BDS key. Indicates if the set is in the BDS status.

• CI module. Displays status if the common interface module is detected.

• CI + protected service. Yes/No.

• Event counter : S : 000X 0000(number of software recoveries : SW EVENT-LOG #(reboots) S : 0000 000X (number of software events : SW EVENTLOG #(events) H : 000X 0000(number of hardware errors)

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Service Modes, Error Codes, and Fault Finding

18770_250_100216.eps

100402

Active

Semi St by

St by

Mains

on

Mains

off

GoToProtection

-WakeUp requested

-Acquisition needed

-Tact switch pushed

- stby requested and no data Acquisition required

- St by requested

-tact SW pushed

WakeUp

requested

Protection

WakeUp

requested

(SDM)

GoToProtection

Hibernate

-Tact switch pushed

-last status is hibernate after mains ON

Tact switch

pushed

EN 23Q552.4E LA 5.

H : 0000 000X (number of hardware events : SW EVENTLOG #(events).

How to Exit CSM

Press “MENU” (or "HOME") / “Back” key on the RC-transmitter.

5.3 Stepwise Start-up

When the TV is in a protection state due to an error detected by stand-by software (error blinking is displayed) and SDM is activated via shortcutting the SDM solder path on the SSB, the TV starts up until it reaches the situation just before protection. So, this is a kind of automatic stepwise start-up. In combination with the start-up diagrams below, you can see which supplies are present at a certain moment. Caution: in case the start-up in this mode with a faulty FET 7U0X (diagram B02A) is done,

you can destroy all IC’s supplied by the +1V8 and +1V1, due to overvoltage (12V on XVX-line). It is recommended to measure first the FET 7U0X or others FET’s on shortcircuit before activating SDM via the service pads.

The abbreviations “SP” and “MP” in the figures stand for:

• SP: protection or error detected by the Stand-by Processor.

• MP: protection or error detected by the MIPS Main

Processor.

Figure 5-3 Transition diagram

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EN 24 Q552.4E LA5.

19220_071_120229.eps

120229

No

EJTAG probe

connected ?

No

Yes

Release AVC system reset

Feed warm boot script

Cold boot?

Yes

No

Set I²C slave address

of Standby µP to (A0h)

An EJTAG probe (e.g. WindPower ICE probe) can be connected for Linux Kernel debugging purposes.

Detect EJTAG d ebug probe

(pulling pin of the probe interface to

ground by inserting EJTAG probe)

Release AVC system reset

Feed cold boot script

Release AVC system reset Feed initializing boot script

disable alive mechanism

Off

Standby Supply starts running.

All standby supply voltages become available.

st-by µP resets

Stand by or

Protection

Mains is applied

- Switch Audio-Reset high.

It is low in the standby mode if the standby

mode lasted longer than 10s.

start keyboard scanning, RC detection. Wake up reasons are

off.

If the protection state was left by short circuiting the

SDM pins, detection of a protection condition during

startup will stall the startup. Protection conditions in a

playing set will be ignored. The prote c ti on mod e wi l l

not be entered.

Detect2 is moved to an interrupt. The detectionis on interrupt base now

+12V, +24Vs, AL and Bolt-on power

isswitched on, follow ed by the +1V2 DCDC converter

Enable the supply detection algorithm

Switch ON Platform and display supply by switching

LOW the Standby line.

Initialise I/O pins of the st-by µP:

- Switch reset-AVC LOW (reset state)

- Switch reset-system LOW (reset state)

- Switch reset-Ethernet LOW (reset state)

- Switch reset-USB LOW (reset state)

- Switch reset-DVBs LOW (reset state)

-keep Audio-reset and Audio-Mute-Up HIGH

- Switch CTRL-DISP3 LOW(2D mode)

- Switch BL-DIM LOW

- Switch BL-I-CTRL LOW

Enable the DCDC converters

(ENABLE-3V3n LOW)

No

Detect2 high received

within 2 seconds?

12V error:

Layer1: 3

Layer2: 16

Enter protection

Yes

Wait 50ms

Service Modes, Error Codes, and Fault Finding

Figure 5-4 “Off” to “Semi Stand-by” flowchart (part 1)

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Service Modes, Error Codes, and Fault Finding

19220_072_120229.eps

120229

Yes

MIPS reads the wake up reason

from standby µP.

Semi-Standby

Initialize tuner and channel decoders

Initialize video processing IC's

-local contrast FPGA

-5120's, 21/ 9 scaler and MPC if present

Initialize source selection

initialize AutoTV by triggering CHS AutoTV Init interface

3-th try?

Blink Code as

error code

Bootscript ready

in 1250 ms?

Yes

No

Enable Alive check mechanism

Wait until AVC starts to

communicate

SW initialization

succeeded

within 20s?

No

Switch Standby I/O line high

and wait 4 seconds

RPC start (comm. protocol)

Set I²C slave address

of Standby µP to (60h)

Yes

Disable all supply related protections and

switch off the +3V3 +5V DC/DC converter.

switch off the remaining DC/DC

converters

Wait 5ms

Switch AVC PNX85500 in

reset (active low)

Wait 10ms

Flash to Ram

image transfer succeeded

within 30s?

No

Yes

Code =

Layer1: 2

Layer2: 53

Code =

Layer1: 2

Layer2: 15

Initialize Ambilight with Lights off.

Timing need to be updated if more mature info is available.

Initialize audio

Enter protection

Reset-system is switched HIGH by the

AVC at the end of the bootscript

AVC releases Reset-Ethernet, Reset-USB and

Reset-DVBs when the end of the AVC boot-

script is detected

This cannot be done through the bootscript, the I/O is on the standby µP

Reset-Audio and Audio-Mute-Up are

switched by MIPS code later on in the

startup process

Reset-system is switched HIGH by the

AVC at the end of the bootscript

Reset-Audio and Audio-Mute-Up are

switched by MIPS code later on in the

startup process

AVC releases Reset-Ethernet, Reset-USB and

Reset-DVBs when the end of the AVC boot-

script is detected

Wake up reason

coldboot & not semi-

standby?

85500 sends out startup screen

Startup screen cfg file

present?

85500 & FPGA start up the display.

Startup screen visible

yes

See the Semi-standby to On description for the detailed display startup sequence. During the complete display time of the Startup screen, the preheat condition of

100% PWM is valid.

No

Startup screen shall only be visible when there is a coldboot to an active state end situation. The startup screen shall not be visible when waking up for reboot reasons or waking up to semi-standby conditions or waking up to enter Hibernate mode.

The first time after the option turn on of the startup screen or when the set is virgin, the config file is not present and hence the startup screen will not be shown.

Yes

No

EN 25Q552.4E LA 5.

Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 2)

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EN 26 Q552.4E LA5.

19220_074_120229.eps

120229

Active

Semi Standby

Initialize audio and video

processing IC's and functions

according needed use case.

Assert RGB video blanking and audio mute

Wait until previous on-state is left more than2

secondsago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can

only happen during ON->SEMI ->ON. In these states,

the AVC is still active and can provide the 2s delay. A

transition ON->SEMI->STBY->SEMI->ON cannot be

made in less than 2s, because the standby state will

be maintained for at least 4s.

Switch Audio-Reset low and wait 5ms

unblank the video.

Wait until valid and stable audio and video, corresponding to the

requested output is delivered by the AVC

Release audio mute and wait 100ms before any other audio

handling is done (e.g. volume change)

CPipe already generates a valid output

clock in the semi-standby state: display

startup can start immediately when leaving

the semi-standby state.

Switch on LCD backlight (BL-ON)

Switch on the Ambilight functionality according the last status

settings.

Switch on the displaypowerby

switching LCD-PWR-ONn low

Wait x ms

Switch on LVDS output in the 85500

No

The exact timings to

switch on the

display(LVDS

delay, lamp delay)

are defined in the

display file.

Start POK line detection

algorithm

return

Display already on?

(splash screen)

Yes

Display cfg file present

and up to date, according

correct display option?

Startup screen Option and Installation setting

Photoscreen ON?

Yes

No

Prepare Start screen Display config

file and copy to Flash

No

Yes

Send display startup and shutdown

targets to FPGA

Switch on the displayBy sending I2C

“Display_On” command to FPGA

Delay BL-ON with the sum of LVDS

delay and the Lamp delay indicated in

the display file

Set BL-DIM & BL-I-CTRL according to Display file

(For Splash Screen, fix BL-DIM at high[100%], BL-I-CTRL at low[0%])

Wait 10ms(tbc)

Switch Off LCD

Backlight

Wait 10ms(tbc)

Service Modes, Error Codes, and Fault Finding

2012-Jun-29

Figure 5-6 “Semi Stand-by” to “Active” flowchart

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Service Modes, Error Codes, and Fault Finding

19220_073_120229.eps

120229

Semi Standby

Active

Wait x ms (display file)

Mute all sound outputs via softmute

Mute all video outputs

switch off LCD backlight

Force ext audio outputs to ground

(I/O: audio reset)

And wait 5ms

Set main amplifier mute (I/O: audio-mute)

Wait 100ms

Switch off the display power by switching LCD-PWR-ONn high

Wait x ms

Switch off LVDS output in 85500

Switch off POK line detection

algorithm

switch off Ambilight

Wait until Ambilight has faded out:

Output power Observer should be zero

The exact timings to

switch off the

display(LVDS

delay, BL-ON

delay) are defined

in the display file.

Switch off the display by sending I2C

“Display_Off” command to FPGA

Switch CTRL-DISP3 to

LOW

No

CTRL-DISP3=high?

(3D mode?)

Yes

EN 27Q552.4E LA 5.

Figure 5-7 “Active” to “Semi Stand-by” flowchart

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EN 28 Q552.4E LA5.

18770_256_100216.eps

100216

transfer Wake up reasons to the Stand by µP.

Stand by

Semi Stand by

Disable all supply related protections and switch off

the DC/DC converters (ENABLE-3V3n)

Switch OFF all supplies by switching HIGH the

Standby I/O line

Switch AVC system in reset state (reset-system and

reset-AVC lines)

Switch reset-USB, Reset-Ethernet and Reset-DVBs

LOW

Important remarks:

release reset audio 10 sec after entering

standby to save power

Also here, the standby state has to be

maintained for at least 4s before starting

another state transition.

Wait 5ms

Wait 10ms

Delay transition until ramping down of ambient light is

finished. *)

If ambientlight functionality was used in semi-standby

(lampadaire mode), switch off ambient light (see CHS

ambilight)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.

Switch Memories to self-refresh (this creates a more

stable condition when switching off the power).

Service Modes, Error Codes, and Fault Finding

Figure 5-8 “Semi Stand-by” to “Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding

10000_036_090121.eps

091118

TO

UART SERVICE

CONNECTOR

TO

UART SERVICE

CONNECTOR

TO

I2C SERVICE

CONNECTOR

TO TV

PC

HDMI I

2

C only

Optional power

5V DC

ComPair II Developed by Philips Brugge

RC out

RC in

Optional

Switch

Power ModeLink/

Activity

I

2

C

ComPair II

Multi

function

RS232 /UART

EN 29Q552.4E LA 5.

5.4 Service Tools

5.4.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products. and offers the following:

1. ComPair helps to quickly get an understanding on how to

2. ComPair allows very detailed diagnostics and is therefore

3. ComPair speeds up the repair time since it can

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to Connect

This is described in the chassis fault finding database in ComPair.

Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs can be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• Software is available via the Philips Service web portal.

• ComPair UART interface cable for Q55x.x.

Note: When you encounter problems, contact your local support desk.

repair the chassis in a short and effective way.

capable of accurately indicating problem areas. No knowledge on I

2

C or UART commands is necessary,

because ComPair takes care of this.

automatically communicate with the chassis (when the µP is working) and all repair information is directly available.

Figure 5-9 ComPair II interface connection

(using 3.5 mm Mini Jack connector): 3138 188 75051.

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.

New in this chassis is the way errors can be displayed:

• If no errors are there, the LED should not blink at all in

CSM or SDM. No spacer must be displayed as well.

• There is a simple blinking LED procedure for board level repair (home repair) so called LAYER 1 errors

next to the existing errors which are LAYER 2 errors (see

Table 5-2

– LAYER 1 errors are one digit errors. – LAYER 2 errors are 2 digit errors.

• In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• In CSM mode. – When entering CSM: error LAYER 1 will be displayed

• In SDM mode. – When SDM is entered via Remote Control code or the

• Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.

Basically there are three kinds of errors:

• Errors detected by the Stand-by software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section “5.6

• Errors detected by the Stand-by software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5

Error Buffer”. Note that it can take up several minutes

before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

5.5.2 How to Read the Error Buffer

Use one of the following methods:

• On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only

– 37 23 00 00 00: Error code 23 was first detected and

– Note that no protection errors can be logged in the

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).

by blinking LED. Only the latest error is shown.

hardware pins, LAYER 2 is displayed via blinking LED.

detected error.

error code 37 is the last detected error.

error buffer.

The Blinking LED Procedure”).

Error Codes, 5.5.4

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Service Modes, Error Codes, and Fault Finding

• Via the blinking LED procedure. See section 5.5.3 How to

Clear the Error Buffer.

•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:

• By activation of the “RESET ERROR BUFFER” command in the SAM menu.

• If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the

Table 5-2 Error code overview

Description Layer 1 Layer 2

I2C3 2 13 MIPS E BL / EB SSB SSB I2C2 2 14 MIPS E BL / EB SSB SSB I2C4 2 18 MIPS E BL / EB SSB SSB PNX doesn’t boot (HW cause) 2 15 Stby µP P BL SSB SSB 12V 3 16 Stby µP P BL / Supply Inverter or display supply 3 17 MIPS E EB / Supply HDMI mux 2 23 MIPS E EB Sil9x87A SSB I2C switch 2 24 MIPS E EB PCA9540 SSB AV-PIP board 8 25 MIPS E EB AV PIP board Channel dec DVB-C 2 27 MIPS E EB TDA10024 SSB Channel dec 2 27 MIPS E EB TC90157 SSB Channel dec DVBT2 2 27 MIPS E EB CXD2820 SSB Channel DVB-S 2 28 MIPS E EB STV0903 SSB 14v/18v OLP LNB controller 2 32 MIPS E EB SSB LNB controller R3 2 31 MIPS E EB LNBH 23 SSB LNB controller R4 2 31 MIPS E EB LNBH 25 SSB Tuner1 2 34 Stby µP P EB DTT71300 SSB main NVM 2 35 MIPS E x STM24C64 SSB Tuner DVB-S 2 36 MIPS E EB STV6110 SSB Class-D 2 37 MIPS E EB TAS5711PHP SSB FPGA backlight 2 38 MIPS E EB LX 4 SSB Temperature sensor LED driver/TCON 7 42 MIPS E EB LM 75 Temperature sensor Temperature sensor SSB/set 2 42 MIPS E EB LM 75 Temperature sensor FAN 7 43 MIPS E EB FAN FPGA PQ 2 45 MIPS E EB LX 25 SSB MIPS doesn’t boot (SW cause) 2 53 Stby µP P BL PNX8550 SSB

Monitored by

content, as this history can give significant information). This to ensure that old error codes are no longer present. If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause (e.g. a fault in the protection detection circuitry can also lead to a protection). There are several mechanisms of error detection:

• Via error bits in the status registers of ICs.

• Via polling on I/O pins going to the stand-by processor.

• Via sensing of analog values on the stand-by processor or the PNX8550.

• Via a “not acknowledge” of an I

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Error/

Error Buffer/

Prot

Blinking LED Device Defective Board

2

C communication.

Extra Info

• Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8

Fault Finding and Repair Tips, 5.8.6 Logging). It’s shown that the loggings which are generated

by the main software keep continuing. In this case diagnose has to be done via ComPair.

• Error 13 (I

2

C bus 3, SSB bus blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 14 (I

2

C bus 2, TV set bus blocked). Current situation: when this error occurs, the TV will constantly reboot due to the blocked bus. The best way for further diagnosis here, is to use ComPair.

• Error 18 (I

2

C bus 4, Tuner bus blocked). In case this bus is blocked, short the “SDM” solder paths on the SSB during startup, LAYER error 2 = 18 will be blinked.

• Error 15 (PNX8550 doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the PNX8550 (supplies not OK, PNX 8550 completely dead, I between PNX and Stand-by Processor broken, etc...).

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C link

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2

When error 15 occurs it is also possible that I blocked (NVM). I

2

C1 can be indicated in the schematics as

C1 bus is

follows: SCL-UP-M IP S, SDA-UP-MIPS. Other root causes for this error can be due to hardware problems regarding the DDR’s and the bootscript reading from the PNX8550.

• Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = 3) in case of absence. When SDM is activated we see blinking LED LAYER 2 error = 16.

• Error 17 (Invertor or Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the invertor or display supply (no picture), only error logging. LED blinking of LAYER 1 error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

• Error 23 (HDMI). When there is no I

2

C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 24 (I2C switch). When there is no I communication towards the I

2

C switch, LAYER 2

2

C

error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on. Remark: this only works for TV sets with an I

2

C controlled screen included.

Service Modes, Error Codes, and Fault Finding

EN 31Q552.4E LA 5.

• Error 28 (Channel dec DVB-S). When there is no I2C communication towards the DVB-S channel decoder, LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 31 (Lnb controller). When there is no I communication towards this device, LAYER 2 error = 31 will be logged and displayed via the blinking LED procedure if SDM is activated.

• Error 34 (Tuner). When there is no I

2

C communication towards the tuner during start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 35 (main NVM). When there is no I communication towards the main NVM during start-up, LAYER 2 error = 35 will be displayed via the blinking LED procedure when SDM is switched “on”. All service modes (CSM, SAM and SDM) are accessible during this failure, observed in the Uart logging as follows: "<< ERRO >>> PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".

• Error 36 (Tuner DVB-S). When there is no I communication towards the DVB-S tuner during start-up, LAYER 2 error = 36 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 37 (Class-D amplifier). When there is no I communication towards the TAS5731PHP Class-D Amplifier during start-up, LAYER 2 error = 37 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. Note: TV in normal working condition, but without Audio out from speaker.

• Error 42 (Temp sensor). Only applicable for TV sets equipped with temperature devices.

• Error 53. This error will indicate that the PNX8550 has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, ...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM, LAYER 2 error = 53.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:

• Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2

overview”) which causes the failure of the TV. This

approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the failure of the defective board.

Important remark:

For an empty error buffer, the LED should not blink at all in CSM or SDM. No spacer will be displayed.

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:

1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit

2. A pause of 1.5 s

3. “n” short blinks (where “n”= 1 to 9)

4. A pause of approximately 3 s,

Error code overview”) and will be

2

C

2

C

2

C

2

C

Error code

5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s (spacer).

6. The sequence starts again.

Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:

1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s

2. Two short blinks of 250 ms followed by a pause of 3 s

3. Eight short blinks followed by a pause of 3 s

4. Six short blinks followed by a pause of 3 s

5. One long blink of 3 s to finish the sequence (spacer).

6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:

• Activate the CSM. The blinking front LED will show only the latest layer 1 error, this works in “normal operation” mode or automatically when the error/protection is monitored by the Stand-by processor. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8

Fault Finding and Repair

Tips, 5.8.6 Logging”).

• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the stand-by microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:

• Related to supplies: presence of the +5V, +3V3 and 1V2 needs to be measured, no protection triggered here.

• Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply Errors

The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-up

During TV start-up, some voltages and IC observers are actively monitored to be able to optimise the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3

5.7.2 Hardware Protections

The only real hardware protection in this chassis appears in case of an audio problem e.g. DC voltage on the speakers. This protection will only affect the Class D audio amplifier (item 7D60; see diagram B06A) and puts the amplifier in a continuous burst mode (cyclus approximately 2 seconds).

Stepwise Start-up”).

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Service Modes, Error Codes, and Fault Finding

Repair Tip

• There still will be a picture available but no sound. While the Class D amplifier tries to start-up again, the cone of the loudspeakers will move slowly in one or the other direction until the initial failure shuts the amplifier down, this cyclus starts over and over again. The headphone amplifier will also behaves similar.

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra

Info”.

5.8.1 Audio Amplifier

The Class D-IC 7D60 has a powerpad for cooling. When the IC is replaced it must be ensured that the powerpad is very well pushed to the PWB while the solder is still liquid. This is needed to insure that the cooling is guaranteed, otherwise the Class DIC could break down in short time.

5.8.2 AV PIP

To check the AV PIP board (if present) functionality, a dedicated tespattern can be invoke as follows: select the “multiview” icon in the User Interface and press the “OK” button. Apply for the main picture an extended source, e.g. HDMI input. Proceed by entering CSM (push ‘123654’ on the remote control) and press the yellow button. A coloured testpattern should appear now, generated by the AV PIP board (this can take a few seconds).

5.8.3 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.4 DC/DC Converter

Description basic board

The basic board power supply consists of 4 DC/DC converters and 5 linear stabilizers. All DC/DC converters have +12V input voltage and deliver:

• +1V1 supply voltage (1.15V nominal), for the core voltage of PNX855xx, stabilized close to the point of load; SENSE+1V1 signal provides the DC-DC converter the needed feedback to achieve this.

• +1V8 supply voltage, for the DDR2 memories and DDR2 interface of PNX855xx.

• +3V3 supply voltage (3.30V nominal), overall 3.3 V for onboard IC’s, for non-5000 series SSB diversities only.

• +5V (5.15V nominal) for USB, WIFI and Conditional Access Module and +5V5-TUN for +5V-TUN tuner stabilizer.

The linear stabilizers are providing:

• +1V2 supply voltage (1.2V nominal), stabilized close to PNX855xx device, for various other internal blocks of PNX855xx; SENSE+1V2 signal provides the needed feedback to achieve this.

• +2V5 supply voltage (2.5V nominal), for LVDS interface and various other internal blocks of PNX855xx. Stabilizer 7UC0 is used (diagram B02B).

• +3V3 supply voltage (3V3 nominal), is provided by 7UD1 (diagram B02C); the 12 V to 3V3 DC-DC converter delivers the supply voltage to the PNX855xx.

• +5V-TUN supply voltage (5V nominal) for tuner and IF amplifier.

+3V3-STANDY (3V3 nominal) is the permanent voltage, supplying the Stand-by microprocessor inside PNX855xx.

Supply voltage +1V1 is started immediately when +12V voltage becomes available (+12V is enabled by STANDBY signal when "low"). Supply voltages +3V3, +2V5, +1V8, +1V2 and +5V-TUN are switched "on" by signal ENABLE-3V3 when "low", provided that +12V (detected via 7U40 and 7U41) is present.

+12V is considered OK (=> DETECT2 signal becomes "high", +12V to +1V8, +12V to +3V3, +12V to +5V DC-DC converter can be started up) if it rises above 10V and doesn’t drop below 9V5. A small delay of a few milliseconds is introduced between the start-up of 12V to +1V8 DC-DC converter and the two other DC-DC converters via 7U48 and associated components.

Description DVB-S2:

• LNB-RF1 (0V = disabled, 14V or 18V in normal operation) LNB supply generated via the second conversion channel of 7TP2 (diagram B03B) LNB supply control IC. It provides supply voltage that feeds the outdoor satellite reception equipment.

• +3V3-DVBS (3V3 nominal), +2V5-DVBS (2V5 nominal) and +1V-DVBS (1.03V nominal) power supply for the silicon tuner and channel decoder. +1V-DVBS is generated via a 5V to 1V DC-DC converter and is stabilized at the point of load (channel decoder) by means of feedback signal SENSE+1V0-DVBS. +3V3-DVBS and +2V5-DVBS are generated via linear stabilizers from +5V-DVBS that by itself is generated via the first conversion channel of 7TP2.

At start-up, +24V becomes available when STANDBY signal is "low" (together with +12V for the basic board), when +3V3 from the basic board is present the two DC-DC con inside 7TP2 are activated. Initially only the 24V to 5V converter (channel 1 of 7TP2 generating +5V-DVBS) will effectively work, while +V-LNB is held at a level around 11V7 via diode 6TP5.

If +24V drops below +15V level then the DVB-S2 supply will stop, even if +3V3 is still present.

Note: +24V audio is used in 4000 series, 4300 & 5000 series use +12V audio.

Debugging

The best way to find a failure in the DC/DC converters is to check their start-up sequence at power “on” via the mains cord, presuming that the stand-by microprocessor and the external supply are operational. Take STANDBY signal "high"-to-"low" transition as time reference. When +12V becomes available (maximum 1 second after STANDBY signal goes "low") then +1V1 is started immediately. After ENABLE-3V3 goes "low", all the other supply voltages should rise within a few milliseconds.

Tips

• Behaviour comparison with a reference TV550 platform can be a fast way to locate failures.

• If +12V stays "low", check the integrity of fuse 1U40.

• Check the integrity (at least no short circuit between drain and source) of the power MOS-FETs before starting up the platform in SDM, otherwise many components might be damaged. Using a ohmmeter can detect short circuits between any power rail and ground or between +12V and any other power rail.

• Short circuit at the output of an integrated linear stabilizer (7UC0) will heat up this device strongly.

• Switching frequencies should be 500 kHz ...600 kHz for 12 V to 1.1 V and 12 V to 1.8 V DC-DC converters, 900 kHz for 12 V to 3.3 V and 12 V to 5 V DC-DC converters. The DVB-S2 supply 24 V to 5 V and 24 V to +V LNB DC-DC converters operates at 300 kHz while for 5 V to 1.1 V DC-DC converter 900 kHz is used.

verters channels

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EN 33Q552.4E LA 5.

5.8.5 Exit “Factory Mode”

When an “F” is displayed in the screen’s right corner, this means the set is in “Factory” mode, and it normally happens after a new SSB is mounted. To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button for 10 seconds until the “F” disappears from the screen.

5.8.6 Logging

When something is wrong with the TV set (f.i. the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box. Required settings in ComPair before starting to log:

- Start up the ComPair application.

- Select the correct database (open file “Q55X.X”, this will set the ComPair interface in the appropriate mode).

- Close ComPair After start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:

1. COMx

2. Bits per second = 115200

3. Data bits = 8

4. Parity = none

5. Stop bits = 1

6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “DisplayRawNumber” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Guidelines Uart logging

Description possible cases:

Uart loggings are displayed:

• When Uart loggings are coming out, the first conclusion we can make is that the TV set is starting up and communication with the flash RAM seems to be supported. The PNX855xx is able to read and write in the DRAMs.

• We can not yet conclude : Flash RAM and DRAMs are fully operational/reliable.There still can be errors in the data transfers, DRAM erros, read/write speed and timing control.

No Uart logging at all:

• In case there is no Uart logging coming out, check if the startup script can be send over the I

2

C bus (3 trials to

startup) + power supplies are switched on and stable.

• No startup will end up in a blinking LED status : error LAYER 1 = “2”, error LAYER 2 = “53” (startup with SDM solder paths short).

• Error LAYER 2 = “15” (hardware cause) is more related to a supply issue while error LAYER 2 = “53” (software cause) refers more to boot issues.

Uart loggings reporting fault conditions, error messages, error codes, fatal errors:

• Failure messages should be checked and investigated.For instance fatal error on the PNX51x0: check startup of the back-end processor, supplies..reset, I

2

C bus. => error

mentioned in the logging as: *51x0 failed to start by itself*.

• Some failures are indicated by error codes in the logging, check with error codes table (see Table “5-2

overview”).e.g. => <<<ERROR>>>PLFPOW_MERR.C :

First Error (id=10,Layer_1=2,Layer_2=23).

• I

• Not all failures or error messages should be interpreted as fault.For instance root cause can be due to wrong option codes settings => e.g. “DVBS2Suppoprted : False/True.

In the Uart log startup script we can observe and check the enabled loaded option codes.

Defective sectors (bad blocks) in the Nand Flash can also be reported in the logging.

Startup in the software upgrade application and observe the Uart logging:

Starting up the TV set in the Manual Software Upgrade mode will show access to USB, meant to copy software content from USB to the DRAM.Progress is shown in the logging as follows: “cosupgstdcmds_mcmdwritepart: Programming 102400 bytes, 40505344 of 40607744 bytes programmed”.

Startup in Jett Mode:

Check Uart logging in Jet mode mentioned as : “JETT UART READY”.

Uart logging changing preset:

=> COMMAND: calling DFB source = RC6, system=0, key = 4”.

5.8.8 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.8.9 PSL

In case of no picture when CSM (test pattern) is activated and backlight doesn’t light up, it’s recommended first to check the inverter on the PSL + wiring (LAYER 2 error = 17 is displayed in SDM).

5.8.10 Tuner

Attention: In case the tuner is replaced, always check the tuner options!

5.8.11 Display option code

Attention: In case the SSB is replaced, always check the display option code in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.

While in the download application (start up in TV mode + “OK” button pressed), the display option code can be changed via 062598 HOME XXX special SAM command (XXX=display option in 3 digits).

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Error code

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C bus error mentioned as e.g.: “ I2C bus 4 blocked”.

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Significant risk of damaging the board by the fixation point

SSB fixation points

Service Modes, Error Codes, and Fault Finding

5.8.12 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See table 5-3

Step # Action to do Advise / Attention points / Remarks

1 Ensure ESD protection by using a wristband 2 If SSB is still functional: Go via SAM to “upload to USB” and copy Personal

settings - Option codes - Alignments (Presets) - Set Identification. Advice: because of differences in memory a llocatio n, it is a dvised to upg rade main SW before copying data from existing SSB. Copy of Preset list is

possible from normal user interface. 3 Disconnect set from mains and from antenna. Safety and ESD! 4 Open the set and disconnect LVDS flat cable. Disconnect other cables /

connections. 5 Dismount the (defective) SSB from the set. Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful

6 Place new SSB in the set, and fixate/mount carefully. Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful

7 Connect PSU and other connectors. Insert the optional WiFi module. Make sure that the connectors are correctly plugged-in and locked (click). Special at tention for the

8 Connect LVDS connector(s). Be very careful: wrong or bad connection can damage the TCON part on the SSB and damage

9 Connect set to mains and switch TV “On”. Check start-up of the set, backlight switch “On”… 10 If the set does not start (or reboots) check:

- The connectors from the power supply,

- The power supply cable and connection pins,

- LVDS cable connection.

11 Before programming the new SSB, upgrade to late st software. If set is starting

up in software upgrade mode, then first install new software via software

Upgrade Menu or via the autorun.upg file. 12 If set is starting up without picture or menu (OSD), first program the correct

Display Option codes. 13 Go to SAM and program “Set type” and “Serial number”. This is possible via

the NVM editor and virtual keyboard. In case personal settings were

recovered from the defective SSB, you can use an “Upload from USB”. 14 Check if option codes are correct, and keys are present. SSBs with integrated

TCON needs TCON alignment in SAM. A djust White point co lour temperature

alignment for normal, warm and cool according to values in section 6.3.1 15 Update to latest software (Standby and main software). This step is ne cessary

to make sure that the (optional) 200 Hz T-CON board has the latest software.

Display drive, and White point colour temperature needs to be aligned! See

section 6.3.1

16 Once the set is playing, check cable connection between PSU and SSB, by

moving the cable if there are no bad connections. 17 Fill in the Electronic DDF (Defect Description Form): Fault symptom, TV type

and TV serial number. 18 Install presets or check if all presets are OK. Check in CSM if Type number,

Serial number, Main and Standby software are correct. 19 Check connectivity to Net TV and DLNA. Check AmbiLight functionality. Only for sets having these functionalities. 20 Inform customer about Memory Card, USB, or Hard drive PVR (Personal

Video Recording) recordings.

SSB replacement instructions.

.

For a more general overview of steps to follow, refer to figure

SSB replacement flowchart.

5-12

Table 5-3 SSB replacement instructions

Upload to USB: A directory “repair” will be created on the USB, and all data will be copied in this directory. On sets with software before Q552-xx-140-x-x, there was an issue by copying the program map table, so it is advised to reinstall the programs from Virgin mode instead of using copy via USB.

Always take care for ESD! Be extra careful when removing connectors!

by moving SSB over SSB supports). See Figure 5-10 and Figure 5-11. by moving SSB over SSB supports). See Figure 5-10 and Figure 5-11.

optional WiFi module: a defective WiFi module can give reboots or no start-up of the SSB. In this case do a trial without WiFi module.

the LCD display. Check if flat cables are fitted correctly before closing the connector lock.

Power supply connector must “snap” into the socket.

Some SSB’s will start-up in software upgrad e mode, and software needs to b e installed before you can program the Display Optio n codes. It’s adviced to use an autorun.upg file for software upgrade, this in case you have no OSD on the screen.

Use blind service mode “062598” + “Home” button, directly followed by the Display Option code (3 digits). Set will switch to Standby after Display Option code is entered.

Programming “Set type” and “Serial number ” i s ma nda to ry to ha ve al l fun c tionality of the set, like DLNA, Net TV… For certain sets you may need to use ComPair for this.

Attention, check if Tuner on defect board and new b oard is the same. If not, the same Tun er option code nbr 1 needs to be adapted (add or substract 512). refer to Gen eral Service Info GSC_893 08.

.

Validity of HDCP, CI+, Marlin, and WDRM keys can be checked via ComPair. Even when the SSB already has the latest softwar e, it is mand atory to upgra de again the software

to update the 200 Hz T-CON part. At the end of the main software update process, a dedicated software is loaded, from the main processor via the LVDS connection, to upgrade the 200 Hz T-CON part. For certain LCD displays, a dedicated Display software patch (autoscript) is available. See General Service info GSC_85590.

Check the two power connectors 1M95 and 1M99. Bad contact or bad connection here can give reboots.

It is mandatory to fill in the E-DDF form (see the “At Your Service” web portal).

Special attention for Standby software: check if Standby software ID is matching wi th the D-RAM’s mounted on the SSB (2 × Elpida = 73, 4 × Elpida = 64, 2 × Hynix = 72, 4 × Hynix = 63).

Inform customer that previous recordings ma de on Memory Card (movi e download), USB, or Hard drive will be lost. USB or Hard drive needs to be re-formatted and matched with new SSB (WDRM Keys!).

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Blue arrows: traces of friction

Red arrows: damaged components

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Figure 5-10 Mounting attention points [1/2] Figure 5-11 Mounting attention points [2/2]

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START

C onnect the U SB stick to th e set,

go to SAM and save the current TV settings via “Upload to USB”

Set is still operating?

Yes

1.

Dismount the defective SSB.

2. Replace the SSB by a Service SSB.

Set behaviour?

Yes

No

Instruction note SSB replacement Q55x.x

Before starting:

- prepare a USB memory stick with the latest software

- download the latest Main Software (Fus) from www.p4c.philips.com

- unzip this file

- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this "upgrades" folder. Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in case there are more than one "autorun.upg" files on the USB stick.

No picture displayed

Picture displayed

Set is starting up without software upgrade menu appearing on screen

Picture displayed

Set is starting up with software upgrade menu appearing on screen

Due to a possible wrong display option code in the received Service SSB (NVM), it’s possible that no picture is displayed. Due to this

the download application will not be shown either. This tree enables you to load the main software step-by-step via the UART logging on the PC (this for visual feedback).

Start-up the set

1) Start up the TV set, equiped with the Service SSB, and enable the U

ART logging on the PC.

2) The TV set will start-up automatically in the

download application if main TV software is not loaded.

3) Plug the prepared USB stick into the TV set. Follow the

instructions in the UART log file, press “Right” cursor key to enter

the list. Navigate to the “autorun.upg” file in the UART logging

printout via the cursor keys on the remote control. When the

correct file is selected, press “Ok”.

4) Press "Do

wn" cursor and “Ok” to start flashing the main TV software. Printouts like: “L: 1-100%, V: 1-100% and P: 1-100%” should be visible now in the UART logging.

5) Wait until the message “Operation successful !” is logged in

the UART log and remove all inserted media. Restart the TV set.

1) Plug the USB stick into the TV set and select the “autorun .upg” file in the display

ed browser.

2) Now the main software will be loaded automatically,

supported by a progress bar.

3) Wait until the message “Operation successful !” is displayed and remove all inserted media. Restart the TV set.

Set the correct “Display code” via “062598 -HOME- xxx” where

“xxx” is the 3 digit display panel code (see stic

ker on the side

or bottom of the cabinet)

After entering the “Display Option” code, the set is going to

Standby

(= validation of code)

Restart the set

Connect PC via the ComPair interface to Service connector.

Start TV in Jett mode (DVD I + (OSD))

Open ComPair browser Q54x

Program set type number, serial number, and display 12 NC

Prog

ram E - DFU if needed.

Go to SAM and reload settings

via “Download from USB” function.

In case of settings reloaded from USB, the set type, serial number, display 12 NC, are automatically stored when entering display options.

- Check if correct “display option” code is programmed.

- Verify “option codes” according to sticker inside the set.

- Default settings fo

r “white drive” > see Service Manual.

Q55x.E SSB Board swap – ER on behalf of VDS Updated 28-07-2011

If not already done:

Check latest software on Service website.

Update main and Stand-by software via USB.

Check and perform alignments in SAM according to the Service Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.

Special attention f

or HDMI Keys and Mac address.

Check if E - D F U is present.

End

Attention point for Net TV: If the set type and serial number are not filled in, the Net TV functionality will not work. It will not be possible to connect to the internet.

Saved settings on USB stick?

EN 35Q552.4E LA 5.

Figure 5-12 SSB replacement flowchart

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H_16771_007b.eps

100322

Restart the set

Set is startin g up in Factory mode

Set is starting up in Factor y mod e?

Noisy picture with bands/lines is visible and the

RED LED is continuous on.

An “F” is displayed (and the HDMI 1

input is displayed).

- Press the “volume minus” button on the TVs local keyboard for 5 ~10 seconds

- Press the “SOURCE” button for 10 seconds until the “F” disappears

from the screen or the noise on the screen is replaced by “blue mute”

The noise on the screen is replaced

with the blue mute or the “F” is disappeared!

Unplug the mains cord to verify the correct

disabling of the Factory mode.

Program display option code

via “062598 MENU”, followed by

the 3 digits code of the display

(this code can be found

on a sticker on - or inside - the set).

After entering “display option” code, the set is

going in stand-by mode (= validation of code)

Service Modes, Error Codes, and Fault Finding

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Figure 5-13 SSB replacement flowchart - Factory mode

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Service Modes, Error Codes, and Fault Finding

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EN 37Q552.4E LA 5.

5.9 Software Upgrading

5.9.1 Introduction

The set software and security keys are stored in a NANDFlash, which is connected to the PNX855xx.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the electronic User Manual.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (CI +, MAC address, ...). Perform the following actions after SSB replacement:

1. Set the correct option codes (see sticker inside the TV).

2. Update the TV software => see the eUM (electronic User Manual) for instructions.

3. Perform the alignments as described in chapter 6 (section

Reset of Repaired SSB).

6.5

4. Check in CSM if the CI + key, MAC address.. are valid.

For the correct order number of a new SSB, always refer to the Spare Parts list!

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.

Figure 5-14 SSB start-up

Automatic Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. 3104 337 05661 _FUS _Q555X_ x.x.x.x_prod.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:

1. Copy “AUTORUN.UPG” to the root of the USB stick.

2. Insert USB stick in the set while the set is operational. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software Upgrade

In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (it is also possible to use a TV remote in “DVD” mode). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

Attention!

In case the download application has been started manually, the “autorun.upg” will maybe not be recognized. What to do in this case:

1. Create a directory “UPGRADES” on the USB stick.

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2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.

4. Insert USB stick into the TV.

5. The renamed “upg” file will be visible and selectable in the upgrade application.

Back-up Software Upgrade Application

If the default software upgrade application does not start (could be due to a corrupted boot sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “CURSOR DOWN”-button on a Philips TV remote control while reconnecting the TV to the Mains/AC Power.

3. The back-up software upgrade application will start.

5.9.3 Stand-by Software Upgrade via USB

In this chassis it is possible to upgrade the Stand-by software via a USB stick. The method is similar to upgrading the main software via USB. Use the following steps:

1. Create a directory “UPGRADES” on the USB stick.

2. Copy the Stand-by software (part of the one-zip file, e.g. StandbyFactory_88.0.0.0.upg) into this directory.

3. Insert the USB stick into the TV.

4. Start the download application manually (see section “

Manual Software Upgrade”.

5. Select the appropriate file and press the “OK” button to upgrade.

Service Modes, Error Codes, and Fault Finding

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.

• AmbiCpld_Q55XX_x.x.x.x_prod.zip. Contains the program instruction and software content, needed to upgrade the ambilight CPLD on the TV550 platform.

• BalanceFPGA_Q555X_x.x.x.x_prod.zip. Contains the BalanceFPGA software in “upg” format.

• FUS_Q555X_x.x.x.x_prod.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

• PNX5130UPG_Q555X_x.x.x.x_prod.zip. Contains the PNX5130 software in “upg” format.

• StandbySW_Q555X_x.x.x.x_prod.zip. Contains the StandbyFactory software in “upg” format.

• ProcessNVM_Q55XX_x.x.x.x_prod.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.

5.9.5 UART logging 2K10 (see section “5.8

Fault Finding and

Repair Tips, 5.8.6 Logging)

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6. Alignments

Index of this chapter:

General Alignment Conditions

6.1

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings

6.5 Reset of Repaired SSB

6.6 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V

/ 50 Hz ( 10%).

AC

– LATAM-NTSC: 120 - 230 V – US: 120 V

/ 60 Hz ( 10%).

AC

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: Ri > 10 M, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

• First, set the correct options: – In SAM, select “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph 6.4

Option Settings).

– Press OK on the remote control before the cursor is

moved to the left.

– In submenu “Option numbers” select “Store” and press

OK on the RC.

•OR: – In main menu, select “Store” again and press OK on

the RC.

– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error

Codes, and Fault Finding). The SAM menu will now appear on

the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:

• White point

• Ambilight.

To store the data:

• Press OK on the RC before the cursor is moved to the

left

• In main menu select “Store” and press OK on the RC

• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

/ 50 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

Alignments

6.3.1 White Point

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EN 39Q552.4E LA 6.

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• Choose “TV menu”, “Setup”, “More TV Settings” and then “Picture” and set picture settings as follows:

Picture Setting

Contrast 100 Brightness 50 Colour 0 Light Sensor Off Picture format Unscaled

• In menu “Picture”, choose “Pixel Plus HD” and set picture settings as follows:

Picture Setting

Dynamic Contrast Off Dynamic Backlight Off Colour Enhancement Off Gamma 0

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:

• Use a 100% white screen (format: 720p50) to the HDMI input and set the following values: – “Colour temperature”: “Cool”. – All “White point” values to: “127”.

In case you have a colour analyser:

• Measure, in a dark environment, with a calibrated contactless colour analyser (Minolta CA-210 or Minolta CS-200) in the centre of the screen and note the x, y value.

• Change the pattern to 90% white screen. If a Quantum Data generator is used, select the “GreyAll” test pattern at level = 230.

• Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1

values - LED - Minolta CA-210, or 6-2 White D alignment values - LED - Minolta CS-200). Tolerance: dx:  0.002, dy:

 0.002.

• Repeat this step for the other colour temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values - LED - Minolta CA-210

Value Cool (9420K) Normal (8120K) Warm (6080K)

x 0.282 0.292 0.320 y 0.298 0.311 0.345

Table 6-2 White D alignment values - LED - Minolta CS-200

Value Cool (11000K) Normal (9000K) Warm (6500K)

x 0.276 0.287 0.313 y 0.282 0.296 0.329

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.

• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

• Set the RED, GREEN and BLUE default values according to the values in Table 6-3

to Table 6-10.

White D alignment

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Alignments

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-3 White tone default setting 32" (4000 series)

White Tone e.g. 32PFL4xx7x/xx Colour Temperature R G B

Normal 126 115 122 Cool 112 110 127 Warm 127 104 81

Table 6-4 White tone default setting 37" (4000 series)

White Tone e.g. 37PFL4xx7x/xx Colour Temperature R G B

Normal 126 105 127 Cool 105 94 127 Warm 127 94 85

Table 6-5 White tone default setting 42" (4000 series)

White Tone e.g. 42PFL4xx7/xx Colour Temperature R G B

Normal 127 111 114 Cool 124 115 127 Warm 127 99 76

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence / absence of these PNX51XX ICs (back-end advanced video picture improvement IC which offers motion estimation and compensation features (commercially called HDNM) plus integrated Ambilight control) is made known by the option codes.

Notes:

• After changing the option(s), save them by pressing the OK button on the RC before the cursor is moved to the left, select STORE in the SAM root menu and press OK on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 Dealer Options

For dealer options, in SAM select “Dealer options”. See Table 6-12

6.4.3 (Service) Options

SAM mode overview.

2

C

Table 6-6 White tone default setting 47" (4000 series)

White Tone e.g. 47PFL4xx7/xx Colour Temperature R G B

Normal 127 112 118 Cool 115 119 127 Warm 127 100 76

Table 6-7 White tone default setting 32" (5000 series)

White Tone e.g. 32PFL5xx7/xx Colour Temperature R G B

Normal 127 96 84 Cool 127 99 102 Warm 127 83 44

Table 6-8 White tone default setting 40" (5000 series)

White Tone e.g. 40PFL5xx7/xx Colour Temperature R G B

Normal 115 121 127 Cool 97 108 127 Warm 127 117 92

Table 6-9 White tone default setting 46" (5000 series)

White Tone e.g. 46PFL5xx7.xx Colour Temperature R G B

Normal 127 97 92 Cool 127 101 109 Warm 127 84 53

Table 6-10 White tone default setting 55" (5000 series)

White Tone e.g. 55PFL5xx7/xx Colour Temperature R G B

Normal 127 98 85 Cool 127 104 105 Warm 127 83 45

From 2011 onwards, it is not longer possible to change individual option settings in SAM. Options can only be changed all at once by using the option codes as described in section

6.4.4

.

6.4.4 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on a sticker inside the TV set. Example: The options sticker gives the following option numbers:

• 32776 00001 15421 02235

• 43847 36615 33024 00012

The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.

Diversity

Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. Refer to Chapter 2.

Technical Specs, Diversity, and

Connections.

6.4.5 Option Code Overview

Refer to the sticker in the set for the correct option codes. Important: after having edited the option numbers as described above, you must press OK on the remote control before the cursor is moved to the left!

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6.4.6 Option Bit Overview

For test purposes, please find below an overview of the Option Codes on bit level. With a bin/dec converter, you can calculate the Option Code.

Table 6-11 Option codes at bit level (Option 1 - Option 8)

Option & Bit Dec. Value Option Name Prescribed Value1)Description

Option 1 (prescribed value 327761)) Bit 15 (MSB) 32768 Video Store Streaming 1

Bit 14 16384 Multi App 00 Bit 13 8192

Bit 12 4096 Perfect Pixel 00 Bit 11 2048

Bit 10 1024 Tuner Type 000 Bit 9 512 Bit 8 256

Bit 7 128 PQ Profiles 000 Bit 6 64 Bit 5 32

Bit 4 16 DNM 01 Bit 3 8

Bit 2 4 MOP AL 0

Bit 1 2 AL Optical Syst 00 Bit 0 (LSB) 1

Option 2 (prescribed value 00001 Bit 15 (MSB) 32768 AL Shop Mode 0

Bit 14 16384 AL settings storage location 0

Bit 13 8192 Wall Adaptive AL 0

Bit 12 4096 Sunset 0

Bit 11 2048 Ambient Light 0000 Bit 10 1024 Bit 9 512 Bit 8 256

Bit 7 128 FPGA3Dact/1Ddimm 0

Bit 6 64 AL Select 0

Bit 5 32 3D Passive 0

Bit 4 16 Smart Bit Enhancement (SBE) 0

Bit 3 8 Super Resolution 0

1)

)

Caution

When manipulating option codes, know what you’re doing. Wrong option codes could damage the set. Prescribed option codes below are an example, not valid for all sets and are subject to modification. The correct option codes are always present on a sticker inside the set!

1)

0 = OFF 1 = ON

00 = none 01 = multi app 10 = AVPIP + multi app 11 = future use

00 = Pixel Plus HD 01 = Pixel Precise HD 10 = Perfect Pixel HD 11 = future use

000 = TH2603 (Europe/CH) 001 = FA2307 (Brazil) 010 = VA1E1ED2411 011 = SUT-RE2144 100 = future use 101 = future use 110 = future use 111 = future use

000 = OFF 001 = ON 010 = future use 011 = future use 100 = future use 101 = future use 110 = future use 111 = future use

00 = Perfect Natural Motion 01 = HD Natural Motion 10 = future use 11 = future use

0 = OFF 1 = ON

00 = 140 nit 01 = 200 nit 10 = 110 nit 11 = future use

0 = boost mode in shop is OFF 1 = boost mode in shop is ON

0 = stored in AL modules 1 = stored in SSB

0 = OFF 1 = ON

0000 = none 0001 = 2-sided (3/3) 0010 = 2-sided (4/4) 0011 = 2-sided (5/5) 0100 = 2-sided (6/6) 0101 = 2-sided (7/7) 0110 = 3-sided (4/7/4) 0111 = 3-sided (5/5)(9/9)(5/5) 1000 = 3-sided (3/6/3) 1001 = 3-sided (5/5)(10/10)(5/5) 1010 = 2-sided (8/8) 1011 = 3-sided (5/12/15) 1100 = 2-sided (1/1) 1101 = 2-sided (2/2) 1110 = 3-side (4/10/4) 1111 = 3-side (6/6)(11/11)(6/6)

0 = OFF 1 = ON

0 = AL2k10 1 = AL2k11

0 = 2D 1 = 3D passive

0 = off 1 = on (200 Hz board present)

0 = Super Resolution SD 1 = Super Resolution HD

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Alignments

Option & Bit Dec. Value Option Name Prescribed Value

Bit 2 4 Light Sensor Type 00

1)

Bit 1 2

Bit 0 (LSB) 1 Light Sensor 1

Option 3 (prescribed value 154211)) Bit 15 (MSB) 32768 Side IO 0

Bit 14 16384 AV3 011

1)

Bit 13 8192 Bit 12 4096

Bit 11 2048 AV2 11

1)

Bit 10 1024

Bit 9 512 AV1 00

1)

Bit 8 256

Bit 7 128 3D Prepared 0

Bit 6 64 Sound in Stand 0

Bit 5 32 Headphone 1

Bit 4 16 Seamless System 1

Bit 3 8 ViewPort 21_9/PQL 1

Bit 2 4 HDMI Side 1

Bit 1 2 HDMI 3 0

Bit 0 (LSB) 1 HDMI 2 1

Option 4 (prescribed value 022351)) Bit 15 (MSB) 32768 Cabinet 00001

1)

Bit 14 16384 Bit 13 8192 Bit 12 4096 Bit 11 2048 Bit 10 1024 Region 000

1)

Bit 9 512 Bit 8 256

Bit 7 12 8 Display MSB 1

Bit 6 64 S Video 0

Bit 5 32 Video Store USB 1

Bit 4 16 Internet software Upgrade 1

Bit 3 8 Online Service 1

Bit 2 4 WiFi 0

Bit 1 2 DLNA 1

Bit 0 (LSB) 1 Ethernet 1

Option 5 (prescribed value 438471)) Bit 15 (MSB) 32768 8 Days EPG 1

Bit 14 16384 DVBC Installation 01

1)

Bit 13 8192

Bit 12 4096 DVBT Installation 01

1)

Bit 11 2048

1)

Description

00 = future use 01 = future use 10 = future use 11 = future use

0 = OFF 1 = ON

0 = not present 1 = present

000 = none 001 = CVBS 010 = YPbPr 011 = YPbPr/LR:Europe 100 = YPbPr/HV/LR 101 = CVBS/LR:Brazil 110 = CVBS/Yc/LR 111 = YPbPr/CVBS/LR

00 = Scart/CVBS/RGB/LR 01 = CVBS 10 = YPbPr/LR 11 = none:Europe and Brazil

00 = Scart/CVBS/RGB/LR:Europe 01 = CVBS/YC/YPbPr/HV/LR 10 = CVBS/YC/YPbPr/LR 11 = YPbPr/LR:Brazil

0 = not prepared 1 = prepared

0 = OFF 1 = ON

0 = OFF 1 = ON (HDMI 4)

0 = OFF 1 = ON

Cabinet type (no detailed info available)

000 = Europe (/02, /05 & /12) 001 = AP PAL multi 010 = AP NTSC 011 = future use 100 = Latam (/78 & /77) 101 = Australia 110 = China (/93) 111 = future use

0 = display option =< 255 1 = display option > 255

0 = OFF 1 = ON

0 = OFF 1 = ON (automatic software upgradable via internet)

0 = OFF 1 = ON (connection to internet provider Philips)

0 = OFF 1 = ON (wireless connection to ethernet; no link with “Ethernet option” bit “0”)

0 = OFF 1 = PC link

0 = OFF 1 = Ethernet vonnector and HW pre sent

0 = OFF 1 = ON (country dependent)

00 = OFF 01 = Country dependent 10 = ON 11 = future use

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Option & Bit Dec. Value Option Name Prescribed Value1)Description

Bit 10 1024 DVB-S 0

Bit 9 512 DVB-C 1

Bit 8 256 DVB 1

Bit 7 128 Display Type 01000111

1)

0 = OFF 1 = ON (ATSC/DVB should be ON)

0 = analogue only 1 = DVBT (and C/S depending DVBC/S option)

Display Type (ex.: 327) Bit 6 64 Bit 5 32 Bit 4 16 Bit 3 8 Bit 2 4 Bit 1 2 Bit 0 (LSB) 1 Option 6 (prescribed value 36615 Bit 15 (MSB) 32768 E-sticker 1

Bit 14 16384 Hotel Mode 00 Bit 13 8192

Bit 12 4096 Virgin 0

Bit 11 2048 empty - Bit 10 1024 Auto Store Mode 11 Bit 9 512

Bit 8 256 Temp sensor on SSB 1

Bit 7 128 Ginga 00 Bit 6 64

Bit 5 32 MHP 00 Bit 4 16

Bit 3 8 Over the Air Download 01 Bit 2 4

Bit 1 2 DVBC light 1

Bit 0 (LSB) 1 DVBT light 1

Option 7 (prescribed value 330241)) Bit 15 (MSB) 32768 Visual Identity 1

Bit 14 16384 Red LED Config LUT 000 Bit 13 8192 Bit 12 4096

Bit 11 2048 Board Identifier 00 Bit 10 1024 Bit 9 512 Manet 0

Bit 8 256 Auto Power Down 1

Bit 7 128 Light Guide 0

Bit 6 64 E-box 0

Bit 5 32 Temp LUT 000 Bit 4 16 Bit 3 8

Bit 2 4 Temp Sensor 00 Bit 1 2

Bit 0 (LSB) 1 FAN 0

Option 8 (prescribed value 000121)) Bit 15 (MSB) 32768 MSB Cabinet 0

1)

)

1)

0 = OFF

1 = ON

00 = OFF

01 = 1V1

10 = 1V2

11 = future use

0 = ON

1 = OFF

00 = none

01 = PDC_VPS

10 = TXT page

11 = PDC_VPS_TXT

0 = OFF

1 = ON

00 = OFF

01 = Country dependent

10 = ON

11 = future use

00 = OFF

01 = Country dependent

10 = ON

11 = future use

00 = OFF

01 = Country dependent

10 = ON

11 = future use

0 = OFF

1 = ON (when DVBC Installation is OFF or when ON but selected country is OFF, this option is used)

0 = OFF

1 = ON (when DVBT Installation is OFF or when ON but se lected country is OFF, this option is used)

0 = User Interface 2k10

1 = User Interface 2k11 (always ON)

000 = LUT 0

001 = LUT 1

010 = future use

011 = future use

100 = future use

101 = future use

110 = future use

111 = future use

not used, should always be “00”

0 = all sets except Manet

1= Manet

0 = OFF

1 = ON

0 = OFF

1 = ON

0 = integrated set

1 = e-box/monitor

000 = future use

001 = future use

010 = future use

011 = future use

100 = future use

101 = future use

110 = future use

111 = future use

00 = no temp sensor

01 = temp sensor in display

10 = temp sensor on additional board

11 = temp sensor in AL module

0 = no fan

1 = fan(s) present)

Cabinet

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18310_221_090318.eps

090319

Alignments

Option & Bit Dec. Value Option Name Prescribed Value

Bit 14 16384 3D goggles 0

Bit 13 8192 empty - Bit 12 4096 3D Overdrive LUT 000 Bit 11 2048 Bit 10 1024

Bit 9 512 ISF 0

Bit 8 256 DVB-S channel decoder + new LNB 0

Bit 7 128 MSB Light Sensor type 0 Bit 6 64

Bit 5 32

Bit 4 16

Bit 3 8 WM DRM10 1

Bit 2 4 HBBTV 1

Bit 1 2 DVB-T2 Installation 0

Bit 0 (LSB) 1 DVB-T2 1

DVB-T2 Sony channel decoder

FPGA PQ

2player gaming

Note

1). Example

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a Service repair shop (SSB repair on component level) implies the reset of the NVM on the SSB. A repaired SSB in Service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit is to be set. To set all this, you can use the ComPair tool or use the “NVM editor” and “Dealer options” items in SAM (do not forget to “store”).

1)

1

1)

0

1)

1

1)

Description

0 = 2K10 Xpand 1 = 2k11 Real D

000 = no overdrive LUT 001 = LUT1 010 = LUT2 011 = LUT3 100 = LUT4 101 = LUT5 110 = LUT6 111 = LUT7

0 = OFF 1 = ON

0 = OFF 1 = channel decoder STV 0903BAC + LNBH25

0 = OFF

1 = channel decoder T2: CXD2834ER 0 = not present

1 = present 0 = OFF

1 = ON 0 = OFF

1 = ON 0 = no installation

1 = country depending 0 = OFF

1 = channel decoder 2

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of a “Service” SSB is the same as the ordering number of an initial “factory” SSB.

After a repaired SSB has been mounted in the set (set repair on board level), the type number (CTN) and production code of the TV has to be set according to the type plate of the set. For this, you can use the NVM editor in SAM. This action also ensures the correct functioning of the “Net TV” feature and access to the Net TV portals. The loading of the CTN and production code can also be done via ComPair (Model number programming).

After a SSB repair, the original channel map can be restored, provided that the original channel map was stored on a USB stick before repair was commenced and that basic functionality of the TV, needed for this procedure, was not hampered as a result of the defect. The procedure of “channel map cloning” is clearly described in the (electronic) user manual.

In case of a display replacement, reset the “Operation hours display” to “0”, or to the operation hours of the replacement display.

Figure 6-1 SSB identification

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6.6 Total Overview SAM modes

Table 6-12 SAM mode overview

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Hardware Info A. software version e.g. “Q5551_0.9.1.0 Display TV & Stand-by software version and CTN serial

B. Stand-by processor version e.g. “STDBY_83.84.0.0” C. Production code e.g. “see type plate”

Operation hours Displays the accumulated total of operation hours.TV

Errors Displayed the most recent errors Reset error buffer Clears all content in the error buffer Alignment White point Colour temperature Normal 3 different modes of colour temperature can be selected

Ambilight Select module

Dealer options Virgin mode Off/On Select Virgin mode On/Off. TV starts up / does not start up

E-sticker Off/On Select E-sticker On/Off (USP’s on-screen) Auto store mode None

Miscellaneous Hotel mode Off Hotel mode is Off

Option numbers Group 1 e.g.

Group 2 e.g.

Store Store after changing Initialise NVM N.A. Store Select Store in the SAM root menu afte r making any changes Operation hours display 0003 In case the display must be swapped for repair , you can reset

Software maintenance Software events Display Display information is for deve lopment purposes

Hardware events Display Display information is for development purposes

Test setting Digital info Current frequency: 538

Install start frequency 000 Install start frequency from “0” MHz

Install end frequency 999 Install end frequency as “999” MHz

Default install frequency

Installation Digi tal only Select Digital only or Digital + Analogue before installation

Alignments

number

switched “on/off” & every 0.5 hours is increase one

Warn

Cool White point red LCD White Point Alignment. For values, White point green White point blue

Brightness Select matrix

PDC/VPS TXT page PDC/VPS/TXT

“00008.00001.15421.02239”

“44816.34311.33024.00000”

Clear Test reboot Test cold reboot Test application crash

Clear

QAM modulation: 64-qam Display information is for development purposes Symbol rate: Original network ID: 12871 Network ID: 12871 Transport stream ID: 2 Service ID: 3 Hierarchical modulation: 0 Selected video PID: 35 Selected main audio PID: 99 Selected 2nd audio PID: 8191

Digital + Analogue

see Table 6-3

6-10 White tone default setting 55" (5000 series)

(once) with a language selection menu after the mains sw itch is turned “on” for the first time (virgin mode)

The first line (group 1) indicates hardware options 1 to 4

The second line (group 2) indicates software options 5 to 8

the “”Display operation hours” to “0”. So , this one d oes keeps up the lifetime of the display i tse lf (m ai n ly to co mp en sate the degeneration behaviour)

White tone default setting 32" (400 0 ser i es) to

EN 45Q552.4E LA 6.

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2012-Jun-29

EN 46 Q552.4E LA6.

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Development file versions Development 1 file version Display parameters

Development 2 file version 12NC one zip so ftware Display information is for development purposes

Upload to USB Channel list To upload several settings from the TV to an USB stick

Personal settings Option codes Alignments Identification data History list All (options included)

Download from USB Channel list To download several settings from the USB stick to the TV

Personal settings Option codes Alignments Identification data All (options included)

NVM editor Type number see type plate NVM editor; re key-in type number and production code after

AG code see type plate

Alignments

DISPT5.0.9.29 Acoustics parameters ACSTS

5.0.6.20 PQ - TV550 1.0.27.22 PQS- Profile set PQF - Fixed settings PQU - User styles Ambilight parameters PRFAM

5.0.5.2

Initial main software NVM version Q55x1_0.4.5.0 Flash units software Temp com file version none

Display information is for development purposes

SSB replacement

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7. Circuit Descriptions

19220_017_120224.eps

120224

Cell

FHD@120

AL

PNX85500

NR

DEI

PQ Enhancement

FRC

3D: Active

I

2

S

2 × LVDS for 4000s 4 × LVDS for 5000 s/5500s

PWM

Temp

Sensor

3D active

8x PWM

Temp

Sensor

Shop

I

2

C/Analog

CLASS-D

3D-IR

PWM: temp. ctrl Glass

BL

Audio

AL mods.

SPI

Backlight

3D goggle drive

Ambilight CPLD

FPGA

Spartan 6

LX4

Ambilight CPLD

BOOST

HDMI

9287

Hybrid

Tuner

DVB

T2

DVB-S2

Tuner

DVB

S2

32

DDR 512 MB

4 × 1 Gb (× 8)

FLASH 512 MB

CI+

ETH PHY

USB HUB

Not Applicable for 5000 series

∗

Index of this chapter:

Introduction

7.1

7.2 Power Supply

7.3 Video and Audio Processing - PNX855xx

Notes:

•Only new circuits (circuits that are not published recently) are described.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the wiring-, block- (see chapter

Block Diagrams) and circuit diagrams (see chapter

9.

Circuit Diagrams and PWB Layouts).Where necessary,

10.

you will find a separate drawing for clarification.

7.1 Introduction

The Q552.4E LA is part of the TV550 “R4” 2012 platform. It uses the (same) PNX855xx chipset as its predecessor Q552.2E LA, part of the TV550 2011 platform. The major deltas versus the Q552.2 are:

• integrated Wifi in 5000 & 5500 series

• implementation of “active” 3D for 5500 series

• 2 to 3D conversion

• TV video call feature.

Circuit Descriptions

For Service, the platform is supporting Remote Diagnostics (“IP Remote Diagnostics and Repair”). Detailed information will follow via the regular communication channels.

The Q552.4E LA chassis comes with the following stylings:

• 4000 (series xxPFL4xxx),

• 5000 (series xxPFL5xxx).

7.1.1 Implementation

Key components of this chassis are:

• PNX855xx System-On-Chip (SOC) TV Processor

• SUT-RE214Z Hybrid Tuner (DVB-T/C, analogue)

• STV6110A DVB-S Satellite Tuner

• SII9x87 HDMI Switch

• TAS5731 Class D Power Amplifier

• LAN8710 Dual Port Gigabit Ethernet media access controller.

7.1.2 TV550 Architecture Overview

For details about the chassis block diagrams refer to chapter 9.

Block Diagrams. An overview of the TV550 “R4” 2012

architecture can be found in Figure 7-1

EN 47Q552.4E LA 7.

and Figure 7-2.

Figure 7-1 Architecture of TV550 R4 platform (4000-5000 range)

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Seriessupply voltage

Class D Am p l i fi er

40x7 24 V 43x7 12 V 50x7 12 V

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EN 48 Q552.4E LA7.

19220_022_120227.eps

120227

Cell

FHD@120

PNX85500

NR DEI

PQ Enhancement

FRC

3D: Active

I

2

S

4 × LVDS 4 × LVDS

PWM

Temp

Sensor

3D active

8x PW M

Temp

Sensor

Shop

I

2

C/Analog

CLASS-D

3D-IR

PWM: te mp . ct rl Gl ass

Entry 2D3D

Backlight

3D goggle drive

FPGA

Spartan 6

LX25T

Onl y required for

Active 3D

Ambilight CPLD

BL

Audio

AL mods.

SPI

BOOST

HDMI

9287

Hybrid Tuner

DVB

T2

DVB-S2

Tuner

DVB

S2

32

DDR 512MB

4 × 1G b (× 8)

FLASH 512MB

CI+

ETH PHY

USB HUB

∗

Circuit Descriptions

Class D Ampli fie r

Seriessupply voltage

55x7 12v

Figure 7-2 Architecture of TV550 R4 platform (5500 range; supporting “active” 3D)

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7.1.3 SSB Cell Layout

19220_023_120227.eps

120227

Circuit Descriptions

EN 49Q552.4E LA 7.

Figure 7-3 SSB layout cells (top view; 4000-5000 range)

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EN 50 Q552.4E LA7.

19220_024_120227.eps

120227

Circuit Descriptions

LX25 2D-3D Processing

LX25

2012-Jun-29

Figure 7-4 SSB layout cells (5500 range; supporting “active” 3D)

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7.2 Power Supply

7.2.1 Power Supply Unit 4xx7 series

No pinning table is available. Refer to section 10.1

7.2.2 Power Supply Unit 5xx7 series

Table 7-1 Connector overview 5xx7 series, all screen sizes

and 10.2 for schematics.

Circuit Descriptions

EN 51Q552.4E LA 7.

no. 1308 1316 1M95 1M99 Description Mains to display to SSB to SSB Pin CN1 CN2 CN4 CN5

1 N A1 +3V3SB GND_AL 2 L n.c. Standby 12V3 3 n.a. n.c. GND1 GND_AL 4n.a.C1GND112V3 5 n.a. C2 +12V3 GND1 6 n.a. C3 +12V3 +12V3 7 n.a. C4 +Vsnd GND1 8 n.a. n.a. +Vsnd +12V3 9 n.a. n.a. GND_SND n.a. 10 n.a. n.a. GND_SND n.a. 11 n.a. n.a. BL_ON n.a. 12 n.a. n.a. BL_DIM n.a. 13 n.a. n.a. BL_I_CTRL n.a. 14 n.a. n.a. POK n.a.

Connector

No schematics are available.

7.3 Video and Audio Processing - PNX855xx

The PNX855xx is the main audio and video processor (or System-on-Chip) for this platform. It has the following features:

• Multi-standard digital video decoder (MPEG-2, H.264, MPEG-4)

• Integrated DVB-T/DVB-C channel decoder

• Integrated CI+

• Integrated motion accurate picture processing (MAPP2)

• High definition ME/MC

• 2D LED backlight dimming option

• Embedded HDMI HDCP keys

• Extended colour gamut and colour booster

• Integrated USB2.0 host controller

• Improved MPEG artefact reduction compared with PNX8543

• Security for customers own code/settings (secure flash).

The TV550 combines front-end video processing functions, such as DVB-T channel decoding, MPEG-2/H.264 decode, analog video decode and HDMI reception, with advanced back-end video picture improvements. It also includes next generation Motion Accurate Picture Processing (MAPP2). The MAPP2 technology provides state-of-the-art motion artifact reduction with movie judder cancellation, motion sharpness and vivid colour management. High flat panel screen resolutions and refresh rates are supported with formats including 1366 × 768 @ 100Hz/120Hz and 1920 × 1080 @ 100Hz/120Hz. The combination of Ethernet, CI+ and H.264 supports new TV experiences with IPTV and VOD. On top of that, optional support is available for 2D dimming in combination with LED backlights for optimum contrast and power savings up to 50%.

For a functional diagram of the PNX855xx, refer to Figure 7-5

.

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2012-Jun-29

EN 52 Q552.4E LA7.

18770_241_100201.eps

111103

TS out/in for

TS input

CVBS, Y/C,

LVDS for

analog CVBS

SPDIF

Low-IF

SSIF, LR

HDMI

CI/CA

MPEG

PRIMARY

LVDS

VIDEO

SECONDARY

MEMORY

VIDEO

3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

450 MHz

560 MHz

I2C

PWM

GPIO IR ADC UART I2C GPIO Flash

analog audio

I2S SPDIF

SYSTEM

USB 2.0

PNX85500x

DVB-T/C

channel decoder

DVB

AV-PIP

SPI

MPEG/H.264

RECEIVER

(8051)

CONTROLLER

AND DECODE

DECODER

PCMCIA

RGB

PROCESSOR

SYSTEM

CONTROLLER

DECODER

VIDEO

24KEf CPU

MIPS32

x 8

AV-DSP

REDUCTION

AND NOISE

DE-INTERLACE

OUTPUT

VIDEO

SUB-PICTURE

ENCODER

OUTPUT

VIDEO

quad channel)

(single, dual or

flat panel display

DRAWING

ENGINE

DMA BLOCK

Motion-accurate pixel processing

SD

Memory

Card

Ethernet

MAC

Circuit Descriptions

Figure 7-5 PNX855xx functional diagram

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8. IC Data Sheets

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the electrical diagrams (with the exception of “memory” and “logic” ICs).

IC Data Sheets

EN 53Q552.4E LA 8.

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EN 54 Q552.4E LA8.

18310_300_090319.eps

100416

Block diagram

Pinning information

VBST1

NC EN1 VO1

VFB1

NC

GND

TEST1

NC

VFB2

VO2 EN2

NC

VBST2

DRVH1

LL1

DRVL1

PGND1

TRIP1 VIN VREG5

V5FILT

TEST2

TRIP2 PGND2

DRVL2

LL2 DRVH2

28 27 26 25 24 23 22 21 20 19 18 17 16

1 2

3

4 5 6 7

8

9

10 11 12 13 14

TPS5 3124

15

IC Data Sheets

8.1 Diagram 10-3-3 DC/DC B02A, TPS53126PW (IC7U03)

2012-Jun-29

Figure 8-1 Internal block diagram and pin configuration

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IC Data Sheets

19220_028_120227.eps

120227

Block diagram

Pinning information

SOP-8 (Exposed Pad)

GND

PGOOD

EN

VDD

VIN

NC

ADJ VOUT

2

3

4

5

8

7 6

GND

9

RT9025

OCP

Error

Amplifier

POR

EN

GND

ADJ

VIN

PGOOD

VOUT

VDD

Mode

+

-

+

-

0.8V

0.72V

OTP

SD

8.2 Diagram 10-3-4 DC/DC, 1.8 V to 1.2 V conversion B02B, RT9025 (IC 7UA4-1)

EN 55Q552.4E LA 8.

Figure 8-2 Internal block diagram and pin configuration

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2012-Jun-29

EN 56 Q552.4E LA8.

19220_030_120227.eps

120227

Block diagram

Pinning information

(TOP VIEW)

RT8293A

SOP-8 (Exposed Pad)

BOOT

VIN

SW

GND

SS

EN

FB

COMP

GND

2

3

4

5

6

7

8

9

V

A

+

-

+

-

+

-

UV

Comparator

Oscillator

Foldback

Control

0.4V

Internal

Regulator

+

-

2.7V

Shutdown

Comparato r

Current Sense

Amplifier

BOOT

VIN

GND

SW

FB

EN

COMP

3V

5k

V

A

V

CC

6µA

Slope Comp

Current

Comparator

+

-

EA

0.8V

SRQ

Q

SS

+

-

1.2V

Lockout

Comparato r

V

CC

+

IC Data Sheets

8.3 Diagram 10-3-5 DC/DC, 12 V to 5 V/3.3 V conversion B02C, RT8293AHGSP (IC 7UD0)

85mΩ

Figure 8-3 Internal block diagram and pin configuration

2012-Jun-29

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IC Data Sheets

19220_029_120227.eps

120227

Block diagram

Pinning information

TPS54227

8.4 Diagram 10-3-6 DVBS supply B03A, TPS54227DDA (IC 7T00)

EN 57Q552.4E LA 8.

SGND

PGND

SGND

VFB

VREG5

SS

EN

Softstart

EN

Logic

Ref

SS

VIN

8

VREG5

+ +

PWM

-

SS

Control Logic

1 shot

ON

XCON

VREG5

7

6

5

VBST

SW

Capacitor

GND

1

2

3

4

VIN

VO

Ceramic

SW

+

OCP

-

PGND

VIN

VREG5

REF

UVLO

Ref

TSD

Protection

Logic

1

EN

2

VFB

VIN

VBST

5

6

TPS54227

(HSOP8)

3

4

VREG5

SS

Power PAD

SW

GND

7

8

Figure 8-4 Internal block diagram and pin configuration

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2012-Jun-29

EN 58 Q552.4E LA8.

19220_027_120227.eps

120227

Block diagram

Pinning information

GND

DSQOUTNC

DSQIN/

EXTM

VUP

VCC

PGND

FLT

NC

LX-A

SDA ISEL NCNC

DETIN

NC

VOUT

NC

VBYP

BPSW

ADDR NC

SCL

1

2

3

4

5

6

18

17

16

15

14

13

7 8 9 121110

192021222324

GND

DSQOUTNC

DSQIN

VUP

VCC

PGND

FLT

NC

LX

SDA ISEL NCNC

DETIN

NC

VOUT

NC

VBYP

BPSW

ADDR NC

SCL

1

2

3

4

5

6

18

17

16

15

14

13

7 8 9 121110

192021222324

VUP

SDASCL

ISEL

ADDR

DSQIN

Isense

PWM CTRL

PGND

DAC Drop control Tone ctrl Diagnostics Protections

I2C Digital core

LX

Voltage

reference

VCCGND BYP

DETIN

Tone

detector

Current

Limit

selection

DSQOUT

VOUT

Gate ctrl

Linear

Regulator

FLT

BPSW

LNBH25

IC Data Sheets

8.5 Diagram 10-3-7 Core voltage supply for DVBS demodulator B03B, LNBH25PQ (IC 7TP2)

2012-Jun-29

Figure 8-5 Internal block diagram and pin configuration

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8.6 Diagram 10-3-9 PNX 85500: Power B05A, PNX855xx (IC7S00)

18770_308_100217.eps

100217

Block diagram

Pinning information

TS out/in for

TS input

CVBS, Y/C,

LVD S for

analog CVBS

SPDIF

Low-IF

SSIF, LR

HDMI

CI/CA

MPEG

PRIMARY

LVD S

VIDEO

SECONDARY

MEMORY

VIDEO

3D COMB

DIGITAL IF

AUDIO DEMOD

AUDIO IN

HDMI

SCALER,

AUDIO DSP

AUDIO DACS

AUDIO OUT

450 MHz

500 MHz

I2C

PWM

Px_x IR ADC UART I2C GPIO Flash

analog audio

I2S

SPDIF

SYSTEM

USB 2.0

PNX8550x

DVB-T/C

channel decoder

DVB

AV-PIP

SPI

RECEIVER

(8051)

CONTROLLER

AND DECODE

DECODER

PCMCIA

RGB

PROCESSOR

SYSTEM

CONTROLLER

MULTI-

STANDARD

VIDEO

DECODER

24KEf CPU

MIPS32

x 10

AV-DSP

REDUCTION

AND NOISE

DE-INTERLACE

OUTPUT

VIDEO

SUB-PICTURE

ENCODER

OUTPUT

VIDEO

quad channel)

(single, dual or

flat panel display

DRAWING

ENGINE

Scatter/Gather

TS Demux

Motion-accurate pixel processing

SD

Memory

Card

Ethernet

MAC

analog Y/C

Direct-IF

PNX8550xE

Transparent top view

2468 10 121314

15 171619

18 20

21 23

22 242526

1 3 57911

ball A1 index area

AB AD

AA

AC

Y

W

V

U

R

N

T

P

M

L

K

J

H

F

D

G

E

C

B

A

AF

AE

IC Data Sheets

EN 59Q552.4E LA 8.

Figure 8-6 Internal block diagram and pin configuration

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2012-Jun-29

EN 60 Q552.4E LA8.

18770_309_100217.eps

110602

Block diagram

Pinning information

Bias

Control

8

1

7

4

V

O1

V

O2

V

DD

5

2

3

6

IN1−

BYP

TPA6111A2

ASS

SHUTDOWN

V

DD

/2

IN2−

−

+

−

+

1 2 3 4

8 7 6 5

V

O1

IN1−

BYPASS

GND

V

DD

V

O2

IN2− SHUTDOWN

D OR DGN PACKAGE

(TOP VIEW)

8.7 Diagram 10-3-17 PNX 85500: Headphone B05I, TS489IST (IC 7NN1)

IC Data Sheets

Figure 8-7 Internal block diagram and pin configuration

2012-Jun-29

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8.8 Diagram 10-3-23 PNX 85500: Temperature sensor B05O, LM75BDP (IC 7USA)

18770_300_100217.eps

100217

Block diagram

Pinning information

LM75B

SDA

V

CC

SCLA0

OS

DNG1AA2

BIAS

REFERENCE

BAND GAP

TEMP SENSOR

OSCILLATOR

POWER-ON

RESET

11-BIT

SIGMA-DELTA

A-to-D

CONVERTER

POINTER

REGISTER

TIMER

COMPARATOR/

INTERRUPT

COUNTER

LOGIC CONTROL AND INTERFACE

CONFIGURATION

REGISTER

THYST

REGISTER

TOS

REGISTER

TEMPERATURE

REGISTER

LM75BDP

VADS

CC

0ALCS 1ASO

2ADNG

1 2

3 4

6 5

8 7

IC Data Sheets

EN 61Q552.4E LA 8.

Figure 8-8 Pin configuration

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2012-Jun-29

EN 62 Q552.4E LA8.

19220_086_120229.eps

120229

Block diagram

Pinning information

SSTIMER

NC

PLL_FLTP

VR_ANA

PBTL

AVSS

PLL_FLTM

BST_A

NC

PVDD_AB

OUT_A

RESET

PVDD_AB

STEST

NDP

GID_RV

SER_CSO

OSSVD

DVDD

KLCM

LES_A

KLCS

NIDS

KLCRL

DDVA

ADS

LCS

DVSS

GND

VREG

B_TSB

CN

C_TUO

PVDD_CD BST_D

BA_DNGP

B_TUO

DC_DNGP

OUT_D

AGND

BA_DNGP

CN

DC_DNGP

PVDD_CD

C_TSB

CN

GVDD_OUT

(Top View)

TAS5731

1 2

3

4 5 6 7

8

9 10 11 12

131415 161718 19 20

21 222324

25

26

27

28

29

30

31

32

484746

45 44

43 42 41 40 39 38 37

36 35 34 33

MCLK

SCLK

LRCLK

Protection

Logic

Click and Pop

Control

DigitalAudio Processor

(DAP)

SDA

SCL

4 -Order

th

Noise Shaper

and PWM

S

R C

Sample Rate

Autodetect

and PLL

Serial

Control

Microcontroller

Based System Control

Terminal Control

OUT_A

OUT_B

2HB

FET Out

OUT_C

OUT_D

2HB

FET Out

SDIN

Serial

Audio

Port

TAS5731

IC Data Sheets

8.9 Diagram 10-3-25 Class-D amplifier B06A, TAS5731PHP (IC 7D60)

2012-Jun-29

Figure 8-9 Internal block diagram and pin configuration

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8.10 Diagram 10-3-26 USB hub B06B, CY7C65632-28LTXCT (IC 7FL5)

19220_027_120227.eps

120227

Block diagram

Pinning information

GND

DSQOUTNC

DSQIN/

EXTM

VUP

VCC

PGND

FLT

NC

LX-A

SDA ISEL NCNC

DETIN

NC

VOUT

NC

VBYP

BPSW

ADDR NC

SCL

1

2

3

4

5

6

18

17

16

15

14

13

7 8 9 121110

192021222324

GND

DSQOUTNC

DSQIN

VUP

VCC

PGND

FLT

NC

LX

SDA ISEL NCNC

DETIN

NC

VOUT

NC

VBYP

BPSW

ADDR NC

SCL

1

2

3

4

5

6

18

17

16

15

14

13

7 8 9 121110

192021222324

VUP

SDASCL

ISEL

ADDR

DSQIN

Isense

PWM CTRL

PGND

DAC Drop control Tone ctrl Diagnostics Protections

I2C Digital core

LX

Voltage

reference

VCCGND BYP

DETIN

Tone

detector

Current

Limit

selection

DSQOUT

VOUT

Gate ctrl

Linear

Regulator

FLT

BPSW

LNBH25

IC Data Sheets

EN 63Q552.4E LA 8.

Figure 8-10 Internal block diagram and pin configuration

back to

div. table

2012-Jun-29

EN 64 Q552.4E LA8.

18770_302_100217.eps

100217

Block diagram

Pinning information

10M Rx

Logic

100M Rx

Logic

DSP System:

Clock

Data Recovery

Equalizer

Analog-to-

Digital

100M PLL

Squelch &

Filters

10M PLL

Receive Section

Central

Bias

HP Auto-MDIX

Management

Control

SMI

RMII / MII Logic

TXP / TXN

TXD[0:3]

TXEN TXER

TXCLK

RXD[0:3]

RXDV RXER

RXCLK

CRS

COL/CRS_DV

MDC

MDIO

LED1 LED2

LED Circuitry

MODE Control

nINT

nRST

RXP / RXN

10M Tx

Logic

10M

Transmitter

100M Tx

Logic

100M

Transmitter

Transmit Se ction

PLL

XTAL1/CLKIN XTAL2

MODE0 MODE1 MODE2

PHY Address Latches

PHYAD[0:2]

Auto-

Negotiation

Interrupt

Generator

RMIISEL

MDIX

Control

Reset

Control

RBIAS

VDD2A LED2 /n INTSEL LED1/REGOFF

XTAL2

XTAL1/CLKIN

VDDCR

RXD3/PHYAD2

RXCLK/PHYAD1

RXD2/RMIISEL

RXD1/MODE1

RXD0/MDE0

VDDIO

RXER/RXD4/PHYAD0

CRS

MDIO

COL/CRS_DV/MODE2

TXD2

MDC

nRST nINT/TXER/TXD4

TXD0 TXEN TXCLK

TXD1

RBIAS

TXD3

TXN

RXDV

RXN

VDD1A

TXP

RXP

1 2 3 4 5 6 7 8

SMSC

LAN8710/LAN8710i

32 PIN QFN

(Top V iew )

9

10

11

12

13

14

15

22 21 20 19 18 17

28

27

26

2516

24 23

32

31

30

29

VSS

IC Data Sheets

8.11 Diagram 10-3-27 Ethernet & service B06C, LAN8710A-EZKH (IC 7N10)

2012-Jun-29

Figure 8-11 Internal block diagram and pin configuration

back to

div. table

8.12 Diagram 10-3-28 HDMI B06D, SiI9x87B (IC 7NC1)

18770_303_100217.eps

100217

Block diagram

Pinning information

IC Data Sheets

EN 65Q552.4E LA 8.

Figure 8-12 Internal block diagram and pin configuration

back to

div. table

2012-Jun-29

EN 66 Q552.4E LA8.

F_15710_166.eps

100402

Block diagram

Pinning information

DPAK

LD1117DT

IC Data Sheets

8.13 Diagram 10-3-29 FPGA, power & control B07A, LD1117DT12 (IC 7J20)

Figure 8-13 Internal block diagram and pin configuration

2012-Jun-29

back to

div. table

8.14 Diagram 10-3-31 Tuner, channel decoder B08A, CXD2834ER (IC 7KC0)

19220_025_120227.eps

120227

Block diagram

Pinning information

TSIF

I2C IF

SCL

SDA

RFAIN

TTUSCL TTUSDA

TAINP (IF)

TAINM (IF)

GPIO1 (PWM)

TIFAGC

XTALI

XTALO

41MHz or

20.5 MHz

IF+ IF-

(RFAGC-MON)

(RFAGC)

IFAGC

SCL SDA

TUNER

MPEG

Decoder

TSCLK

TSVALID

TSSYNC

TSDATA7-0

TSCLK

TSVALID

TSSYNC

TSDATA7-0

SCL SDA

DVB-T2

Demodulator

LDPC/BCH

Decoder

Stream

Processor

RS Decoder

TS

Smoothing

DVB-T

Demodulator

DVB-C

Demodulator

OSC

PLL

10-bit

ADC

12-bit

ADC

AGC

GPIO

IC Data Sheets

EN 67Q552.4E LA 8.

Figure 8-14 Internal block diagram and pin configuration

back to

div. table

2012-Jun-29

EN 68 Q552.4E LA8.

18770_304_100217.eps

110601

Block diagram

STV6110AT

PLL, dividers

Amplifier

RF_IN

IP

I

2

C bus interface

IN

QP

QN

AGC

RF_OUT

SCL

XTAL_IN

SDA

DC offset compensation

XTAL_OUT

XTAL_INN

IC Data Sheets

8.15 Diagram 10-3-32 DVBS, FE B08B, STV6110AT (IC 7RA0)

Figure 8-15 Internal block diagram and pin configuration

2012-Jun-29

back to

div. table

9. Block Diagrams

9.1 Wiring dia gram 4000 series 32"

WIRING DIAGRAM 32" 4000 Series

DISPLAY

PANEL

MAIN POWER SUPPLY

(1053)

1316

Block Diagrams

14P

1M95

EN 69Q552.4E LA 9.

WOOFER

(SP02)

1M95

14P

1D02

1G51

3P

51P

B

SSB

(1150)

MOD CONTROL BOARD (Q1057)

TWEETER

(SP01)

INLET

E1M95

E1G51

TO DISPLAY

SENSOR BOARD (Q1056)

1D01

1C20

4P

11P

TWEETER

(SP01)

1M95 (B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51 (B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1C20 (B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

1D01 (B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02 (B06A)

1. LEFT-+

2. GND

3. RIGHT--

2012-Jun-29

back to

div. table

19220_018_120224.eps

120224

9.2 Wiring dia gram 4000 series 37"

WIRING DIAGRAM 37" 4000 Series

19220_019_120224.eps

120224

1C20

(B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

1D01

(B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02

(B06A)

1. LEFT-+

2. GND

3. RIGHT--

1M95

(B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51

(B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

MAIN POWER SUPPLY

(1053)

TWEETER

(SP01)

TWEETER

(SP01)

SSB

(1150)

B

SENSOR BOARD (Q1056)

MOD CONTROL BOARD (Q1057)

WOOFER

(SP02)

1G51

51P

1M95

14P

1D02

3P

1C20

11P

1M95

14P

1316

INLET

DISPLAY

PANEL

1D01

4P

E1G51

E1M95

TO DISPLAY

Block Diagrams

EN 70Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.3 Wiring dia gram 4000 series 42"

WIRING DIAGRAM 42" 4000 series

WOOFER

(SP02)

Block Diagrams

EN 71Q552.4E LA 9.

DISPLAY

PANEL

1316

MAIN POWER SUPPLY

(1053)

14P

1M95

E1M95

1M95

14P

1D02

1G51

3P

51P

B

SSB

(1150)

MOD CONTROL BOARD

(Q1057)

TWEETER

(SP01)

INLET

TO DISPLAY

SENSOR BOARD (1122)

SENSOR BOARD (Q1056)

E1G51

1D01

1C20

4P

11P

TWEETER

(SP01)

1M95 (B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51 (B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1C20 (B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

1D01 (B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02 (B06A)

1. LEFT-+

2. GND

3. RIGHT--

2012-Jun-29

back to

div. table

19220_020_120224.eps

120224

9.4 Wiring dia gram 4000 series 47"

WIRING DIAGRAM 47" 4000 series

19220_021_120224.eps

120224

1D01 (B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02 (B06A)

1. LEFT-+

2. GND

3. RIGHT--

1M95 (B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51 (B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1C20 (B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

MAIN POWER SUPPLY

(1053)

WOOFER

(SP02)

SENSOR BOARD (1122)

MOD CONTROL BOARD

(Q1057)

TWEETER

(SP01)

TWEETER

(SP01)

1M95

INLET

DISPLAY

PANEL

TO DISPLAY

14P

SSB

(1150)

B

1G51

51P

1D02

3P

1C20

11P

1D01

4P

1M95

14P

E1G51

E1M95

SENSOR BOARD (Q1056)

Block Diagrams

EN 72Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.5 Wiring dia gram 5000 & 5500 series 32"

WIRING DIAGRAM 32" 5000 and 5500 Series

19220_006_120215.eps

120223

1D01

(B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02

(B06A)

1. LEFT-+

2. GND

3. RIGHT--

1M95

(B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51

(B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1G50

(B09A)

1. GND

2. GND | | | |

41.

1C30

(B06B)

1. +5V

2. USB-WIFI-DDn

3. USB-WIFI-DDp

4. GND

1C20

(B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

MAIN POWER SUPPLY

(1005)

WOOFER

(5214)

TWEETER

(5216)

TWEETER

(5216)

SSB

(1150)

B

SENSOR BOARD (1122)

MOD CONTROL BOARD (1114)

WIFI (1115)

1G51

51P

1G50

41P

1M95

14P

1D02

3P

1C30

4P

1C20

11P

1M95

14P

1316

2p3

1308

8G51

8G50

INLET

8308

8M95

DISPLAY

PANEL

TO DISPLAY

1D01

4P

8C20

8F24

Block Diagrams

EN 73Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.6 Wiring dia gram 5000 & 5500 series 40"

WIRING DIAGRAM 40" 5000 and 5500 Series

19220_013_120223.eps

120223

1D01 (B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02 (B06A)

1. LEFT-+

2. GND

3. RIGHT--

1M95 (B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51 (B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1G50 (B09A)

1. GND

2. GND | | | |

41.

1C30 (B06B)

1. +5V

2. USB-WIFI-DDn

3. USB-WIFI-DDp

4. GND

1C20 (B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

MAIN POWER SUPPLY

(1005)

WOOFER

(5214)

TWEETER

(5216)

TWEETER

(5216)

SSB

(1150)

B

SENSOR BOARD (1122)

MOD CONTROL BOARD (1114)

WIFI (1115)

51P

1G51

1G50

1M95

1D02

1C30

1C20

1M95

14P

1316

2p3

1308

INLET

8M95

DISPLAY

PANEL

TO DISPLAY

1D01

8C20

8F24

8308

3P

14P

41P4P4P11P

8G50

8G51

Block Diagrams

EN 74Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.7 Wiring dia gram 5000 & 5500 series 46"

WIRING DIAGRAM 46" 5000 and 5500 Series

19220_008_120223.eps

120223

1D01

(B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

1D02

(B06A)

1. LEFT-+

2. GND

3. RIGHT--

1M95

(B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G51

(B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1G50

(B09A)

1. GND

2. GND | | | |

41.

1C30

(B06B)

1. +5V

2. USB-WIFI-DDn

3. USB-WIFI-DDp

4. GND

1C20

(B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

MAIN POWER SUPPLY

(1005)

WOOFER

(5214)

SSB

(1150)

B

SENSOR BOARD (1122)

MOD CONTROL BOARD

(1114)

WIFI (1115)

TWEETER

(5216)

TWEETER

(5216)

1G51

1G50

1M95

1D02

1C20

1M95

1316

2p3

1308

INLET

8M95

DISPLAY

PANEL

TO DISPLAY

8C20

8F24

14P

51P

41P

3P

11P

1C30

1D01

4P

8308

14P

8G51

8G50

Block Diagrams

EN 75Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.8 Wiring dia gram 5000 series 55"

WIRING DIAGRAM 55" 5000 and 5500 series

Block Diagrams

EN 76Q552.4E LA 9.

DISPLAY

PANEL

MAIN POWER SUPPLY

(1005)

2p3

1308

1M95 14P

8M95

8G50

1M95

14P

1D02

1G51

1G50

3P

51P

41P

B

SSB

(1150)

MOD CONTROL BOARD

(1114)

TWEETER

(5216)

WIFI (1115)

WOOFER

(5214)

8F24

8308

INLET

8G51

TO DISPLAY

SENSOR BOARD (1122)

8C20

1D01

1C30

1C20

4P

11P

TWEETER

(5216)

1M95 (B01A)

1. +3V3STBY

2. STANDBY

3. GND

4. GND

5. +12Vin

6. +12Vin

7. +12VAUDIO

8. +12VAUDIO

9. GND

10. GND

11. BL-ON-1

12. BL-DIM-1

13. BL-I-CTRL-1

14. POWER-OK-1

1G50 (B09A)

1. GND

2. GND | | | |

41.

1G51 (B09A)

1. +VDISP

2. +VDISP

3. +VDISP

4. +VDISP | |

51.

1C20 (B01B)

1. LIGHT-SENSOR

2. 3D-LED

3. LED-2

4. GND

5. KEYBOARD

6. +3V3-STANDBY

7. RC

8. +5V

9. SCL-SET

10. GND

11. SDA-SET

1D01 (B06A)

1. LEFT-+

2. LEFT--

3. RIGHT-+

4. RIGHT--

2012-Jun-29

1D02 (B06A)

1. LEFT-+

2. GND

3. RIGHT--

back to

div. table

1C30 (B06B)

1. +5V

2. USB-WIFI-DDn

3. USB-WIFI-DDp

4. GND

19220_096_120301.eps

120301

9.9 Block Diagram Video

VIDEO

COMMON INTERFACE

B05G

1R01

1RA0

AGC1 IF1-_P IF1-_N

IF2-_N

IF2-_P

AGC2

1P05

1 3 4 6 7

9 10 12

1P04

1

3

4

6

7

9 10 12

1P03

1

3

4

6

7

9 10 12

1P02

1

3

4

6

7

9 10 12

+3V3-HDMI

4

30

16M

31

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

7RA0 STV6110A

DVB-S

TUNER

4

5KC8

2

5KC9

3

5FA5

8

5FA4

7

9

DVBS-FE

B08B

SAT IN

TUNER-CHANNEL DECODER

B08A

1F00 SUT-RE214Z

RF IN

MAIN HYBRID

TUNER

HDMI

B06D

1

18 2

19

HDMI SIDE

CONNECTOR

1

18 2

19

HDMI 3

CONNECTOR

1

18 2

19

HDMI 2

CONNECTOR

1

18 2

19

HDMI 1

CONNECTOR

3KA0 3KA1

3FA4

3FA3

9,27,64

21 20 32 18 19

2

IF-N-DVBT2 IF-P-DVBT2

7NC1 SII9287BC

26 25 24 23

RXD

22 21 20 19

72 71 70 69

RXA

68 67 66 65

8 7 6 5

RXB

4 3 2 1

18 17 16 15

RXC

14 13 12 11

VCC33

IF_AGC

IP

IM

XTAL

QP QM

AGC

HDMI

SWITCH

TXC_P TXC_N

TX0_P

TX0_N

TX1_P

TX1_N

TX2_P

TX2_N

7RA1 STV0903BAC

7 8

122

12 11

16

62 63 60 61 58 59 56

57

DVB-S

CHANNEL

DECODER

B05L

B05N

B05M

78 75 74 73

ANALOGUE EXTERNALS A

EXT 1

VGA

10

15

5

1

6

11

VGA

CONNECTOR

ANALOGUE EXTERNALS B

EXT 3

Block Diagrams

TS-INT-VALID

TS-INT-SOP

TS-INT-CLOCK

TS-INT-DATA

ONLY **PFL***7/K**

1VA1

10

14

18

5

7N05EF7N06

6

17

9

1N05

1 2

3 13 14

CONDITIONAL

EF

7N03

PCMCIA

ACCESS

B08A

5KC1 5KC0

B05K

1P00

17 18 51 52

68P

MDO(0-7)

TUNER-CHANNEL DECODER

9RC2-2

9RC2-3

7KC0 CXD2834R

DVBT2

CHANNEL

DECODER

2KCF

2KCE

3KCB

3KCA

48

37 38

PNX85500: ANALOG VIDEO

3S4V

3S4W

3S4U

AV1-R AV1-G AV1-B

AV1-CVBS

AV1-STATUS

AV1-BLK

R-VGA G-VGA B-VGA

H-SYNC-VGA

V-SYNC-VGA

AV3-Y

AV3-PB

AV3-PR

HDMIA-RXC+

HDMIA-RXCHDMIA-RX0+

HDMIA-RX0-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX2+

HDMIA-RX2-

B05B

STANDBY CONTROLLER

+5VCA

2S77

2S78

7F01 74LVC245APW

BUFFER

CA-MDI(0-7)

9RC2-1

9RC2-4

4 3 5 8

20

CA-MDO(0-7)

TS-CHDEC-VALID

TS-CHDEC-SOP TS-CHDEC-CLK

TS-CHDEC-DATA

TS-CHDEC-VALID TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

ONLY **PFL***7/T**

SOC-IF-P

SOC-IF-N

SOC-IF-AGC

CVBS-MON-OUT1

+3V3

EN 77Q552.4E LA 9.

B05

7S00 PNX85637EB

B05F

MD0

MDI

R23

TNR_SER1_MIVAL

R22

TNR_SER1_SOP

T22

TNR_SER1_MICLK

T21

TNR_SER1_DATA

B05K

AE12

TUNER_P

AF12

TUNER_N

AD12

IF_AGC

AC13

AV1_R

AE13

AV1_G

AD13

AV1_B

AB15

CVBS_Y1

AF11

CVBS1_OUT

AF16

VGA_R

AD16

VGA_G

AE16

VGA_B

AB18

HSYNC_IN

AC18

VSYNC_IN

AE15

Y_G1

AD15

PB_B1

AC15

PR_R_C1

B05E

W25

RXC_A_P

W26

RXC_A_N

V25

RX2_A_P

V26

RX2_A_N

U25

RX1_A_P

U26

RX1_A_N

T25

RX0_A_P

T26

RX0_A_N

W24

RREF

3S0W

+3V3

PNX85500

CONDITIONAL ACCESS

ANALOG VIDEO

HDMI_DV

VIDEO OUT-LVDS

B05J

LOUT1

LOUT2

OR

LOUT3

LOUT4

FPGA - I/O BANKS

B07B

STANDBY

B05B

B05C

CONTROLLER

MIPS

USB_DN USB_DP

AF24 AE23 AF25 AF23

R26 R25

PNX-SPI-CLK PNX-SPI-SDO PNX-SPI-SDI PNX-SPI-CS-BLn

B06B

USB-DM

USB HUB

USB-DP

PNX85637

NANDFLASH

B05F

B05E

NAND_RDY1

SDRAM

XIO_D

NAND_CE1

NAND_WP_

VREF_1 VREF_2

E21 F21 A21

A2 V1

DQ

A

B05F

XIO-D(00-07)

NAND-CE1n

NAND-RDY1n

NAND-WPn

B04A

DDR2-VREF-CTRL2 DDR2-VREF-CTRL3

D(0-7)

NANDFLASH

DDR

7B00 EDE1108AGBG

SDRAM 128Mx8

VDDL

B09A

B10A

7S0A H27U4G8F2DTR

NAND

FLASH

9 7

19

VCC

12,37

VREF

VIDEO OUT - LVDS

FPGA I/O BANKS

PX1

PX2

PX3

PX4

1FL5

+3V3

7B01 EDE1108AGBG

D(8-15)

SDRAM 128Mx8

VREF

VDDL

7K01 XC65LX25

FPGA

2D>3D

7J01 XC65LX4

67 66 62 61

7FL5 CY7C65632

1 2

11

12M

10

D(16-23)

PX1

PX2

PX3

PX4

BL

FPGA

BL

USB HUB

7B02 EDE1108AGBG

SDRAM 128Mx8

VREF

VDDL

BL-DIM1-8

27

AMBI-SPI-OUT-MOSI

26

AMBI-SPI-OUT-CCLK

15 16

12 13

6 7

3 4

USB1-DM

USB2-DM

USB3-DM

USB-WIFI-DDn USB-WIFI-DDP

D(24-31)

PX1

PX2

PX3

PX4

B01A

B01B

USB1-DP

USB2-DP

USB3-DP

DDR2-D(0-31)

7B03 EDE1108AGBG

SDRAM 128Mx8

VREF

VDDL

A1 E2A1 E2A1E2A1 E2

DDR2-A(0-14)

1G50

32

TO DISPLAY

ONLY 5000 SERIES

3

100Hz PANEL SSB 3139 123 6532x

1G51

40

TO DISPLAY

11

ONLY x000 SERIES SSB 3139 123 6532x

1G50

32

TO DISPLAY

3

1G51

40

TO DISPLAY

11

ONLY 5500 SERIES

1M54

1

9

1A04

3

5

1P08

1 2 3 4

1P07

1 2 3 4

1P06

1 2 3 4

1C30

1 2 3 4 5

SSB 3139 123 6530x

TO PSU

4321

SIDE USB

CONNECTOR

19220_003_111223.eps

POWER CONNECTORS

INTERFACE CONNECTORS

+5V-USB1

+5V-USB2

+5V-USB3

+5V

+1V8 DDR2-VREF-DDR

RES

111223

2012-Jun-29

back to

div. table

9.10 Block Diagram Audio

B05

PNX85500

B05L

ANALOGUE EXTERNALS A

B05G

COMMON INTERFACE

B08A

TUNER-CHANNEL DECODER

B08A

TUNER-CHANNEL DECODER

B08B

DVBS-FE

B04A

DDR

B06B

USB HUB

B05F

NANDFLASH

B06D

HDMI

B05K

PNX85500: ANALOG VIDEO

19220_002_111223.eps

111223

AUDIO

ONLY **PFL***7/K**

ONLY **PFL***7/T**

B05M

ANALOGUE EXTERNALS B

B05H

PNX85500 AUDIO

B06A

CLASS-D AMPLIFIER

PASSIVE 2.1

ACTIVE 2.1

2.0

B05I

HEADPHONE

AUDIO-MUTE-UP

DETECT2

+3V3

+5V

+5VCA

SOC-IF-AGC

SOC-IF-P

SOC-IF-N

HDMIA-RXC-

HDMIA-RX0+

HDMIA-RX0-

HDMIA-RX1+

HDMIA-RX1-

HDMIA-RX2+

HDMIA-RX2-

HDMIA-RXC+

IP IM

XTAL

QP QM

AGC

TS-INT-VALID

TS-INT-SOP

TS-INT-CLOCK

TS-INT-DATA

TS-CHDEC-VALID

TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

IF_AGC

TS-CHDEC-VALID

IF-N-DVBT2

TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

IF-P-DVBT2

USB1-DM

DDR2-VREF-CTRL3

DDR2-VREF-CTRL2

USB-DM

USB-DP

XIO-D(00-07)

DDR2-VREF-DDR

+1V8

DDR2-A(0-14)

USB2-DM

USB2-DP

USB3-DM

USB3-DP

+5V-USB3

+5V-USB2

USB-WIFI-DDn USB-WIFI-DDP

NAND-CE1n

NAND-RDY1n

NAND-WPn

USB1-DP

+5V-USB1

+3V3

CA-MDO(0-7)

MDO(0-7)

CA-MDI(0-7)

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

AUDIO-IN4-L

AUDIO-IN4-R

AUDIO-IN1-L

+3V3-HDMI

SPDIF-OUT-PNX

SEL-HDMI-ARC

+3V3

AV1_B

DDR2-D(0-31)

D(24-31)

D(16-23)

D(8-15)

D(0-7)

AE10

AV1_G

CVBS_Y1

AUDIO-IN1-R

AUDIO-IN3-L

AUDIO-IN3-R

+3V3

SPDIF-OPT

eHDMI+

ARC-eHDMI+

RESET-AUDIO

WSI2SOUT

I2SCLK

SDI2SOUT1

L+

L-

R+

R-

L+

L-

R+

R-

L+

L-

R+

R-

L+

L-

R+

R-

ADAC(3) ADAC(4)

YPbPr AUDIO

1P08

2

1

3 4

21

7RA0 STV6110A

DVB-S

TUNER

7RA1 STV0903BAC

DVB-S

CHANNEL

DECODER

7

7S00 PNX85637EB

CONDITIONAL ACCESS

B05F

PNX85500 AUDIO

B05H

ANALOG VIDEO

B05K

HDMI_DV

B05E

63

62

61

60

59

58

57

56

U26 T25 T26

W24

U25

V26

W26

W25

V25

RREF

PNX85637

SAT IN

PCMCIA

CONDITIONAL

ACCESS

20

MD0

MDI

TUNER_P

TUNER_N

IF_AGC

AE9

AF10

TNR_SER1_MIVAL TNR_SER1_SOP TNR_SER1_MICLK TNR_SER1_DATA

3S0W

7F01 74LVC245APW

BUFFER

1P00

68P

51 52

18

17

20

8

48

37

32

122

18

12

19

11

2

16

78 75 74 73

4 3 5 8

4

AD12

AE12

R23

T22

R22

T21

AF12

SDRAM

B05E

V1

A2

VREF_2

VREF_1

MIPS

B05C

NANDFLASH

B05F

7S0A H27U4G8F2DTR

NAND

FLASH

R26 R25

12,37

VCC

USB_DP

USB_DN

WS

SCK

I2S_OUT_SD1

XIO_D

7NC1 SII9287BC

HDMI

SWITCH

VCC33

RXC

RXD

RXB

RXA

18 17 16 15 14 13 12 11

8 7 6 5 4 3 2 1

72 71 70 69 68 67 66 65

26 25 24 23 22 21 20 19

19

1

18 2

HDMI SIDE

CONNECTOR

19

1

18 2

HDMI 1

CONNECTOR

19

1

18 2

HDMI 2

CONNECTOR

19

1

18 2

HDMI 3

CONNECTOR

9,27,64

2S78

3S4V

3FA3

1F00 SUT-RE214Z

IF2-_P

MAIN HYBRID

TUNER

7

8

RF IN

1RA0

16M

31

30

A1 E2A1 E2A1E2A1 E2

SDRAM 128Mx8

7B03 EDE1108AGBG

SDRAM 128Mx8

7B01 EDE1108AGBG

SDRAM 128Mx8

7B02 EDE1108AGBG

DQ

A

SDRAM 128Mx8

7B00 EDE1108AGBG

VREF

VDDL

VREF

VDDL

VREF

VDDL

VREF

VDDL

TXC_N

TXC_P

TX0_N

TX0_P

TX1_N

TX1_P

TX2_N

TX2_P

9RC2-1

9RC2-4

9RC2-2

9RC2-3

1R01

RX1_A_N RX0_A_P RX0_A_N

RX1_A_P

RX2_A_N

RXC_A_N

RXC_A_P

RX2_A_P

7KC0 CXD2834R

DVBT2

CHANNEL

DECODER

38

1P07

1

11

10

2

6

2

1

3 4

4321

SIDE USB

CONNECTOR

3 4

2

1

3

1P06

4

7FL5 CY7C65632

USB HUB

1C30

2

1

4 5

3

1FL5

12M

E21

NAND_CE1

NAND_RDY1

NAND_WP_

F21 A21

9 7

19

7

12 13

15 16

STANDBY CONTROLLER

B05B

9

5FA4

5FA5

AGC2

3S4W

3S4U

2S77

IF2-_N

3FA4

3KA1

5KC9

5KC8

3KA0

IF1-_N

IF1-_P

2 3

5KC0

5KC1

2KCE

2KCF

3KCB

3KCA

AGC1

4

1

1P05

3 4

7

9 10 12

6

1

1P04

3 4

7

9 10 12

6

1

1P03

3 4

7

9 10 12

6

1

1P02

3 4

7

9 10 12

6

14

EXT 1

19

1VA1

23

PNX85500 AUDIO

B05H

AIN1_R

AIN1_L

1VA4

AF9

PC AUDIO

AD9

1N09

AC9

1N10

1

2 3

SPDIF OUT

AF5

AF18

2 1 4

5

3

8

7S09

&

5CN2

AIN3_R

AIN3_L

AIN4_R

AIN4_L

SPDIF-OUT

STANDBY

B02G

P0_4

1D01

1

2

SPEAKER L

3

4

SPEAKER R

SPEAKER WOOFER

1D02

1 2 3

7D60 TAS5731

CLASS D

POWER

AMPLIFIER

1

46

39

36

5D78

5D75

20AD2 AE1 AD1

22

9D52

9D53

21

15

19AC19

7D61

7D50-2

25

6D60

AB19

7D50-1

AA22

P0.7

P0.6

P3.2

5D80

5D72

1D01

1

2

SPEAKER L

3

4

SPEAKER R

SPEAKER WOOFER

1D02

1 2 3

5D71

5D81

5D77

5D83

1

2

SPEAKER L

3

4

SPEAKER R

5D75

5D80

1D01

PNX85500 AUDIO

B05H

7NN1 TS489

AMPLI-

FIER

12 76

7NN1-1,2

5

ADAC3 ADAC4

AF7 AD6

HEADPHONE

OUT 3.5 mm

1NN2

Block Diagrams

EN 78Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.11 Block Diagram Control & Clock Signals

B06D

HDMI

B05x

PNX85500

B07B

FPGA-I/O BANKS

B06C

ETHERNET + SERVICE

B05G

COMMON INTERFACE

B01B

INTERFACE CONNECTORS

B05F

NANDFLASH

B01A

POWER CONNECTORS

B04A

DDR

B05D

PNX85500-CONTROL

B05C

PNX85500: MIPS

B06B

USB HUB

B05B

PNX85500: STANDBY CONTROLLER

B08B

DVBS-FE

B05B

PNX85500: STANDBY CONTROLLER

CONTROL + CLOCK SIGNALS

B08A

DVBT2

B05B

B05C

B03A

B10A

B07B

B02E

B05L

B05P

B01A

POWER CONNECTORS

B05C

B08B B06C B06B B01A

B06A B06A

B02C B02A

B05B B06A

B10A

B07B

19220_005_120111.eps

120215

B07B

B05C B01A

B05D

B05H

B05D

B08A

B05B

B05C

B07B

B05C

B07A

FPGA PWR & CTL

B10A

FPGA-I/O BANKS

B10B

FPGA SUPPLY & CTL

B05B

B05C

B10A

B01A

4000 AND 5000 SERIES

5500 SERIES

B05C

B09A

B07B

B05C

B09A

VIDEO OUT - LVDS

B05B

B09A

B10A

B07B

B09A B09A B09A

B05B

B09A

B01A B05C

B10A

LGD 50Hz 3D PANEL

OTHER PANEL

RES

B01A

B01B

BL-DIM

ETH-TXCLK

ETH-RXCLK

ETH-TXD

ETH-RXD

RESET-ETHERNETn

RXD1-MIPS TXD1-MIPS

XTAL

QP

QM

IP

IM

SENSE+1V0-DVBS

RESET-DVBS

TS-INT-DATA

TS-INT-CLK

TS-INT-SOP

TS-INT-VALID

TS-CHDEC-DATA

TS-CHDEC-CLOCK

TS-CHDEC-SOP

TS-CHDEC-VALID

TS-CHDEC-SOP

TS-CHDEC-CLOCK

TS-CHDEC-DATA

RESET-FUSION-OUTn

IF-P-DVBT2 IF-N-DVBT2

+3V3

CA-A(00-14)

XIO-D(00-07)

CA-MDO(0-7)

XIO-A(0-15)

CA-D(0-7)

XIO-D(00-15)

CA-MOCLKMOCLK

CA-MOVALMOVAL

CA-MOSTRTMOSTRT

CA-MDI(0-7)

MDO(0-7)

LED2

KEYBOARD

RC

LIGHT-SENSOR

LED-2

3D-LED

+3V3-STANDBY

+5V

DETECT2

RESET-SYSTEMn

AV1-BLK

AV1-STATUS

LCD-PWR-ONn

BL-ON

STANDBY

POWER-OK

BL-DIM-1

BL-I-CTRL

RESET-USBn

RESET-DVBS

RESET-ETHERNETn

RESET-AUDIO

AUDIO-MUTE-UP

ENABLE-1V8

ENABLE-3V3-5V

DETECT2

+3V3-STANDBY

+12V

ENABLE-3V3n

+3V3-STANDBY

RXD-UP TXD-UP

RESET-STBYn

PNX-SPI-CLK

PNX-SPI-WPn

PNX-SPI-CSBn

PNX-SPI-SDO PNX-SPI-SDI

+3V3-STANDBY

RESET-STBYn

SDM

SPI-PROG

BL-I-CTRL-PNX

BL-I-CTRL

SEL-HDMI-ARC

HDMIA-RX

+3V3

ARX-HOTPLUG

BRX-HOTPLUG CRX-HOTPLUG DRX-HOTPLUG

PCEC-HDMI

CEC-HDMI

+5V

USB1-DM

USB2-DM

USB2-DP

USB3-DM

USB3-DP

+5V-USB3

+5V-USB2

USB-WIFI-DDn USB-WIFI-DDP

USB1-DP

+5V-USB1

USB-DM

USB-DP

BL-I-CTRL-PNX

RESET-SYSTEMn

RESET-FUSION-OUTn

PNX-SPI-SDI

PNX-SPI-SDO

PNX-SPI-CLK

PNX-SPI-CS-BLn

BL-DIM

PROG-B

+3V3

FPGA-SYS-CLK

DDR-CLK_N DDR-CLK_P

DDR2-A(0-13)

DDR2-D(0-31)

D(24-31)

D(16-23)

D(8-15)

D(0-7)

PNX-SPI-SDI

PNX-SPI-SDO

PNX-SPI-CLK

PNX-SPI-CS-BLn

BL-DIM

FPGA-SYS-CLK-LX25

MISO-LX25

MOSI-LX25 CCLK-LX25

CSO-B-LX25

BL-DIM1

BL-DIM

BL-DIM1

3D-LR

CTRL-DISP3 BL-PWM 3D-LR

CTRL-DISP3 CTRL-DISP1

3D-LR-DISP

CTRL-DISP2

3D-LR-DISP3D-LR-DISP

CTRL-DISP3

CTRL-DISP2

CTRL-DISP1

BL-PWM

+3V3-STANDBY

LED-1

LED1

LED-1

46

2

7

V23

29

VIDEO STREAM

B05F

B05C

ETHERNET

AE26

AA22

AA26

AF19

4x HDMI

CONNECTOR

AB22

AD21

PNX85637

7S00 PNX85637EB

AC25

1S02

54M

AF17

AE17

CONTROL

B05C

STANDBY

B05B

HDMI_DV

B05E

AD22

AD19

AD23

AD18

AE25

7S20 NCP303LSN28G

2

INP

1

OUTP

GND

7NC1 SII9287BCNU

HDMI

SWITCH

1P00

1

68

PCMCIA

CONDITIONAL

ACCESS

P3_0 P3_1 P1_7

P6_4

P2_7

P1_1

P0_6

XTAL_IN

XTAL_OUT

P5_1

P5_0

P2_2 P2_3

CADC_2

RESET_IN

P1_2

W24

RREF

RX

P1_0

PWM_1

7F02 7F03

7F04 7F05

7F01

COMMON INTERFACE

AF22

AB20

FF04

FF29

AE21 AF21

1 2

3

4 5 6 7

8

1C20

P2_0

AC20

P0_7

N5 N4

AA18

P0_1

AE18

P0_3

AF18

P0_4

31

41 45

35

1

2

19

18

1P05-19

1P02-19 1P03-19 1P04-19

1P02-13 1P03-13 1P04-13 1P05-13

FLASH

B05F

7S0A H27U4G8F2DTR

NAND

FLASH

12,37

VCC

MDI

AA2

RXCLK

AA3

TXCLK

RXD TXD

3

SPI_CLK

SPI_CSB SPI_SDO

SPI_SDI

P6_5

7F52 M25P05-AVMN6P

FLASH

512K

8

VCC

6

AF24

3

AE22

1

AF23

5

AE23

2

AF25

MDO

XIO_A

XIO_D

SDRAM

B05E

F8 E8F8 E8F8 E8F8 E8

SDRAM 128Mx8

7B01 H5PS1G83EFR

SDRAM 128Mx8

7B02 H5PS1G83EFR

SDRAM 128Mx8

7B03 H5PS1G83EFR

DQ

A

CLK_N CLK_P

SDRAM 128Mx8

7B00 H5PS1G83EFR

AD5

AE4

RESET_SYS

3S0W

TO

SENSOR

&

CONTROL

BOARD

9U41

EF

7NC0

7RA1 STV0903BAC

MULTI

STANDARD

DEMODULATOR

FOR SAT DIG TV

7RA0 STV6110A

SATELLITE

TUNER

122

32

12

18

11

19

7

21

8

20

52

T21

73

T22

74

7

20

R22 R23

75 78 62

9RC2-3

9RC2-4

9RC2-2

9RC2-1

19

7J01 XC6SLX4

FPGA

67 62 66

61

R26 R25

USB_DP

USB_DM

TNR_SER1_MIVAL

TNR_SER1_SOP

TNR_SER1_MICLK

TNR_SER1_DATA

1F51

1

3

4 5

2

LEVEL SHIFTED

FOR

DEBUG USE

ONLY

7N10 LAN8710A-EZK

ETHERNET

CONNECTOR

RJ45

SDM

SPI-PROG

1N70

25M

4

5

K24

VS_2

20

L23

MOVAL

62

L22

MOSTRT

63

7F00

1N00

7KC0 CXD2834R

DVBT2

CHANNEL

DECODER

4

3

36 37

5

8

Y23 Y24

UART

SERVICE

CONNECTOR

1N06

2

3

1

CONTROL

B05C

GPIO_2 GPIO_3

10

AE20 AF20

11 2

3

13

12

1M95

P2_6

AC21

TO

POWER SUPPLY

P3_2

P3_5 P3_3

AC19

AB19

CONTROL

9F51

TO PIN:

1P08

2

1

3

4

1P07

1

11

10

2

6

2

1

3

4

4 3 21

SIDE USB

CONNECTOR

3

4

2

1

3

1P06

4

7FL5 CY7C65632

USB HUB

1C30

2

1

4 5

3

1FL5

12M

7

12 13

15 16

GPIO_10

cS53

V22

GPIO_7

BL_PWM

RESET

7J26 NCP803

2

1

GND

3

VCC

37

7J23 74LVC1GU04

1J21

12M

2

4

50

P11

7K00 XC6SLX25

FPGA

D11 E11 D12

F10

M9

7K20

PQ-FPGA

SW

7K22 M25P40

FLASH

16Mbit

5 6 1

P10 T10 R11 T3

F9

17

9U44

9U43

F12

Y22

GPIO_1

17

STANDBY

SW

MAIN

SW

TO DISPLAY

1G51

51 44 42

TO DISPLAY

1G51

51 44 43 42

P12

AA21P2_4

P2_5

AB21 AB17

P0_0

1 2

3

4 5 6 7

8

1C22

EF

7U43

AD26

PWM_0

Block Diagrams

EN 79Q552.4E LA 9.

2012-Jun-29

div. table

back to

9.12 Block Diagram I2C

I²C

PNX85500: MIPS

B05C

DDR

B04A

FLASH

B05F

ETHERNET + SERVICE

B06C

PNX85500: CONTROL

B05D

PNX85500-CONTROL

B05D

PNX85500: STANDBY CONTROLER

B05B

HDMI

B06D

TUNER CHANNEL DECODER

B08A

HDMI

B06D

TEMP SENSOR

B05O

DVBS-FE

B08B

DVBS-SUPPLY

B03B

TUNER

B08A

PNX85500: ANALOG VIDEO

B05K

ETHERNET + SERVICE

B06C

VGA

B05N

VIDEO OUT - LVDS

B08A

INTERFACE CONNECTORS

B01B

TEMP SENSOR

TS1

PNX85500: MIPS

B05C

1F52

7S00 PNX85637EB

PNX85637

SDA-SSB-550

SCL-SSB-550

C25 C26

1_SDA

1_SCL

AC23 AC24

MC_SDA MC_SCL

B25 A24

3_SDA 3_SCL

SDA-UP-MIPS SCL-UP-MIPS

CONTROL

STANDBY

1

3

DEBUG

ONLY

19220_001_111223.eps

111223

RES

3F63 3F62

56

7F58

M24C64

EEPROM

(NVM)

3F60

3F59

SDA-TUNER

SCL-TUNER

11 10

1F00

SUT-RE214Z

MAIN

TUNER

3S60 3S61

3FA1

3FA2

53 54

7NC1

SII9287B

HDMI MUX

3NC5

3NC3

HDMI

CONNECTOR 3

HDMI

CONNECTOR 2

1P04

16 15

29 30

1P03

16 15

33 34

1P02

16 15

39 40

HDMI

CONNECTOR

SIDE

1P05

16 15

3NCT-2

3NCT-1

DIN-5V

43 44

47 48

Y25 Y26

Y23 Y24

GPIO_2 GPIO_3

DDCA-SDA DDCA-SCL

ARX-DDC-SDA ARX-DDC-SCL

BRX-DDC-SDA BRX-DDC-SCL

CRX-DDC-SDA CRX-DDC-SCL

DRX-DDC-SDA DRX-DDC-SCL

12

7FD1

LM75BDP

TEMP

SENSOR

3FD3

3FD4

13 12

3S56 3S57

3S2F 3S2G

3S5Y 3S5Z

3S6D

3S6`L

+3V3

3S69

3S6A

+3V3

3S6V

3S6W

+3V3-STANDBY

3S81

3S80

+3V3

3S83

3S84

+3V3

3S6F

3S6G

+3V3

AD25 AD24

1N05

12 15

VGA-SDA-EDID-HDMI VGA-SCL-EDID-HDMI

VGA-SDA-EDID VGA-SCL-EDID

3FC1

3FC2

+5V-VGA

9FC2 9FC4

9FC1 9FC3

RES

3S5V-1 3S5V-3

3NC1-1

3NC1-3

AIN-5V

3NCA-1

3NCA-2

BIN-5V

3NCA-3

3NCA-4

CIN-5V

3NCP-3

3NCP-1

+5V-EDID

3NCU-2

3NCU-4

+3V3

B24

Y5

Y6 AB4 AC1 AA3

11 10

9

8

7

A23

4_SDA 4_SCL

AE21 AF21

P3_0 P3_1

1

6

10

11

5

15

VGA

CONNECTOR

RXD1-MIPS

TXD1-MIPS

W21 W22

GPIO_4 GPIO_5

RXD2-MIPS TXD2-MIPS

UART

SERVICE

CONNECTOR

1N06

3

2 1

3N53-3 3N53-1

3N53-4 3N53-2

1F51

1

3

B05C

B05B

SDRAM

B05E

FLASH

B05F

ANALOGUE

VIDEO

VGA_EDID_SDA

VGA_EDID_SCL

B05K

B05E

ERR

35

ERR15ERR

53

4 5

SDA-BL SCL-BL

SDA-TEMP1 SCL-TEMP1

LVD S

CONNECTOR

1G51

50 49

SDA-DISP SCL-DISP

3C83 3C81

3S67

3S65

3S68

3S66

+3V3

B26 A25

2_SDA

2_SCL

SDA-SET SCL-SET

3S58

3S5W

3S6B

3S6C

+3V3

3S1G

3S1H

+3V3-STANDBY

RES

7

8

9S13 9S10

3G2W 3G2Y

uP

LEVEL

SHIFTED

FOR DEBUG

USE ONLY

RXD-UP

TXD-UP

3F65 3F64

21

7S01

PCA9540B

2 CHAN.

MULTIPLEX.

ERR

24

ERR

34

ERR

23

ERR

42

6

7TP2

LNBH25

LNB

CONTROLLER

3TPD

ERR

31

21 20

7KC0

CXD2820R

DVBT2

CHANNEL

DECODER

3KC3

3KC2

12

7104

LM75ADP

TEMP

SENSOR

98 97

7R01

STV903BAC

CHANNEL DEC

DVBS

3RA8

3RA7

ERR

28

7R02

STV6110A SATELITE

TUNER

ERR

36

9S12 9S11

7N10 LAN8710A-EZK

ETH-RXD(0)

ETH-RXD(3) ETH-RXCLK

ETH-RXD(1) ETH-RXD(2)

AA1 AA4

AB1 AB2 AA2

22 23 24 25 20

ETH-TXD(0)

ETH-TXD(3) ETH-TXCLK

ETH-TXD(1) ETH-TXD(2)

RXD_0 RXD_1 RXD_2 RXD_3 RXCLK

TXD_0 TXD_1 TXD_2 TXD_3 TXCLK

XIO_D

DQ

A

ETHERNET

18 19

SDAT

SCLT

DDC_A_SDA DDC_A_SCL

HDMI_DV

HDMI

CONNECTOR 1

ETHERNET

CONNECTOR

RJ45

RES

SDRAM 128Mx8

7B01 EDE1108AGBG

SDRAM 128Mx8

7B02 EDE1108AGBG

FLASH

(4Gx16)

SDRAM 128Mx8

7B03 EDE1108AGBG

SDRAM 128Mx8

7B00 EDE1108AGBG

DDR2-D(0-31)

XIO-D(00-07)

D(24-31)

D(16-23)

D(8-15)

D(0-7)

DDR2-A(0-13)

19

1

18 2

19

1

18 2

19

1

18 2

19

1

18 2

SPI_CLK

SPI_CSB SPI_SDO SPI_SDI

P6_5

7F52 M25P05-AVMN6P

FLASH

512K

8

+3V3-STANDBY

VCC

6

PNX-SPI-CLK

AF24

3

PNX-SPI-WPn

AE22

1

PNX-SPI-CSBn

AF23

5

PNX-SPI-SDO

AE23

2

PNX-SPI-SDI

AF25

7S0A H27U4G8F2DTR

ERR

13

ERR

18

ERR

14

ERR

64

STANDBY

SW

MAIN

SW

MAIN NVM

SW

EDID

SW

Programmable via USB

SW

RES

OPTIONALOPTIONAL

1T71 1T02

33

11

3124 3123

OPTIONAL

11

9

3C95 3C94

1C20

CONTROL

RES

5FA6

5FA7

1FA0

1

3

DEBUG

ONLY

RES

9

3TPB

CLASS-D AMPLIFIER

B06A

23

7D60

TAS5731

AUDIO

AMPLIFIER

3D55

ERR

37

24

3D56

FPGA I/O BANKS

B07B

40

7J01

XS65LX4

FPGA

BL

3J04

ERR

38

41

3J03

cS51 cS52

SDA-FE SCL-FE

Block Diagrams

EN 80Q552.4E LA 9.

2012-Jun-29

back to

div. table

9.13 Supply Lines Overview

SUPPLY LINES OVERVIEW

1M95

11

3V3SB

22

STANDBY

33

GND1

44

GND1

55

+12V3

66

+12V3

PSU

POWER-OK-1

77

+VSND

88

+VSND

99

GND1

10 10

GND1

11 11

BL-ON-1

12 12

BL-DIM-1

13 13

BL-I-CTRL-1

14 14

B02c

B01a B02c

B01a

B01a B01a

B01a

B02c

B02a

B02c

B01a

B02c

B02c B08b

B03b

B02a

POWER CONNECTORS

B01A

1M95

+3V3

INTERFACE CONNECTORS

B01B

+3V3-STANDBY +3V3

5C53

+12V

DC / DC

B02A

+3V3-STANDBY +12V

7U03 TPS53126PW

Dual

Synchronous

Step-Down

Controller

3

DC / DC

B02B

+12V

DC / DC

B02C

+12V

5UD0

5UD3

DVBS-SUPPLY

B03A

+3V3

5T00

5T03

STANDBY

cU40

1U40

T 3.0A

BL-ON BACKLIGHT-PWM_BL-VS BL-I-CTRL POWER-OK

5C54

1C85

T 1.0A

RES

5U02

7U02-1

10

7UA4

VOLT. REG.

7UC0

VOLT. REG.

7UD0

VOLT. REG.

7UD1

VOLT.

REG.

12

14

1

23

7U02-2

7T00

VOLT.

REG.

7T03

VOLT. REG.

7U01

7U04

5U00

5U01

ENABLE-1V8

ENABLE-3V3-5V

+3V3-STANDBY

B05B

+12VD

+12V

+12V-AUDIO

B05B B05C B05D B05B

+3V3

+3V3-STANDBY

+3V3

+3V3-STANDBY

+12V

12V/1V8

CONVERSION

+1V8

12V/1V1

CONVERSION

+1V1

+12V

+1V2+1V8

+2V5+3V3

+2V5-LVDS

+3V3

+2V5-DVBS+2V5-DVBS

+1V0-DVBS+12V-DVBS

+1V2-FE+1V8

Block Diagrams

CORE VOL T AGE SUPPLY FOR DVBS

B03B

DEMODULATOR

B01b,B02a,

B01a

B05a,B05b, B05c,B05d, B05i,B05p, B06a,B06d

B05p

B01b,B02a, B02b,B02c, B03b

B06a

B02a

B02a B02b B02a B02b B05h B02b

B02c

B01a

1T71

TEMP

4

SENSOR

(OPTIONAL)

B02a

B01a

B02c

B01a

B02b, B03a,B04a, B05a,B05e, B10b

B02c B01a

B05a,B05b

B02c

B01A

+5V+5V

+5V

B01A

+5V+5V

B02a

B02c

B02b

B02c

B05a

B05a,B05h

B05a

B02b,B03a, B05d,B05g, B05l,B06b, B06d,B08a, B08b,B10b

B01a,B01b, B02b,B03a, B05a,B05c, B05d,B05e, B05f,B05g, B05h,B05i, B05l,B05m, B05o,B05p, B06b,B06c, B06d,B07a, B09a,B08a, B08b,B10b

B08b

B08a

1TP1

+12V

T 3.0A

7TP2 LNBH25PQ

3

CONTROLLER

DDR

B04A

3B20

PNX85500: POWER

B05A

+1V1 +1V2 +1V8 +2V5 +2V5-AUDIO +2V5-LVDS +3V3 +3V3-STANDBY

PNX85500: STANDBY CONTROLLER

B05B

+1V1

+3V3-STANDBY

PNX85500: MIPS

B05C

+3V3 +3V3-STANDBY

PNX85500: CONTROL

B05D

+3V3 +3V3-STANDBY

+5V

PNX85500: SDRAM

B05E

+1V8

3S20 3S06

+3V3

PNX85500: NANDFLASH

B05F

CONDITIONAL ACCESS

+3V3

COMMON INTERFACE

B05G

+3V3

+5V

+T

PNX85500: AUDIO

B05H

+2V5 +3V3

3S11

7S08

IN OUT

COM

3F01

LNB

+12V-DVBS

+V-LNB

20

+1V8+1V8

DDR2-VREF-DDR

+1V1 +1V2 +1V8 +2V5

+2V5-AUDIO

+2V5-LVDS

+3V3

+3V3-STANDBY

+1V1

+3V3-STANDBY

+3V3

+3V3-STANDBY

+3V3

+3V3-STANDBY

+5V

+1V8 DDR2-VREF-CTRL3 DDR2-VREF-CTRL2

+3V3

+5V

+5VCA

+2V5

+3V3

+3V3-ARC

+2V5-AUDIO

B01a

B02c

B02c B02c

B02c

B02c B01a

B01a

B02c

B01a

B05n

B02c

EN 81Q552.4E LA 9.

B05a

B03a

B08b

HEADPHONE

B05I

+3V3

ANALOGUE EXTERNALS A

B05L

ANALOGUE EXTERNALS B

B05M

VGA

B05N

B05O

B05P

B06A

B06B

B06C

B06D

CONNECTOR

VGA

CONNECTOR

TEMP SENSOR

+3V3

VDISP - SWITCH

7UU0

7UU2

LCD-PWR-ONn

CLASS-D AMPLIFIER

+3V3-STANDBY

USB HUB

+3V3

+5V

+T

ETHERNET + SERVICE

+3V3

5N08

HDMI

+5V

6NC1

HDMI 3

HDMI 2

HDMI 1

HDMI SIDE

1N05

3F32

3FL2

3FL7

1P04

18

1P03

18

1P02

18

1P05

18

FPGA - POWER & CONTROL

B07A

B06d

B09a

+3V3

B07B

VAUX VCCINT

VCCO3

VCCO2

VCCO1

VCCO0

B08A

B08B

B09A

B10A

VAUX-LX25 +1V2-LX25

VCCO3-LX25

VCCO2-LX25

VCCO1-LX25

VCCO0-LX25

B10B

+3V3

+1V8

+5V

5J20

5J21

5J22

5J23

5J24

FPGA - I/O BANKS

TUNER-CHANNEL DECODER

5FA0

5KC6

5KC7

DVBS-FE

5RC0

VIDEO OUT - LVDS

FPGA - I/O BANKS

FPGA - POWER & CONTROL

5K20

5K21

5K22

5K23

5K24

7FA0

IN OUT

COM

3KCE

7RC1

IN OUT

COM

7RC0

IN OUT

COM

7J20

IN OUT

COM

7K24

IN OUT

COM

+3V3-STANDBY+3V3-STANDBY

+3V3

+3V3+3V3

+5V+5V

+3V3+3V3

5D84

3F34-4

3FL4-4

3FL8-4

+5V-VGA

+3V3

+3V3+3V3

+3V3-STANDBY+3V3-STANDBY

+12VD+12VD

+VDISP

+3V3-AUDIO

+3V3D

+12V-AUDIO+12V-AUDIO

+3V3

+5V

+5V-USB1

USB-OVR1

+5V-USB2

USB-OVR2

+5V-USB3

USB-OVR3

+3V3

+3V3-ET-ANA

+3V3+3V3

+3V3-HDMI

+3V3-STANDBY+3V3-STANDBY

+5V-VGA+5V-VGA

+5V-EDID

+5V

AIN-5V

BIN-5V

CIN-5V

DIN-5V

9

1UU0 T 2.0A

7D80

3D83

5NC0

B02c

B07a B07a

B07a

B02c

B03a

B02c

B03a

B03b

B02c

B05p

B10b B10b

B10b

B02c

B02a

B02c

5RA0

5RA1

+3V3

VAUX

VCCINT

VCCO3

VCCO2

VCCO1

VCCO0

VAUX

VCCINT

VCC03

VCCO2

VCCO1

VCCO0

+VCC-TUNER+5V

+3V3-DVBT2-D+3V3

+1V2-DVBT2-C+1V2-FE

+1V2-DVBT2-P

+3V3-DVBS+5V

+3V3-DEMOD

+3V3RF

+2V5-DVBS+3V3

+1V0-DVBS+1V0-DVBS

+V-LNB+V-LNB

+3V3+3V3

+VDISP+VDISP

VAUX-LX25 +1V2-LX25

VCC03-LX25

VCCO2-LX25

VCCO1-LX25

VCCO0-LX25

+3V3

VAUX-LX25

VCCO3-LX25

VCCO2-LX25

VCCO1-LX25

VCCO0-LX25

+1V2-LX25

+5V

B07b

B03a

B10a

19220_004_111229.eps

111229

2012-Jun-29

back to

div. table

Circuit Diagrams and PWB Layouts

19240_500_120213.eps

120213

AC Side

A01 A01

2012-01-09

1

715G5194

AC Side

12

34

F9902

FUSE-NC

T4.0AH/250V

R9903

220K 1/4W -N C

!

1 2

CN9901

AC SOCKET

12

FB9902

BEAD

1 2

FB9901

BEAD

R9905

220K 1/4W -N C

R9902

220K 1/4W -N C

R9906

2M2 5% 1/2W

R9904

510K-NC

RV9901

TVR14561KFAOZF

NC

1

D1

2

D1

3

NC4NC

5

D2

6

D2

7

NC

8

IC9901 CAP004DG-NC

SG9902 SPG-201M-LF

1 2

t

NR9901

NTCR

C9905

470PF 250V

!

B+

BO

SG9903 SPG-201M-LF

1

2

4

3

L9901

12MH

1

2

4

3

L9902

12MH

C9904

470PF 250V

1 2

t

NR9902

NTCR

SG9904 SPG-201M-LF

C9911

1NF 250V-N C

1 2

3

4

HS9102

HEAT SINK

1 2

3

4

HS9101

HEAT SINK

C9910

470PF 250V

!

SG9906

DA38-622MT-A21F-NC

SG9905

DA38-622MT-A21F-NC

!!

RV9902

TVR14561KFAOZF-NC

!

C9908

1NF 250V-N C

!

1 2

3

4

HS9302

HEAT SINK

!

RV9903

TVR14561KFAOZF-NC

12

FB9302

BEAD

2

1

3

4

-

+

BD9901

TS6B06G-05-X0

!

L

1

N

2

CN9902 CONN-NC

+

C9913

47UF 450V-N C

C9912

10NF

1 2

3

4

HS9901

HEAT SINK-NC

HOT

COLD

SG9901

SPG-201M-LF

C9902

220NF

!

R9901

510K-NC

1 2

3

4

HS9902

HEAT SINK-NC

1 2

3 4

F9901

FUSE

+

C9906

47UF 450V

T4.0AH/250V

C9903 47PF-NC

+

C9907

47UF 450V

+

C9909

47UF 450V

1 2

FB9906

BEAD

C9901

220NF

10. Circuit Diagrams and PWB Layouts

10.1 A 715G5194 PSU 32" & 37" 3500/4000 series

10-1-1 AC Side

EN 82Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-1-2 LED

19240_501_120213.eps

120213

LED

A02 A02

2012-01-09

1

715G5194

LED

R8123

10K OHM +-5% 1/8W

R8124

22OHM +-5% 1/8W

R8115

820K 1%

R8103

NC

R8125

2R2 +-5% 1/8W

12

D8101 SS1060FL

R8112

NC

1 2

D8102

SR510-22

1

2

L8101 25UH

R8116

0.05R

R8109

NC

DIM

1

EN

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8103

PF7700S

VLED

R8118

100KOHM +-5% 1/8W

R8127

180K +-1% 1/8W

R8126

200 OHM 1/4W

FB1GM2RT3CS

4

DIM

5

GND

6

OUT7VCC

8

IC8107

PF7900S

C8120 1N 50V

DIM

1

EN

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8104

PF7700S

EN

R8134

0 OHM +-5% 1/8W-NC

+12V2

COMP

R8119

0R05 1/4W

DIM

1

EN

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8106

PF7700S

DIM

1

EN

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8105

PF7700S

FB

Q8102 MMBT3904-NC

C8124 100N 50V

R8117

820K 1%

DIM

1

EN

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8102

PF7700S

+

C8127

10UF 50V

DIM

R8120 100K

R8122 100K

R8121 100K

C8122 NC

R8131

0 OHM +-5% 1/8W

L8102

3UH

R8128

10K OHM +-5% 1/8W-NC

R8130

10K OHM +-5% 1/8W-NC

R8129

10K OHM +-5% 1/8W-NC

+12V

DIM

1

EN

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8101

PF7700S

+12V

+

C8132 220UF 100V

+12V2

R8114

510K 1% 1/8W

1 2

ZD8101

MTZJ13B-NC

ON/OFF

C8126

1N 50V

R8132

9.1K OHM-NC

R8133 24K 1/8W 1%-NC

1

2

3

4

5

6

7

8

9

10

11

12

13 14

CN8101

CONN

R8106

NC

+

C8108 150UF 35V

1

2 3

Q8103

MMBT3906-NC

+12V2

C8113

100N 50V-NC

C8123

100N 50V

VLED

LED2

LED5

LED1

1

2

3

4

5

6

7

8

910

CN8102

CONN-NC

LED3

LED4

LED6

EN

VLED

C8105 1UF 16V

LED6

R8102

NC

COMP

C8101 1UF 16V

R8111

10K 1/8W 1%

DIM COMP

C8107

470NF 50V

LED2

+24V1

LED3

LED6

LED5

LED3

R8113

91KOHM +-1% 1/8W

C8109

470NF 50V

LED1

R8101

10K 1/8W 1%

C8111

470NF 50V

EN

C8119 1UF 16V

LED4

COMP

DIM

COMP

+12V2

DIM

LED1

LED4

R8110

10K 1/8W 1%

C8103 1UF 16V

LED2

COMP

VLED

EN

Q8101

AOD4126

EN

DIM

R8104

10K 1/8W 1%

COMP

C8104 1UF 16V

DIM

C8110

0.47UF 50V

EN

C8115

470NF 50V

R8107

10K 1/8W 1%

R8108

10K 1/8W 1%

EN

LED5

C8106

470NF 50V

C8102 1UF 16V

+

C8125

12UF 160V

R8105

NC

Circuit Diagrams and PWB Layouts

EN 83Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-1-3 Main Power

19240_502_120213.eps

120213

Main Power

A03 A03

2012-01-09

1

715G5194

Main Power

HOT

1 2

ZD9106

MTZJ27B

COLD

R9146

10K 1/4W-NC

HOT

R9166

10K 1/4W-NC

C9125

1N 50V-NC

R9129

0 OHM +-5% 1/8W

R9122

10K OHM +-5% 1/8W

C9136

1uF-NC

R9116

120KOHM +-1% 1/8W

C9113

470NF 50V

Q9107

AOD409-NC

R9170

5.1K 1/4W

R9172 1K OHM +-5% 1/8W

Q9111

2SD1624T-TD-E

+24V

R9102

24R 1%

R9106

24R 1%

R9163

24R 1%

R9164

24R 1%

R9107

24R 1%

R9153

24R 1%

R9182

24R 1%

R9152

24R 1%

R9154

24R 1%

R9181

24R 1%

R9137

680 OHM 1/4W-NC

R9156

680 OHM 1/4W-NC

C9123

4.7uF 25V

R9128

200 OHM 1/4W

C9110

4.7uF 25V

C9131 100N 50V

R9176

3K 1/8W +/-1%

C9117

6.8nF

R9108

0.27R

R9171 470R

C9108 10NF

+

C9109

560UF 35V

+

C9104

560UF 35V

+

C9118

4.7UF 50V-NC

R9139

10K 1/4W-NC

R9150

2K 1/8W 1%

1 2

ZD9107

P6KE27A-NC

Q9108 TK2P60D-NC

R9125

100KOHM +-5% 1/8W

R9135

27K 1/8W 1%-NC

Q9104

2N7002K

+24V2

5.2V

3

1

2

D9107

BAV99

R9140

10K 1/4W-NC

1 2

ZD9105

MTZJ15B

C9132

100N 50V-NC

R9117

1K8 +/-1% 1/8W

C9134

1uF-NC

R9127

100R 1/8W 5%

R9177

100KOHM +-5% 1/8W-NC

R9141

10K 1/4W-NC

R9147

2Mohm 1/4W +/-1%-NC

C9129

1NF 250V-NC

R9142

10K 1/4W-NC

R9133

20K +-5% 1/8W

1 2

ZD9103

MTZJ18B

R9130

10K 1/4W

R9134 10K OHM +-5% 1/8W

C9121

100N 50V-NC

R9132 100KOHM +-5% 1/8W-NC

R9136

3K 1/8W +/-1%-NC

R9131 0 OHM +-5% 1/8W

5.2V

Q9105

2N7002K-NC

R9178

10K 1/4W-NC

R9120 100KOHM +-5% 1/8W

C9116

100N 50V

Q9106 MMBT3906 PNP

1

2

3

D9103

FMXA-2202S

+24V2

R9143

10K 1/4W-NC

R9138

10 OHM 1/4W-NC

!

C9135

1uF-NC

R9123

2K 1/8W 5%

!

R9144

10K 1/4W-NC

R9173

100KOHM +-5% 1/8W-NC

!

R9126

110R

!

5.2V

C9130

470PF 250V

R9167

1K OHM +-5% 1/8W

R9169 10K OHM +-5% 1/8W

R9114

3K 1/8W +/-1%

R9148

2Mohm 1/4W +/-1%-NC

Q9110 MMBT3906

R9118

9K1 1/8W 1%

C9133

470PF 250V

R9149

2Mohm 1/4W +/-1%-NC

R9145

10K 1/4W-NC

!

1

2

3

D9102

FMEN210A

R9168

1K OHM +-5% 1/8W

C9115

470NF 50V

C9128 1N 50V

+

C9107

270UF 25V

R9151

1K OHM +-5% 1/8W-NC

C9102

1.5NF

C9126 470NF 50V-NC

Q9101 TK6A65D

VCC1

C9127 470NF 50V-NC

R9113

100KOHM +-5% 2WS

+

C9101

220UF 35V

C9120

1.5NF

B+_main

R9124

2K 1/8W 1%-NC

R9109

22OHM +-5% 1/8W

+24V1

R9101 5K1 1/8W 1%

L9102

3UH

R9103 100 OHM 1/4W

R9110 10K OHM +-5% 1/8W

C9119

100N 50V

BNO

1

COMP

2

NC

3

CS4GND

5

OUT

6

VCC

7

OVP

8

IC9103

LD7523GS

DV5

VCC

C9122

1NF 250V-NC

PS_ON

+12V

IC9105 AS431AN-E1-NC

+

C9105

470UF 35V

Q9112

MMBT3904-NC

R9104 100 OHM 1/4W

+24V

R9174 100KOHM +-5% 1/8W-NC

+24V1

1 2

ZD9104 B6V2-NC

R9159

1.5K 1/4W

R9160

1.5K 1/4W

R9158

1.5K 1/4W

R9161

1.5K 1/4W-NC

R9162

1.5K 1/4W-NC

B+_main

VCC1

1 2

D9108 SS1060FL

R9155

10K OHM +-5% 1/8W

C9112

0.47UF 50V

+24V

Q9102

MMBT3904

Protect

R9179

10K 1/4W-NC

R9115

470OHM +-5% 1/8W

12

D9106 SS1060FL

1 2

ZD9101 MTZJ18B

+12V

1

5

6

8 9

10

11

12

13

14

15 16

T9101

POWER X'FMR

R9175 1K OHM +-5% 1/8W-NC

R9121 10K OHM +-5% 1/8W

12

D9105

SS1060FL

Q9103 2SD1624T-TD-E

C9124

100N 50V-NC

VCC1

12

43

IC9104

PC123X8YFZOF

+24V1+12V

+12V1

C9103

1.5NF

1 2

FB9905

BEAD

C9111

0.47UF 50V

R9105 100 OHM 1/4W

R9165

10K 1/4W-NC

+

C9106

470UF 35V

12

D9104

SS1060FL

L9101

3UH

R9112

220 OHM 1/4W

D9101 PR1007

12

43

IC9101 PC123X8YFZOF

Protect

C9114

100N 50V

R9111 10K OHM +-5% 1/8W

IC9102

AS431AZTR-E1

R9180

10K 1/4W-NC

R9119 100KOHM +-5% 1/8W-NC

1 2

ZD9102

MTZJ30B

Circuit Diagrams and PWB Layouts

EN 84Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-1-4 Standby

19240_503_120213.eps

120213

Standby

A04 A04

2012-01-09

1

715G5194

Standby

ON/OFF

+12V

DIM

+

C9309 10UF 50V

+

C9306 100UF 50V

1 2

D9308

SR240S-NC

R9316 9K1 1/8W 1%

R9318 43K 1/8W 1%

1

2

3

4

5

6

7

8

9

10

11

12

CN9303

CONN-NC

5.2V

ON/OFF

P_OK

D9304 PR1007

D9303 PR1007

1

2

3

5

6 7

9 10

4

T9301

POWER X'FMR

DV5

+

C9303

470UF 10V

+

C9304 470UF 10V

R9308

0.75R

EN

R9301

100KOHM +-5% 2WS-NC

L9301

3UH

!

R9304 47 OHM 1/4W

PS_ON

R9311 8K2 1/8W 1%

1 2

FB9301

BEAD

R9319

47 OHM 1/4W

C9314

470PF 250V

R9314

1K OHM +-5% 1/8W

D9301 1N4007

IC9303

AS431AN-E1

R9312

1K OHM +-5% 1/8W

C9301

1.5NF

12

D9305 SS1060FL

C9307 220N 50V

C9311

100N 50V

C9308 1N 50V

C9305

0.47UF 50V

S/OCP

1

BR

2

GND

3

FB/OLP4VCC

5

D/ST

7

D/ST

8

IC9301

A6069H

Q9301

2N7002K

12

43

IC9302

PC123X8YFZOF

R9303

47 OHM 1/4W

R9302

0.1R

R9307 220R 1%

R9317 560K 1/8W 1%

R9315

4.7M 5% 1/8W

C9310

220NF

C9302

1.5NF

C9312 10NF

B+_main

1 2

ZD9316

GDZJ5.6B

5.2V

BO

R9320

10K OHM +-5% 1/8W

1

2

3

4

5

6

7

8

9

10

11

12

13

CN9304

CONN-NC

1 2

FB9304

BEAD

!

C9137

470PF 250V-NC

VCC

C9139

220PF 250V

1

2

3

D9302 FMW-2156

+

C9316 100UF 50V

R9323

10K 1/4W-NC

GND_Audio

1

2

3

4

5

6

7

8

9

10

11

12

13

CN9302

CONN

R9306

1.5M 1%

R9332

100KOHM +-5% 1/8W

COLDHOT

12

D9306

SJPW-T4VL-NC

L9302 3UH-NC

R9321

0R05 1/4W-NC

5.2V

C9317

1NF 250V-NC

!

R9309

10K 1/4W

!

1

2

3

4

5

6

7

8

9

10

11

12

CN9301

CONN-NC

R9310

1.5M 1%

R9305

2R2 +-5% 1/4W

B+

+24V

12

ZD9315

P6KE160A

+

C9313

270UF 25V

R9324 0 OHM +-5% 1/8W

P_OK

R9313

1.5M 1%

Circuit Diagrams and PWB Layouts

EN 85Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-1-5 Power layout top

19240_504_120215.eps

120215

2011-12-21

1

715G5194

Power

layout top

D9101

D9301

D9303

D9304

IC9101

IC9104

IC9302

R9108

R9302

T9301

R9308

C9309

J903

R9113

R9301

J901

J902

J930J933

J931J934

J932J935

J911

J910

J915

J907

J908

D8102

J924

J925

J928

J927

C9903

D9308

J947

J954

J953

J937

J943

J941

J938

J958

J959

J946

J936

J909

J923

J962

J904

J944

J967

J968

J920

IC9102

J964

R9171

J951

J952

J929

J918

J921

J926

J973

J917

J916

J956

J957

J922

J963

J942

J940

J950

J949

J948

J939

J912

J961

J955

J945

J965

J966

J919

J960

J969

J906

J905

J971

J913

J972

J970

J974

C9107

C9313

CN9302

F9901

FB9301

IC9301

L8101

NR9901

R8116

SG9901

SG9902

SG9904

NR9902

T9101

HS9101

HS9102

HS9302

C9120

C9302

C9102

C9301

C9306

C9101

C9303C9304

D9103

D9302

C8108

CN9301

CN9902

R9306

R9310

FB9905

CTI1

C9310

C8132

C9103

D9102

C9316

C8125

L9901

L9902

ZD9315

C9105

C9106

RV9902

F9902

R9313

CN8102

R9901

R9904

BD9901

R9906

ZD9103

ZD9104

ZD9316

RV9901

RV9903

HS9902

HS9901

C8127

C9118

CN9304

ZD9107

ZD9101

ZD9102

ZD9105

CN9303

GND3

GND10

GND7

GND2

GND8

GND1

GND6

GND9

GND11

GND4

CN9901

SG9903

FB9302

ZD9106

C9314

C9317

C9904

C9905

C9911

C9901

C9902

CN8101

C9104

C9109

SG9905

C8128

C8129

L8102

L9101

L9102

L9301

L9302

C9122

C9129

C9133

C9137

C9139

C9908

C9910

FB9901

FB9902

FB9906

C9130

C9108 C9312

C9912

FB9304

FB9303

SG9906

C9907

C9906 C9909 C9913

Q9101

GND13

GND5

GND12

Circuit Diagrams and PWB Layouts

EN 86Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-1-6 Power layout bottom

19240_505_120215.eps

120215

2011-12-21

1

715G5194

Power

layout bottom

C8101C8102

C8103

C8104 C8105

C8106 C8107

C8109 C8110

C8111

C8120

C8123

C8126

C9113

C9114

C9128

C9117

C9119

C9115

C9116

C9305

C9307

C9308

C9311

IC8107

IC9103

IC9303

R8101

R8102

R8103

R8104

R8105

R8106

R8107

R8108

R8109

R8110

R8111

R8112

R9136

R8113

R8114

R8115

R8117

R8118

R8120

R8121

R8122

R8123

R8124

R8125

R8127

R9101

R9103

R9104

R9155

R9150

R9127 R9109

R9110

R9114

R9115

R9116

R9117

R9121

R9122

R9123

R9120

R9303

R9304

R9305

R9311

R9312

R9314

R9315

R9316

R9317

R9318

R9319

C8115

C8119

R9112

R9111

R9307

C8124

R9324

C9126

C9127

R9124

C8122

C9112

IC8101

IC8104

IC8102

IC8105

IC8103

IC8106

IC9901

C9121

R9131

R9119

R9133

Q9105

R9134

C9111

R9174

C9124

C9125

R9118

R9135

R9102

R9105

R9106

R9107

R9139

R9140

R9141

R9142

R9143

R9144

R9145

R9146

R9148 R9149

C8113

R9158

R9159

R9160

R9161

R9162

IC9105

R8128

R8129

R8130

R9309

Q8102

Q8103

Q9301

Q9106

R9132

R9332

R9163

R9164

R8126

R9321

R9323

R9320

R8131

R9165 R9166

R8119

Q9104

R9902

R9903R9905

R9167

R9168

R9169

R9170

R9130

R8132

R8133

C9131 R9176

R9173

R9172

R9175

R9177

R9178

R9179

R9180

R9147

C9132

R8134

C9134

C9135

C9136

R9126

R9129

R9138

R9151

R9125

R9128

R9152

R9153

R9154

R9181

R9182

C9110

C9123

R9137

R9156

Q9102

RJ907

RJ905

RJ915

RJ902

RJ916

TEST1

D9306

RJ904

Q8101

RJ903

RJ908

RJ911

RJ913

RJ914

RJ906

RJ919

Q9110

RJ917

RJ909

Q9107

Q9112

RJ910

RJ901

Q9108

D9107

D8101

D9104

D9105

D9106

D9108

D9305

Q9103

Q9111

Circuit Diagrams and PWB Layouts

EN 87Q552.4E LA 10.

2012-Jun-29

back to

div. table

Circuit Diagrams and PWB Layouts

19240_506_120213.eps

120320

Power Circuit

A01 A01

2012-01-10

1

715G5246

Power Circuit

P_OK

C9832

100N 50V

P_OK

On/Off

1 2

3 4

F9901

FUSE

1 2

FB9302

BEAD

R9145

20K 1/8W 1%

VCC1

D9307

FR103

D9305

FR107

1 2

FB9803

60R

EN

R9320 510K 1% 1/8W

12V

+

C9147 22UF 50V

+

C9344

NC

1

D1

2

D1

3

NC4NC

5

D2

6

D2

7

NC

8

IC9901

NC

Q9304

2N7002

R9161 24K 1/8W 1%

R9311

NC

R9163 2K 1/8W 1%

C9903

470PF 250V

C9904

NC

C9906

470PF 250V

R9180 27K 1/8W 1%

B1+

R9171

5.1K 1/4W

C9831

NC

PS-On

R9339

NC

R9175

1.5K 1/4W

C9170 100N 50V

341

2

HS9101

HEAT SINK

R9307 10K 1% 1/4W

Q9301 NC

1 2

3

4

HS9301

HEAT SINK (D9308)

C9335

100N 50V

On/Off

SG9902

GS41-201MA

R9901

1MOHM +-5% 1/2W

!

R9341

NC

R9804

NC

R9331

47 OHM 1/4W

R9807 470 OHM 1/4W

SG9903

GS41-201MA

FB

1

COMP

2

RT

3

VREF4CS

5

GND

6

OUT

7

VCC

8

IC9801

R2A20113ASP

12

43

IC9303 PC123X8YFZOF

R9340

NC

R9317

1.5M 1% 1/4W

5.2V

24V

R9334 220 OHM 1/4W

C9151 1UF

C9153

1UF

5.2V

+

C9160

560UF 35V

C9333

0.47UF 50V

+

C9161

560UF 35V

2

1

3

4

-

+

BD9901

TS10B06G-06-X0

12V

R9806

56K 1/8W

Q9302 RK7002BM

C9824 22N 50V

C9144 100N 50V

R9151

10 OHM

!

R9141

0.1R

C9825

220N 50V

R9329

0.1R

RV9902

TVR14561KFAOZF

R9318

1.5M 1% 1/4W

D9801

FMN-1106S

1 2

FB9804 BEAD

C9342 100N 50V

+

C9164 330UF 35V

12V

C9827 100P 50V

R9810 13K OHM 1%

D9802

1N5408-11

C9159

330NF 50V

C9833

47pF

R9165

10K 1/8W

Q9103

PMBS3904

C9162

100N 50V

C9908

470PF 250V

!! !

C9909

470PF 250V

C9171

2.2NF

R9147

470 OHM 1/8W

R9336

1K 1/8W 1%

R9140 1K 1/8W 1%

R9149

470 OHM 1/8W

+

C9168 470UF 25V

!

+

C9163

470UF 25V

+

C9169 470UF 25V

1 2

3

HS9802

SHIELD

D9306 1N4148

C9826

220pF 50V

+

C9830 10UF 50V

R9172

5.1K 1/4W

R9153 10K 1/8W 1%

R9173

5.1K 1/4W

D9109 1N4148

R9174

5.1K 1/4W

R9303

20K OHM

R9156

10K 1/8W 1%

!

S/OCP

1

BR

2

GND

3

FB/OLP4VCC

5

D/ST

7

D/ST

8

IC9301

A6069H

R9306

10K 1/8W 1%

5.2V

R9332 2R2 +-5% 1/4W

C9152

1.5NF

R9808

10R 1/8W 5%

C9828 100N 50V

R9158

3.9K 1/4W

R9176

1.5K 1/4W

1 2

ZD9104

GDZJ15B

R9177

1.5K 1/4W

!

Q9305

MMBT3906 PNP

R9335 3K3 1/8W 5%

R9160

10K 1/8W 1%

R9139 100 OHM 1%

VCC1

C9910

470NF 305V

C9911

470NF 305V

VCC

R9308 10K 1/8W 1%

R9816

680K OHM +-1% 1/4W

C9829

100N 50V

R9815

680K OHM +-1% 1/4W

R9817

0R05

DIM

C9345

100N 50V

R9302 100K 1/6W 5%

1 2

ZD9101

GDZJ30B

DV5

C9331

1NF

R9310

100K 1/8W 1%

SB+

R9813

10K 1/4W

R9801

0.05R

R9809 30 OHM

Q9801 TK18A60V

1

6

3

4

L9801 300UH

12

D9803 RB160M

R9342

10K 1/8W 1%

R9138

1K 1/8W 1%

24V

R9333

1K 1/8W 1%

R9324 1K 1/8W 1%

24V

R9330

47 OHM 1/4W

R9304

100K 1/8W 1%

R9148 NC

R9309

100K 1/8W 1%

1 2

ZD9102

GDZJ15B

24V

1 2

ZD9105

NC

1

2

CN905 CONN

C9343

220N 50V

R9146 2K43 1/8W 1%

C9150

0.47UF 50V

12

D9113

RB160M

12

43

IC9106 PC123X8YFZOF

12

D9112

RB160M

1

2

3

D9308 FMW-2156

C9157

27NF

1 2

ZD9303

GDZJ15B

BOX

1 2

t

NR9901 NTCR

1 2

ZD9304

NC

1 2

FB9801 BEAD

1 2

FB9802

BEAD

R9101 200R 1/8W 1%

L9304

5uH

L9103

5uH

L9105

5uH

1 2

FB902 BEAD

L9106

5uH

VBoot

1 2

ZD9301

GDZJ18B

B1+

Q9106

MMBT3906 PNP

B1+

R9904

510K

R9905

510K

C9156

100PF1KV

D145T60P7_5-1_2-R

!

BOX

C9149 100N 50V

5.2V

R9343

0 OHM 1/8W

C9155 1N 50V

12V

C9334 1N 50V

7

6

1 2

11

10

15 14

8

9

13 12

T9101

POWER X'FMR

R9301

1.2R

SB+

VBoot

R9111

NC

R9143

NC

R9814

680K OHM +-1% 1/4W

SG9905

DSPL201M-A21F

SG9904

DSPL201M-A21F

+

C9802 47UF 450V

C9803 470PF1KV

2 3

1

IC9304

AZ432AZTR-G1

1

2

3

D9115 FMEN-2308

C9165 100N 50V

VCC1

VCCVCC1

Vsen

1

Vcc

2

FB

3

GND

4

Css

5

OC

6

RC

7

Reg

8

RV9COM

10

VGL

11

NC

12

NC

13

VB

14

VS

15

VGH

16

NC

17

NC

18

IC9101

SSC9512S-TL

5.2V

R9811

100 OHM 1/4W

R9144

1M 1% 1/4W

R9337

12.7 KOHM +-1% 1/8W

R9338

7.87K 1%

C9154 560P 50V

!

Q9303 2SD1624T-TD-E

R9155

100 OHM 1/4W

124

3

L9901

12MH

C9301

100N 50V

R9152

47OHM +-5% 1/8W

D9110 1N4148

12

t

NR9902 NTCR

L

1

N

2

CN904 CONN-NC

IC9107 AS431AZTR-E1

124

3

L9903

12MH

R9154

47OHM +-5% 1/8W

+

C9340

470uF 16V

+

C9341 470uF 16V

Q9104

NTD4906NT4G

C9146

100N 50V

12

43

IC9302

PC123X8YFZOF

R9159

3.3K 1/4W

Q9802

NTD4906NT4G

1 2

CN901

SOCKET

D9114

UF4007

1 2

D9301

RB160M

R-

12

D9302

RB160M

C9158 NC

D9304

FR107

C9145

100N 50V

R-

C9907

470PF 250V

C9166 NC

DV5

R9164

1K 1/8W

+

C9801 47UF 450V

Main_ov

1

2

3

5

6 7

9 10

4

T9301

POWER X'FMR

R9805 200KOHM 1/8W +/-5%

Main_ov

RV9901

TVR14561KFAOZF

+24V

1 2

ZD9107

BZT52-B22

R-

C9148

4.7UF 10V

1

2

3

D9116 FMEN-2308

VCC1

R9818

1K 1/8W

1

2

3

4

5

6

7

8

9

10

11

12

13

CN902

CONN

+

C9804 47UF 450V

C9820

1UF 450V

C9901

NC

1 2

FB9904

BEAD

C9912

470PF 250V

C9905

470PF 250V

R9325

100K

R9326

100K

R9328

100K

R9327

100K

!

! !

!

12

ZD9106

BZT52-B5V1

!

R9178

5.1K 1/4W

!

1 2

3

4

HS9103

HEAT SINK

R9319

1.5M 1% 1/4W

+

C9805 47UF 450V

+

C9302 22UF 50V

R9142

1.5M 1% 1/4W

R9150

1.5M 1% 1/4W

R9346 1K 1/4W

24V-LED

341

2

HS9102

HEAT SINK

C9338

1NF

1

2

3

4

5

6

7

8

9

10

11

12

CN903

CONN

PS-On

R9323

4.7M OHM +-5% 1/4W

24V

R-

DV5

12

ZD9302

P6KE160A

DIM

On/Off

+

C9336 10UF 50V

1 2

3

4 HS9801

HEAT SINK

1 2

3

4

HS9901

HEAT SINK

24V

R9819

10K 1/8W

R9102 10 OHM

Q9101 TK10A50D

5.2V

Q9102 TK10A50D

R9103

10 OHM

+

C9337 47UF 50V

1 2

FB903 NC

R9345

NC

10.2 A01 715G5246 PSU 42" 3500/4000 series

10-2-1 Power Circuit

EN 88Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-2-2 24 V to VLED

19240_507_120213.eps

120213

24 V to VLED

A02 A02

2012-01-10

1

715G5246

24 V to VLED

FB1GM2RT3CS

4

DIM

5

GND

6

OUT

7

VCC

8

IC8103

PF7900S

1

2

3

4

L8101

25UH

12

D8118

RB160M

DIM

VLED

R9316

NC

24V-LED

R8153

0 OHM 1/8W

Q8101

TK12A10K3

R8148

1K 1/8W 1%

R8162

1K 1/8W 1%

R8157

10K 1/8W 1%

+

C8118

100UF 100V

+

C8108

100UF 100V

R9322 100K 1/8W 1%

12V_LED

Q9306

MMBT3906 PNP

12V

R9312 51K OHM

R9313 15K 1% 1/8W

12V_LED

R8177

NC

Q9308 PMBS3904

R9321

33K OHM

On/Off

C9346 100N 50V

R8176

0 OHM 1/4W

1 2

ZD8103

BZT52-B13

R8141 20K 1% 1/8W

R8144

430K 5%

R8163

200K 1%

R8158 22 OHM 1/8W

R8161

2.2 OHM 1/8W

C8113 1N 50V

EN

R8154 100K

R8155 100K

R8156 100K

R8145

270K 1/4W

R8147 110K OHM 1%

R9315

3.9K1% 1/8W

R9344

10K 1/8W

LED-COMP

+

C8121

22UF 50V

12V

C8119 NC

C8106

NC

C8111

100N 50V

1

2

3

D8120

MBRF10150CT

C8105 1N 50V

R8175

0.1R

Circuit Diagrams and PWB Layouts

EN 89Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-2-3 LED Driver

19240_508_120213.eps

120213

LED Driver

A03 A03

2012-01-10

1

715G5246

LED Driver

C8503 1UF 16V

C8504 1UF 16V

C8505 1UF 16V

C8506 1UF 16V

C8507 1UF 16V

VLED

LED-4

C8508 1UF 16V

C8509 1UF 16V

LED-COMP

C8510 1UF 16V

C8511 1UF 16V

LED-15

LED-11

C8512 1UF 16V

C8513

1UF 16V

C8514 1UF 16V

LED-13

C8515 1UF 16V

C8516 1UF 16V

LED-14

LED-15

LED-16

EN

DIM

12V_LED

LED-COMP

12V_LED

EN

DIM

12V_LED

12V_LED 12V_LED

12V_LED

LED-16

LED-9

LED-10

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8509

PF7703S

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8507

NC

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8508

NC

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8510

PF7703S

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8513

NC

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8515

PF7703S

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8511

PF7703S

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8514

NC

LED-COMP

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8516

PF7703S

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8512

PF7703S

EN

DIM LED-COMP

DIM DIM

LED-COMP

EN

DIM

DIM LED-COMP

LED-COMP

EN

DIM

EN

DIM

EN

LED-COMP

LED-11

EN

LED-COMP

LED-8

1

2

3

4

5

6

7

8

9

10

11

12

CN8502

NC

EN

DIM

LED-7

LED-COMP

LED-13

LED-11

LED-9

LED-12 LED-14

LED-10

VLED

LED-12

LED-1

LED-7 LED-8

LED-COMP

LED-2

EN

DIM

LED-15 LED-16

LED-COMP

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8501

PF7703S

LED-3

LED-6

LED-5

1 2

3

4 5 6 7

8

CN8503

NC

1 2

3

4 5 6 7

8

CN8504

NC

LED-3

LED-6

LED-2

LED-4

LED-1

1

2

3

4

5

6

7

8

9

10

11

12

CN8501

NC

LED-5

VLED

LED-4

VLED

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8502

PF7703S

DIM

EN

R8501 11K 1%

LED-COMP

R8502 11K 1%

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8503

PF7703S

R8503 11K 1%

R8504 11K 1%

R8505 11K 1%

+

C8158 NC

C8501 1UF 16V

R8506 11K 1%

R8507 11K 1%

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8504

PF7703S

R8508 11K 1%

C8502 1UF 16V

R8509 11K 1%

DIM

EN

R8510 11K 1%

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8505

PF7703S

R8511 11K 1%

LED-COMP

R8512 11K 1%

R8513 11K 1%

DIM

EN

R8514 11K 1%

DIM

1

FLAG

2

VCC

3

LED4GND

5

ISET

6

GM

7

COMP

8

IC8506

PF7703S

C8157 100N 50V

C8523 100N 50V

C8529 100N 50V

C8530 100N 50V

C8524 100N 50V

C8518 100N 50V

C8519 100N 50V

C8525 100N 50V

C8531 100N 50V

C8532 100N 50V

C8526 100N 50V

C8520 100N 50V

C8521 100N 50V

C8527 100N 50V

C8528 100N 50V

C8522 100N 50V

R8515 11K 1%

LED-COMP DIM

EN

R8516 11K 1%

LED-14

LED-12 LED-13

LED-5

LED-3

LED-6 LED-1

LED-2

Circuit Diagrams and PWB Layouts

EN 90Q552.4E LA 10.

2012-Jun-29

back to

div. table

Circuit Diagrams and PWB Layouts

19240_509_120215.eps

120215

2011-12-22

1

715G5246

Power

layout top

C9147

C9156

C9302

C9803

D9109

D9110

D9305

D9306

D9307

D9802

IC9302

IC9106

IC9107

IC9303

IC9304

J9901

T9301

J9306

J9905

J9907

J9302

J9303

J8501 J8504 J8507 J8510 J8514 J8517

J8525

J8524

J8529

J8528

J8513

J8503

J8506

J8509

J8512

J8516

J8519

J8523

J8526

J8530

J8549

J8550

J8533

J8538J8537

J8532

J8546

J8551

J8547

J8535

J8564

J8548

J9906

J9902

J9903

J9904

J8544

J8545J8543J8541

J8542

J8521

J8522J8518J8515J8511J8508J8505J8502

C8121

C9336

C9830

R9301

J9307

T9101

J8536

J9114

J9115

J9113

J9110

J9111

J9103

J9105

J9112

J9109

J8561

J8531

J8540

J9106

J8520

J9108

J8539

J8558

J8552

J8527

J9309

J9305

J9308

J9908

J9909

J9910

J9117

J9116

J9107

J9104

J8554

J8553

J9102

J9101

J9304

J8534

J9301

C8158

J8565

J9118

C9905

C9912

J9912

J9911

BD1

C9901

C9157

C9801C9802 C9804C9805

D9801

F9901

FB902

FB903

FB9801

IC9301

Q9801

R9904

R9905

SG9902

SG9903

SG9904

SG9905

R9801

HS9801

C9164

CN8501

CN8502

D9115 D9116

L8101

R8175

CN903

D8120

CN8504 CN8503

HS9901

FB9802

GND1

HS9802

C9340

C9341

C9344

C9163

C9168

C9169

C9337

CN902

L9103

L9901

HS9103

HS9301

D9114

RV9901

RV9902

FB9904

L9903

Q8101

D9308

C9160

C9161

HS9102

HS9101

C9910

C9911

R9141

R9329

L9801

Q9101

Q9102

C9820

ZD9302

NR9901NR9902

R9901

R9302

CN905

C9331

C9338

L9105

L9106

L9304

C9903

C9904

C9906

C9907

C9152

ZD9101

ZD9102

ZD9105

ZD9301

ZD9303

ZD9304

ZD9104

C8108

C8118

C9908

C9909

D9304

C9833

FB9804

C9171

FB9803

FB9302

BD9901

CN901

CN904

10-2-4 Power layout top

EN 91Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-2-5 Power layout bottom

19240_510_120215.eps

120215

2011-12-22

1

715G5246

Power

layout bottom

C8105

C8106

C8111

C8119

C9144

C9145

C9146

C9149

C9150

C9151

C9153

C9154

C9155

C9158

C9159

C9165

C9170

C9333

C9334

C9335

C9342

C9343

C9301

C9824

C9825

C9826

C9827

C9828

C9829

IC9801

IC9901

Q9103

Q9301

R8141

R8144

R8148

R8153

R8154

R8155

R8156

R8157

R8161

R8162

R8163

R9101

R9139

R9140

R9150 R9144

R9145

R9146

R9148

R9149

R9151

R9152

R9153

R9154

R9156

R9158

R9159

R9161

R9163

R9171

R9172

R9173

R9174

R9175 R9176

R9177

R9180

R9317 R9318 R9319

R9320

R9323

R9332

R9325

R9326

R9327

R9328

R9330

R9331

R9334

R9335

R9336

R9337

R9338

R9339

R9340

R9341

R9306

R9304

R9804

R9805

R9806

R9807

R9810

R9813

R9815 R9816

R9342

R9343

R9345

C8501

C8502

C8503

C8504

C8505

C8506

C8507

C8508

C8509

C8510

C8511

C8512

C8513

C8514

C8515

C8516

IC8103

IC8501

R8501

R8502

R8503

R8504

R8505

R8506

R8507

R8508

R8509

R8510

R8511

R8512

R8513

R8514

R8515

R8516

C8157

C8518

C8519

C8520

C8521

C8522

C8523

C8524

C8525

C8526

C8527

C8528

C8529

C8530

C85

31

C8532

IC8503

IC8505

IC8504

IC8507

IC8506

IC8508

IC8502

IC8512

IC8510

IC8509

IC8511

IC8513

IC8516

IC8514

IC8515

C9345

R9309

R9310

Q9304

R9817

R8158

R9142

JR9101

R8176

R8147

R8145

C9346

R9809

R9147

R9160

R9808

R9308

R9311

R9312

R9313

R9316

R9321 R9322

R9178

Q9305

Q9306

Q9308

C9148

R9102

R9103

C9831

R9307

JR9102

JR8101

C8113

R9346

Q9302

C9832

R9111

R9138

R9143

R9315

R9324

R9333

R9344

R9818

R9819

Q9106

R9303

R9814

R9165

C9162

R9164

R9155

R9811

JR9103

R8177

C9166

JR9104

D8118

D9112

D9113

D9803

IC9101

ZD8103

D9301

D9302

Q9104

Q9802

Q9303

ZD9106

ZD9107

Circuit Diagrams and PWB Layouts

EN 92Q552.4E LA 10.

2012-Jun-29

back to

div. table

10.3 B 313912365313 SSB

19220_031_120228.eps

120509

Power connectors

B01A B01A

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

Power connectors

**

* AL

6 Pin stuffing variant 1M1B

**

To be connect directly to 1A04 with 3mm Track width

*

x

LGD 50HZ

--

*

--

4 Pin stuffing variant 1M11

--

* AL

**

100HZ 3D

*

with LX4 & LX25

3U42

x

*

3D TM100

100HZ 2D

9U43

x

*

--

9U44

xx

10K

3U53

RES 10K

3U61

1n02U83RES

3U75

10K

RES

cU40

FU77

RES

10K

3U69

IU47

100K

1 8

3U83-1

7U43

BC847BW

7U42 RES

FU7A

100K

3U65

3

4

3U68

10K

7U40-2

BC847BPN(COL)

5

100R3U85-1 1 8

FU7F

RES

IU48

1K0

3U82

2

6

1

1n02U88RES

BC847BS(COL)

7U41-1

5

10n

2U49

100R3U85-4 4

6

FU75

3U60-3

22K

3

2U46 10n

RES 2U84 1n0

3U71

9U41

100R

BC847BS(COL)

5

3

4

1K0

3U72

7U41-2

45

+3V3

3U83-4

100K

3U85-2 2 7 100R

2U56

10u

3U60-4

22K

54

FU53

FU48

7U48-2

5

3

4

IU56

BC857BS(COL)

3U42 100R

9U43

9U44

3K3

3U73

10n

2U54

FU58

GND-AL

+5V

FU66

RES 2U8D

10n

T 32V3.0A

1U40

RES10K

3U59

FU7D

2

3

4 5 6 7

8

9

1

10 11 12 13 14

FU7H

1-2041145-4

1M95

FU7C

6U40

PDZ6.2B(COL)

FU73

4 5 6 7

8

+3V3-STANDBY

1M99

1 2

3

1n0

2041145-8

FU7K

RES

2U45

+3V3

2U53

1n0

3U64

1K0

FU51

3U43

100R

RES

6

1

9U42

BC847BPN(COL)

7U40-1

2

4K7

GND-AL

FU63

3U80

100R3U84-33 6

8 100R3U84-1 1

IU44

5

IU55

3U62-4

10K

4

5

IU49

100R3U84-4 4

2U44 100p

IU45

+12V-AUDIO

72

3U62-2

10K

FU55

3U81

10K

2

6

1

+3V3-STANDBY

+12V

BC857BS(COL)

7U48-1

100K

36

27

3U83-3

100K

3U83-2

+3V3-STANDBY

10n

2U89

RES 2U85 1n0

10K

3U70

27

FU76

100R3U84-2

FU7G

FU52

10K

3U74

RES

1 8

FU7J

3U60-1

22K

10K

81

FU7B

2U47

3U62-1

2U50

10n

1n02U86RES

GND-AL

RES 2U87 1n0

3

4 5 6 7

8

9

1M54

2041145-9

1 2

RES 2U82 1n0

RES

3U41

10K

+12VD

+3V3-STANDBY

IU43

RES 10K

3U63

FU67

FU60

+3V3

3U45

100R

22K

72

+12V-AL

3U60-2

IU51

2U55

FU72

1u0

RES

3U85-33 6

2U81

100R

+12VIN

RES 1n0

+12VIN

2U68

1u0

FU59

2U71

100n

3U62-3

3 6

+3V3-STANDBY

10K

BL-PWM

BL-DIM1

BL-DIM

STANDBY-1

STANDBY

BL-DIM8

BL-DIM7

BL-DIM6

BL-DIM5

BL-DIM4

BL-DIM3

BL-DIM2

BL-DIM1

POWER-OK-1

BL-ON

BL-I-CTRL

POWER-OK

ENABLE-1V8

ENABLE-3V3n

ENABLE-3V3-5V

BL-DIM-1

BL-I-CTRL-1

BL-ON-1

LED1

LED-2

LED2 LED2

LED1

DETECT2

LED-1

10-3-1 Power connectors

Circuit Diagrams and PWB Layouts

EN 93Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-3-2 Interface connectors

19220_032_120228.eps

120509

Interface connectors

B01B B01B

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

Interface connectors

+T

RESERVED

*

**

*

SENSOR

**

To sensor & control

HOTEL TV

FC85

TEMPERATURE

**

6C02

PDZ5.6B(COL)

GND-AL

RES

5C57 30RRES

3C97

0R3

FC88

3C7F

RES

FC72

10K

47R3C94

FC9A

RES

FC71

12

13

IC78

10 11

2

3

4 5 6 7

8

9

1C20

FH52-11S-0.5SH

1

RES

10p

2C86

2C79

100p

GND-AL

2C95

10u

PDZ5.6B(COL)

6C07

RES

2C94RES

FC86

100n

30R

5C56

+12V

100R

3C99RES

V-AMBI

GND-AL

47n

2C93

RES

2C78

100p

100n

+12V

9

19

20

2C81

16 17 18

2

3

4 5 6 7

8

FH52-18S-0.5SH

1

10 11 12 13 14 15

1C21

RES

100p

2C97

IC75

10n

2C7L

RES

100p

2C82

+3V3

3C72 100R

2C7CRES

10p

5 6 7

8

9

19

20

12 13 14 15 16 17 18

2

3

4

FH34SRJ-18S-0.5SH(50)

1A05

RES

1

10 11

3C75 100R

1u0

2C70

6 7

8

1C22

1 2

3

4 5

FC73

2041145-8

8

910

100R

3C83

RES

1 2

3

4 5 6 7

502386-0870

1C03

FC93

2C7F

1u0

IC79

+3V3-STANDBY

2C83

10p

30R5C55

1u0

2C90

3C70 100R

100p

2C99

9C08RES

RES3C98

100R

RES

FC9K

1u0

2C7G

2C91

1u0

FC9D

RES

+3V3-STANDBY

RES

3C73 47R

PDZ5.6B(COL)

6C05

10R

3C79

FC95

FC75

100R

3C76

3C7H

33R

9C06

FC9G

2C71

100n

1 2

3

4

56

V-AMBI

1T71

502386-0470

+12V-AL

63V

RES

1.0A

1C85

FC9B

IC74

T

FC9F

100p

2C80

FC91

IC7H

+3V3

33R

3C7G

100p

FC97

2C76

FC74

FC98

100R

3C78

RES

100K

3C74

RES

+3V3

2C72

100p

FC76

3C96

4K7

100R3C81

2C96

10n

10p

2C84

4 5 6 7

8

9

19

20

11 12 13 14 15 16 17 18

2

3

FH34SRJ-18S-0.5SH(50)

1

10

RES

1A04

5C53

30R

IC7G

IC7A

RES

IC73

3C95

47R

+3V3

FC9L

3C77 100R

1C86

2.0A 63VT

9C09RES 9C07

V-AMBI

1C04

1.0A63VT

FC90

FC94

10u

2C7KRES

47R

3C7A

RES

FC87

+5V

cC01

FC9J

2C85

1u0

2C7B

10p

RES

FC89

10p2C7N

+5V

30R

5C54

FC9H

FC96

FC99

100p

2C77

GND-AL

FC92

PDZ5.6B(COL)

6C03

RES

IC7D

+5V

RES

FC77

100R

3C71

2C7M 10p

RES 2C87

10p

+3V3

IRQ-CRP

TACHO

AMBI-SPI-OUT-MOSI

AMBI-SPI-OUT-CCLK

AMBI-TEMP

TXD2-MIPS

RXD2-MIPS

AMP1 AMP2

TXD1-MIPS

RXD1-MIPS

AV2-STATUS

3D-LED

SDA-BL

SCL-SET

SDA-SET

SCL-BL

LED-2

RC

LIGHT-SENSOR

KEYBOARD

LED-1

Circuit Diagrams and PWB Layouts

EN 94Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-3-3 DC/DC

19220_033_120228.eps

120509

DC/DC

B02A B02A

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

DC/DC

2

VFB

1 2

TRIP

DRVL

1 2

DRVH

1 2

SW

1 2

PGND

1 2

TEST

1 2

VREG5

V5FILT

1 2

VIN

GND

VBST

1 2

EN

1 2

VO

1

RES

12V/1V1 CONVERSION

12V/1V8 CONVERSION

0R

+1V8

12K

3U03

GND-SIG

+1V1

3U02

22K

IU13

2U22

220p

3U10

22K

220p

2U21

IU15

3U11

3R3

5U02

47R

3U24-3

3R3

2U00

10u

3U05

IU21

3U23-3

3 6

IU16

GND-SIG

47R

2U20

1u0

2U24

10u

+1V1

IU01

10K

3U01

RES

2 11

5

8

20

4 9

19

IU07

6

22 15

24 13

7

17

21 16

18

TPS53126PW

7U03

1

12

23 14

3

10

+1V1

3U28

1%1K0

3U22

10R

GND-SIG

+1V8

GND-SIG

3R3

3U14

10u

2U04

FU00

IU11

GND-SIG

RES1n0

2U03

1%100R

3U21

3U24-1

47R

FU06

3U24-2

100n

2U02

1 8

27

47R

3U23-1

3U23-2

47R

IU10

RES

2U08

100p

IU23

2.0V100u

2U14

+12V

RES

2U11

1n0

2U16

22u

STPS2L30A

6U00

FU02

GND-SIGGND-SIG

2U23

10u

IU03

330R

3U17

CU05

1%

FU08

GND-SIG

1%

3U19

5K6

3U18

1K0

100n

2U29

RES

3U08

FU03

1%330R

2u0

5U01

10R

3U27

SI4952DY

7U02-2

56

4

3

GND-SIG

IU24

IU02

IU22

IU06

IU05

2U01

100n

2U18

1n0

1u0

2U05

100n

2U06RES

3U00

RES

CU02

10K

IU18

GND-SIG

RES

2U07

100p

1%

3U09

1K0

IU25

FU01

1u0

2U10

2U15

47u

3U24-4

47R

IU04

7 8

2

1

FU05

45

7U02-1

SI4952DY

3U23-4

47R

IU12

8

4

123

IU14

SI4778DY-GE3

567

10u

2U25

7U01

1n0

2U09

3R3

3U04

1n0

2U17

GND-SIG

3

2

CU01

BC847BW

7U00

RES

1

CU04

FU09

CU03

IU19

RES

10R

3U20

47u

2U12

30R

5U03

IU20

RES

IU09

CU00

678

4

123

SI4778DY-GE3

7U04

5

3u6

5U00

GND-SIG

IU17

IU08

FU04

2U19

10u

2U13

22u

GND-SIG

+3V3-STANDBY

SENSE+1V1

ENABLE-1V8

Circuit Diagrams and PWB Layouts

EN 95Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-3-4 DC/DC, 1.8 V to 1.2 V conversion

19220_034_120228.eps

120509

DC/DC

1.8 V to 1.2 V conversion

B02B B02B

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

DC/DC

1.8 V to 1.2 V conversion

VIA

COM

OUTIN

ADJ

VOUT

NC

EN

VIN

HSGND

GND

VDD

PGOOD

+3V3

+2V5

18

+2V5-LVDS

242526

11 12 13

141516

17

10 19 20 21

22

23

7UA4-2

RT9025-12GSP

45

FUA0

4K7

3UB0-3

36

3UB0-4

4K7

3UB0-2

27

18

4K7

3UB0-1

10u

2UB0

3UB2

10K

1%

82K

3UB3

3UB1

3K9

1%

2UB3

1n0

FUA3

2UB2

RES

9UA0

2UB1

10u

1

4

63

1u0

7UA4-1

RT9025-12GSP

72

8

9

5

2UB6

22u 16V

+1V8

+12V

FUA5

+1V2

+5V

FUA4

PDZ5.1B(COL)

6UA0

2

13

CUA0

LF25ABDT

7UC0

1u0

2UA4

SENSE+1V2

Circuit Diagrams and PWB Layouts

EN 96Q552.4E LA 10.

2012-Jun-29

back to

div. table

Circuit Diagrams and PWB Layouts

19220_035_120228.eps

120509

DC/DC 12 V to 5 V/3.3 V conversion

B02C B02C

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

DC/DC

12 V to 5 V/3.3 V conversion

GND

GND HS

VIN

EN

SS

VIA

BOOT

SW

FB

COMP

GND

GND HS

VIN

EN

SS

VIA

BOOT

SW

FB

COMP

12V/5V CONVERSION

12V/3V3 CONVERSION

0R

SS1_GND

SS2_GND

2UFA

100u 16V

RES

5UD0

8

3

10

12

6

7

5

4

9

IUDA

RT8293AHGSP

7UD1

RES

10R

3UD2

3UD4

2K2

RES

2UDG

470p

1%

+5V

IUD8

SS1_GND

RES

22u

2UF8

SS2_GNDSS2_GND

SS1_GND

2UDF

100u 16V

RES

2UF3

3n3

SS2_GND

2UF6

22u

2UF7

22u

10u

2UF0

+12V

2UD9

10u

RES

16V100u

2UFB

SS1_GND

SS2_GND

RES

10u

2UD8

2UF9

22u

100n

cUD1

2UD5

3UD1

15K

1%

1K5

3UF6

1%

4K7

3UF4

10K

3UD5

2UDB

22u

1%

+3V3

100n

2UF2

10u

5UD2

2UF1

100n

5UD1

10u

cUD2

100K

3UF5

22u

2UDD

2UDA

22u

IUD6

1R0

3UD0

SS1_GND

3UF3

IUD9

RES

10R

2UF5

470p

RES

IUD2

1R0

3UF1

12K

3UF2

RES2UD7

7

5

4

9

8

3

10

2

10n

RT8293AHGSP

7UD0

1

6

RES

16V100u

2UDH

2UDC

IUDG

22u

IUDF

IUD5

100n

2UD4

IUD4

2UF4

10n

IUD3

RES

FUD2

FUD3

IUD1

IUD0

IUD7

5UD3

RES

2UD3

1n0

2UD2

10u

2UD1

2UD0

10u

+12V

3UD3

12K

2UD6

IUDC

IUDH

3n3

ENABLE-3V3-5V

10-3-5 DC/DC, 12 V to 5 V/3.3 V conversion

EN 97Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-3-6 DVBS supply

19220_036_120228.eps

120509

DVBS supply

B03A B03A

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

DVBS supply

ADJ

VOUT

NC

EN

VIN

HSGND

GND

VDD

PGOOD

VIA

SW

VREG5

GNDGND_HS

VFB

VIA

EN

VIN

SS

VBST

2T20

220u 6.3V

2T03

+1V0-DVBS

RES

1n0

470K

3T02

11 12 13

141516

17

18

RES

10 19 20 21

2223242526

4

63

RT9025-12GSP

7T03-2

RT9025-12GSP

7T03-1

72

8

9

5

1

10u

2T17

FT06

68K

RES

IT18

IT02

3T00

GND-1V0

cT01

2T02

GND-1V0

22u

100n

IT00

2T12

2T15RES

5T01

22u

3u0

30R

5T00

+2V5-DVBS

+1V8

+12V-DVBS

FT07

2T01

10u

2T00

10u

GND-1V0

2T18

10u

GND-1V0

10n

GND-1V0

+3V3

2T04

22p

2T14RES

2T16

1u0

3T05

+1V2-FE

1%8K2

8K2 1%

+5V

1%

RES

3T04

3T01

22K

IT04

100n

2T05

IT01

2T10

1u0

3

5T03

30R

5

9

64

72

10

11

8

7T00

TPS54227DDA

Φ

STEP DOWN

1

FT09

IT24

68K

3T06

1n0

2T13

SENSE+1V0-DVBS

Circuit Diagrams and PWB Layouts

EN 98Q552.4E LA 10.

2012-Jun-29

back to

div. table

Circuit Diagrams and PWB Layouts

19220_037_120228.eps

120509

Core voltage supply for DVBS demodulator

B03B B03B

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

Core voltage supply for

DVBS demodulator

VIA

ADDR

VOUT

VUP

VBYP

SCL

SDA

DETIN

IN OUT

FLT

BPSW

ISEL

GND

PGND

GND_HS

DSQ

NC

VCC

LX

5TP5

10u

T 32V3.0A

1TP1

3TPB 47R

2TPC

100n

10u

+5V

2TPL

ITPJ

B230LA-M3

6TP4

3TPD 47R

30 31 32 33

20

21

+12V-DVBS

24

4

7

8

16

17

26 27 28 29

25

9

3

1

5 10 11 12 13 14

6

18

19

22

23

2

15

LNBH25PQ

7TP2

Φ

2TPJ

470n

RS1D

6TP5

ITP4

+V-LNB

6TP6

B230LA-M3

FTPA

2TPF

35V47u

1K0

3TP3

DEBUG

ITPF

10u

2TPD

+12V-DVBS

DEBUG

6TP1

LTST-C190KGKT

ITP2

3TPF

22K

2TPH

470n

2TPG

47u35V

2TPK

220n

+12V

ITPG

+12V-DVBS

SDA-SSB-550

SCL-SSB-550

F22-DISECQ-TX

10-3-7 Core voltage supply for DVBS demodulator

EN 99Q552.4E LA 10.

2012-Jun-29

back to

div. table

10-3-8 DDR

19220_038_120228.eps

120509

DDR

B04A B04A

2011-12-12

3

2012-04-23

4

2011-05-25

2

3139 123 6533

DDR

4 5 6 7

2

0

VSSDL

VSS

1 2

3

CS RAS

NU|RDQS

CKE

DQS

ODT

1

0 1 2

3

4 5 6 7

8

9 10 11 12 13

NC

VDDQ

DQ

A

CK

VSSQ

BA

CAS WE

0

DM|RDQS

VREFVDDL

VDD

4 5 6 7

2

0

VSSDL

VSS

1 2

3

CS RAS

NU|RDQS

CKE

DQS

ODT

1

0 1 2

3

4 5 6 7

8

9 10 11 12 13

NC

VDDQ

DQ

A

CK

VSSQ

BA

CAS WE

0

DM|RDQS

VREFVDDL

VDD

4 5 6 7

2

0

VSSDL

VSS

1 2

3

CS RAS

NU|RDQS

CKE

DQS

ODT

1

0 1 2

3

4 5 6 7

8

9 10 11 12 13

NC

VDDQ

DQ

A

CK

VSSQ

BA

CAS WE

0

DM|RDQS

VREFVDDL

VDD

4 5 6 7

2

0

VSSDL

VSS

1 2

3

CS RAS

NU|RDQS

CKE

DQS

ODT

1

0 1 2

3

4 5 6 7

8

9 10 11 12 13

NC

VDDQ

DQ

A

CK

VSSQ

BA

CAS WE

0

DM|RDQS

VREFVDDL

VDD

AT T-POINT

DDR2-VREF-DDR

+1V8

3B19

33R

1 8

33R

3B18

5

33R

3B10-1

3B11-4

33R

433R

453B10-4

2B29

100n

2B28

100n

2B27

33R

1 833R

3 6

3B07-1

5

3B08-333R

3B07-4

4

3B08-1

33R

1833R

27

3B07-33 6

3B08-2

45

33R

27

33R

R334-80B3

3B07-2

100n

2B19

100n

2B18

100n

2B25

2B02

100n

2B01

2B00

100n

2B03

100n

27

6

33R

3B11-2

3B10-333R

3

240R

3B27

3B06

240R

RES

33R

3B04-4 4 5

3B05-1

33R

1 8

3 6

27

33R

3B05-3

3B04-2

33R

100n

2B17

DDR2-VREF-DDR

100n

2B16

2B15

100n

2B14

2B13

100n

2B12

3B13

33R

100n

100p

2B36

E7A7B2

B8

D2

D8

F3

A9C1C3C7C9

E2

A3

E3J1K9

L3 L7

A2

F9

F7

A1E9L1H9E1

C8 C2 D7 D3 D1 D9 B1 B9

B7 A8

K8 K3

G2 G3 G1

G7

E8

F2

F8

G8

B3

H2 K7 L2 L8

H7 J2 J8 J3 J7 K2

SDRAM

EDE1108AGBG-1J-F

H8 H3

Φ

7B01

63B04-3

33R333R 3B05-227

3B03

240R

RES

240R

3B01

3B02-1 33R

1

8

27

3 6

3B02-2

33R

45

33R

3B02-3

33R

3B02-4

240R

3B22

RES 2p2

2B46

2B42

47u

2B43 2B41

47u

RES3B09

240R

3B24

33R

3B26

33R

3B25

33R

3B23

33R

2B47

2p2

2B45

RES

2B44

2p2

B8

D2

D8

F3

C7C9E2

A3

E3J1K9

E7A7B2

F7

A1

E9

L1H9E1

A9C1C3

D3 D1 D9 B1 B9

B7 A8

L3 L7

A2

F9

G1

G7

E8

F2

F8

G8

B3

C8 C2 D7

L8

H7 J2 J8 J3 J7 K2 K8 K3

G2 G3

H8 H3

H2 K7 L2

Φ

SDRAM

7B00

EDE1108AGBG-1J-F

A3

E3J1K9

E7A7B2

B8

D2

D8

F3

E9

L1H9E1A9C1C3C7C9E2

B1 B9

B7 A8

L3 L7

A2

F9

F7

A1

E8

F2

F8

G8

B3

C8 C2 D7 D3 D1 D9

J8 J3 J7 K2 K8 K3

G2 G3 G1

G7

7B03

EDE1108AGBG-1J-F

H8 H3

H2 K7 L2 L8

H7 J2

Φ

SDRAM

J1

K9

E7A7B2

B8

D2

D8

F3

H9

E1A9C1C3C7

C9

E2

A3

E3

A8

L3 L7

A2

F9

F7

A1E9L1

G8

B3

C8 C2 D7 D3 D1 D9 B1 B9

B7

J7 K2 K8 K3

G2 G3 G1

G7

E8

F2

F8

H8 H3

H2 K7 L2 L8

H7 J2 J8 J3

Φ

SDRAM

7B02

EDE1108AGBG-1J-F

47u

2B40

240R

3B28

2B38

100p

2B39 2B37

100p

2B24

100n

2B23

100n

2B22

100n

2B21

2B34

100n

2B33

100n

2B32

100n

2B31

100n

2B30

100n

33R

3B17

3B16

100n

2B11

2B09

2B10

100n

DDR2-VREF-DDR

2B26

100n

2B20

FB00

+1V8

1%1%180R

3B21

3B20

180R

2B07

100n

2B06

2B05

100n

2B04

1 8

3 6

33R

3B11-1

27

3B11-3

33R

3B10-2

100n

DDR2-VREF-DDR

2B35

+1V8

3B15 33R

33R

1 8

3B14

4

5

3B04-1

33R

3B05-4

33R

3B12

33R

3B00-11 8

3B00-4

33R

45

3B00-33 6

27

33R

3B00-2

2B08

100n

DDR2-VREF-DDR

DDR2-CLK_P

DDR2-CLK_N

DDR2-CLK_P

DDR2-DQM2

DDR2-DQM3

DDR2-DQM0

DDR2-DQM1

DDR2-CLK_N

DDR2-CLK_P

DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9

DDR2-A14

DDR2-A13

DDR2-CS DDR2-RAS

DDR2-WE

DDR2-ODT

DDR2-RAS

DDR2-ODT

DDR2-BA1

DDR2-CLK_P DDR2-CLK_N

DDR2-A1

DDR2-A10 DDR2-A11 DDR2-A12

DDR2-A3 DDR2-A4 DDR2-A5

DDR2-BA2

DDR2-CAS

DDR2-CKE DDR2-CS DDR2-RAS

DDR2-A1

DDR2-A10 DDR2-A11 DDR2-A12

DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9

DDR2-CLK_P DDR2-CLK_N

DDR2-A14

DDR2-A13

DDR2-BA1

DDR2-CS

DDR2-WE

DDR2-A14

DDR2-CLK_P DDR2-CLK_N

DDR2-A0

DDR2-A10 DDR2-A11 DDR2-A12

DDR2-A2

DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9

DDR2-A14

DDR2-A13

DDR2-BA0

DDR2-D27

DDR2-D26

DDR2-BA2

DDR2-A13

DDR2-D29 DDR2-D30 DDR2-D31

DDR2-DQS3_P DDR2-DQS3_N

DDR2-ODT

DDR2-WE

DDR2-DQS2_N

DDR2-ODT

DDR2-RAS

DDR2-WE

DDR2-A1

DDR2-A3

DDR2-BA1

DDR2-D24 DDR2-D25

DDR2-D28DDR2-D21 DDR2-D22 DDR2-D23

DDR2-DQS2_P

DDR2-D16 DDR2-D17 DDR2-D18 DDR2-D19 DDR2-D20

DDR2-D11

DDR2-D10

DDR2-BA2

DDR2-A0 DDR2-A1

DDR2-A10 DDR2-A11 DDR2-A12

DDR2-A2 DDR2-A3 DDR2-A4 DDR2-A5 DDR2-A6 DDR2-A7 DDR2-A8 DDR2-A9

DDR2-BA0 DDR2-BA1

DDR2-CAS

DDR2-CLK_P

DDR2-CKE

DDR2-CLK_N

DDR2-CS

DDR2-D13

DDR2-D9

DDR2-D15

DDR2-DQS1_P DDR2-DQS1_N

DDR2-DQS0_N

DDR2-A0

DDR2-A2

DDR2-BA0

DDR2-CAS

DDR2-CKE

DDR2-D8

DDR2-D14

DDR2-D12

DDR2-D4 DDR2-D5 DDR2-D6 DDR2-D7

DDR2-DQS0_P

DDR2-A0

DDR2-A2

DDR2-BA0

DDR2-CAS

DDR2-CKE

DDR2-D0 DDR2-D1 DDR2-D3 DDR2-D2

HOOK1

1X22

HOOK1

1X21

HOOK1

1X20

HOOK1

1X24

HOOK1

1X23

Circuit Diagrams and PWB Layouts

EN 100Q552.4E LA 10.

2012-Jun-29

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div. table

PHILIPS 26PFL4007H/12, 26PFL4007K/12, 26PFL4007T/12, 32PFL4007H/12, 32PFL4007H/60 Service manual & schematics

Specifications and Main Features

Frequently Asked Questions

User Manual

Contents Page

1. Revision List

2. Technical Specs, Diversity, and Connections

2.1 Technical Specifications

Table 2-1 Described Model Numbers and Diversity

2.2 Directions for Use

2.3 Connections

2.3.1 Rear Connections

1 - RJ45: Ethernet

Figure 2-2 Ethernet connector

2 - Cinch: Audio - In (VGA/DVI)

Figure 2-1 Connection overview

3 - Cinch: Video YPbPr - In, Audio - In

4 - Service Connector (UART)

2.3.2 Rear Connections - Bottom

5 - VGA: Video RGB - In

Figure 2-3 VGA Connector

6 - SCART: Video RGB - In, CVBS - In, Audio - In

Figure 2-4 SCART connector

8 - Aerial - In

9 - USB 1: USB2.0

Figure 2-6 USB (type A)

2.3.3 Side Connections

10 - Common Interface

11 - Head phone (Output)

12 - Optical: S/PDIF - Out

13 - USB 2, 3: USB2.0

Figure 2-7 USB (type A)

14 - HDMI SIDE: Digital Video, Digital Audio - In

7 - HDMI: Digital Video - In, Digital Audio with ARC - In/Out (optional)

Figure 2-5 HDMI (type A) connector

2.4 Chassis Overview

Figure 2-8 HDMI (type A) connector

3. Precautions, Notes, and Abbreviation List

3.2 Warnings

3.3 Notes

3.1 Safety Instructions

3.3.1 General

3.3.2 Schematic Notes

3.3.3 Spare Parts

3.3.4 BGA (Ball Grid Array) ICs

Introduction

BGA Temperature Profiles

3.3.5 Lead-free Soldering

3.3.6 Alternative BOM identification

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

3.3.8 Practical Service Precautions

3.4 Abbreviation List

4. Mechanical Instructions

4.1 Cable Dressing 4000 Styling (xxPFL4xx7x/xx series)

Figure 4-1 Cable dressing 32PFL4xx7x/xx

Figure 4-2 Cable dressing 37PFL4xx7x/xx

Figure 4-3 Cable dressing 42PFL4xx7x/xx

Figure 4-4 Cable dressing 47PFL4xx7x/xx

4.2 Cab le Dressing 5000 styling (xxPFL5xx7x/xx series)

Figure 4-5 Cable dressing 32PFL5xx7x/xx

Figure 4-6 Cable dressing 40PFL5xx7x/xx

Figure 4-7 Cable dressing 46PFL5xx7x/xx

4.3 Service Positions

4.4 Assy/Panel Removal

4.4.1 Rear Cover

Figure 4-8 Cable dressing 55PFL5xx7x/xx

Figure 4-9 Rear cover removal

4.4.2 Small Signal Board (SSB)

Figure 4-12 LVDS cable - damaged notch area [3]

Figure 4-10 LVDS connector - correct handling

Figure 4-11 Unlocking LVDS connector

Figure 4-13 SSB LVDS - catch locking

4.4.3 IR/LED panel

4.4.4 Keyboard Control Panel

4.4.5 LCD Panel

4.5 Set Re-assembly

Figure 4-14 LCD panel removal

5. Service Modes, Error Codes, and Fault Finding

5.2 Service Modes