PHILIPS 19PFL5522D/05, 19PFL5522D/12, 19PFL5602D/05, 19PFL5602D/12, 20HF5335D/05 Service manual & schematics

Colour Television Chassis

ME7

LC7.2E

LA

ME7

G_16860_000.eps

200207

Contents Page Contents Page

1. Technical Specifications, Connections, and Chassis
Overview 2

2. Safety Instructions, Warnings, and Notes 6

3. Directions for Use 7

4. Mechanical Instructions 8

5. Service Modes, Error Codes, and Fault Finding 16

6. Block Diagrams, Test Point Overviews, and

Waveforms

Wiring Diagram 26” & 32” 29
Wiring Diagram 37” & 42” 30
Wiring Diagram 42” 1080p 31
Block Diagram Supply 32
Block Diagram Video 33
Block Diagram Audio 34
Block Diagram Control & Clock Signals 35
Test Point Overview SSB (Bottom Side) 36
I2C IC’s Overview 37
Supply Lines Overview 38

7. Circuit Diagrams and PWB Layouts Diagram PWB
SSB: DC/DC (B02) 39 55-64
SSB: Tuner & Demodulator (B03A) 40 55-64
SSB: DVB - Demodulator (B03B) 41 55-64
SSB: DVB - Common Interface (B03C) 42 55-64
SSB: DVB - Mojo (B03D) 43 55-64
SSB: DVB - Mojo Memory (B03E) 44 55-64
SSB: DVB - Mojo Analog Back End (B03F) 45 55-64
SSB: Micro Processor (B04A) 46 55-64
SSB: Video Processor (B04B) 47 55-64
SSB: PNX2015: Audio Processor (B04C) 48 55-64
SSB: YPBPR & Rear IO (B06A) 49 55-64
SSB: I/O Scart 1 & 2 (B06B) 50 55-64
SSB: HDMI (B06C) 51 55-64
SSB: Headphone Amp & Muting (B06D) 52 55-64
SSB: Audio (B07) 53 55-64

©

Copyright 2007 Philips Consumer Electronics B.V. Eindhoven, The Netherlands.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic,
mechanical, photocopying, or otherwise without the prior permission of Philips.

SSB: SRP List 54 55-64
Side A/V Panel (D) 65 66
Keyboard Control Panel (E) 67 68
1080P Panel: On Chip uController (F1) 69 76
1080P Panel: Flash & NVM (F2) 70 76
1080P Panel: LVDS In (F3) 71 76
1080P Panel: LVDS Out (F4) 72 76
1080P Panel: Supply In (F5) 73 76
1080P Panel: DDR SDRAM (F6) 74 76
1080P Panel: DC Power Supply (F7) 75 76
Front IR / LED Panel (J) 77 78

8. Alignments 79

9. Circuit Descriptions, Abbreviation List, and IC Data
Sheets 84
Abbreviation List 91
IC Data Sheets 93

10. Spare Parts List 101

11. Revision List 108

Published by WS 0763 BG CD Customer Service Printed in the Netherlands Subject to modification EN 3122 785 16861

EN 2 LC7.2E LA1.

Technical Specifications, Connections, and Chassis Overview

1. Technical Specifications, Connections, and Chassis Overview

Index of this chapter:

1.1 Technical Specifications

1.2 Connection Overview

1.3 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

1.1 Technical Specifications

1.1.1 Vision

Display type : LCD
Screen size : 26” (66 cm), 16:9

: 32” (82 cm), 16:9
: 37” (94 cm), 16:9
: 42” (107 cm), 16:9

Resolution (HxV pixels) : 1366x768

Dyn. contrast ratio : 3500:1 (26”)

2

Min. light output (cd/m
Typ. response time (ms) : 8 (26”, 32”)

Viewing angle (HxV degrees) : 140x120 (26”)

Tuning system : PLL
Presets/channels : 100 presets
Tuner bands : VHF, UHF, S, H
TV Colour systems : PAL B/G, D/K, I

Video playback : NTSC

Supported computer formats : 640x480

Supported video formats : 640x480i - 1fH

) : 500

: 1920x1080

: 4000:1 (32”)
: 5000:1 (37”)
: 5000:1 (42”)

: 6 (37”)
: 5 (42”)

: 178x178 (> 26”)

: SECAM B/G, D/K, L/L’
: DVB-T COFDM

: PAL
: SECAM

: 800x600
: 1024x768

: 720x576i - 1fH
: 640x480p - 2fH
: 720x576p - 2fH
: 1920x1080i - 2fH
: 1280x720p - 3fH
: 1920x1080p

(42PFL7662)

(42PFL7662)

1.1.3 Miscellaneous

Power supply:

- Mains voltage (V

- Mains frequency (Hz) : 50 / 60

Ambient conditions:

- Temperature range (°C) : +5 to +40

- Maximum humidity : 90% R.H.

Power consumption (values are indicative)

- Normal operation (W) : ≈ 120 (26”)

- Stand-by (W) : < 1

Dimensions (WxHxD cm) : 68.2x47.2x11.4 (26”)

Weight (kg) : 12 (26”)

) : 220 - 240

AC

: ≈ 140 (32”)
: ≈ 175 (37”)
: ≈ 240 (42”)

: 80.5x54.6x11.5 (32”)
: 93.5x62.6x11.6 (37”)
: 104.6x68.6x11.6 (42”)

: 15.5 (32”)
: 24 (37”)
: 25 (42”)

1.1.2 Sound

Sound systems : 2CS B/G, D/K

Maximum power (W

) : 2 x 10

RMS

: NICAM B/G, D/K, I, L

Technical Specifications, Connections, and Chassis Overview

1.2 Connection Overview

EN 3LC7.2E LA 1.

G_16860_046.eps

310107

Note: The following connector colour abbreviations are used
(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=
Grey, Rd= Red, Wh= White, and Ye= Yellow.

1.2.1 Side Connections

EXT3: Head phone - Out

Bk -Head phone 32 - 600 ohm / 10 mW rt

EXT3: Cinch: Video CVBS - In, Audio - In

Rd - Audio R 0.5 V
Wh -Audio L 0.5 V
Ye -Video CVBS 1 V

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

/ 75 ohm jq

PP

EXT3: S-Video (Hosiden): Video Y/C - In

1 -Ground Y Gnd H
2 -Ground C Gnd H
3 -Video Y 1 V
4 -Video C 0.3 V

/ 75 ohm j

PP

P / 75 ohm j

PP

1.2.2 Rear Connections

EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out

21

20

E_06532_001.eps

2

1

050404

Figure 1-2 SCART connector

1 -Audio R 0.5 V
2 -Audio R 0.5 V
3 -Audio L 0.5 V

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 1 kohm k

RMS

4 -Ground Audio Gnd H
5 -Ground Blue Gnd H
6 -Audio L 0.5 V
7 -Video Blue 0.7 V

/ 10 kohm j

RMS

/ 75 ohm j

PP

Figure 1-1 Side and rear I/O connections

8 -Function Select 0 - 2 V: INT

9 - Ground Green Gnd H
10 - Easylink P50 0 - 5 V / 4.7 kohm jk
11 - Video Green 0.7 V
12 - n.c.
13 - Ground Red Gnd H
14 - Ground P50 Gnd H
15 - Video Red 0.7 V
16 - Status/FBL 0 - 0.4 V: INT

17 - Ground Video Gnd H
18 - Ground FBL Gnd H
19 - Video CVBS 1 V
20 - Video CVBS 1 V
21 - Shield Gnd H

EXT2: Video YC - In, CVBS - In/Out, Audio - In/Out

1 - Audio R 0.5 V
2 - Audio R 0.5 V
3 - Audio L 0.5 V
4 - Ground Audio Gnd H
5-n.c.
6 - Audio L 0.5 V
7 - C-out 0.7 V
8 - Function Select 0 - 2 V: INT

9-n.c.
10 - Easylink P50 0 - 5 V / 4.7 kohm jk
11 - n.c.
12 - n.c.
13 - n.c.
14 - Ground P50 Gnd H
15 - C 0.7 V
16 - Status/FBL 0 - 0.4 V: INT

17 - Ground Video Gnd H
18 - Ground FBL Gnd H
19 - Video CVBS 1 V
20 - Video CVBS/Y 1 V
21 - Shield Gnd H

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j

/ 75 ohm j

PP

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j

/ 75 ohm k

PP

/ 75 ohm j

PP

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 75 ohm k

PP

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j

/ 75 ohm k

PP

/ 75 ohm j

PP

EN 4 LC7.2E LA1.

Technical Specifications, Connections, and Chassis Overview

Common Interface

68p-See diagram B03C jk

Service Connector (UART)

1 - UART_TX Transmit k
2 - Ground Gnd H
3 - UART_RX Receive j

Aerial - In

- -IEC-type (EU) Coax, 75 ohm D

Service Connector (ComPair)

1 - SDA-S I
2-SCL-S I

2

C Data (0 - 5 V) jk

2

C Clock (0 - 5 V) j

3 - Ground Gnd H

HDMI 1 & 2: Digital Video, Digital Audio - In

19

18 2

1

E_06532_017.eps

250505

Figure 1-3 HDMI (type A) connector

1 - D2+ Data channel j
2-Shield Gnd H

1.3 Chassis Overview

3 - D2- Data channel j
4 - D1+ Data channel j
5 - Shield Gnd H
6 - D1- Data channel j
7 - D0+ Data channel j
8 - Shield Gnd H
9 - D0- Data channel j
10 - CLK+ Data channel j
11 - Shield Gnd H
12 - CLK- Data channel j
13 - n.c.
14 - n.c.
15 - DDC_SCL DDC clock j
16 - DDC_SDA DDC data jk
17 - Ground Gnd H
18 - +5V j
19 - HPD Hot Plug Detect j
20 - Ground Gnd H

EXT4: Cinch: Video YPbPr - In, Audio - In

Gn - Video Y 1 V
Bu -Video Pb 0.7 V
Rd - Video Pr 0.7 V
Wh -Audio L 0.5 V
Rd - Audio R 0.5 V

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

POWER SUPPLY UNIT

SMALL SIGNAL

B

BOARD

Figure 1-4 PWB/CBA locations (26” models and 32” models)

SIDE I/O PANEL

CONTROL BOARD

LED PANEL

G_16860_047.eps

D

E

J

310107

Technical Specifications, Connections, and Chassis Overview

EN 5LC7.2E LA 1.

POWER SUPPLY UNIT

SMALL SIGNAL

B

BOARD

1080p PANEL

F

Figure 1-5 PWB/CBA locations (37” models and 42” models without 1080p module)

SIDE I/O PANEL

CONTROL PANEL

LED PANEL

H_16940_008.eps

SIDE I/O PANEL

D

E

J

050307

D

POWER SUPPLY UNIT

SMALL SIGNAL

B

BOARD

Figure 1-6 PWB/CBA locations (42” models with 1080p module)

CONTROL PANEL

LED PANEL

G_16860_092.eps

E

J

150307

EN 6 LC7.2E LA2.

Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes

Index of this chapter:

2.1 Safety Instructions

2.2 Warnings

2.3 Notes

2.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation
transformer (> 800 VA).

• Replace safety components, indicated by the symbol h,
only by components identical to the original ones. Any
other component substitution (other than original type) may
increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be
returned in its original condition. Pay in particular attention to
the following points:

• Route the wire trees correctly and fix them with the
mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for
external damage.

• Check the strain relief of the Mains/AC Power cord for
proper function.

• Check the electrical DC resistance between the Mains/AC
Power plug and the secondary side (only for sets that have
a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the "on" position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the
tuner or the aerial connection on the set. The reading
should be between 4.5 Mohm and 12 Mohm.

4. Switch "off" the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any
inner parts by the customer.

Service Default Mode (see chapter 5) with a colour bar
signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated
otherwise) and picture carrier at 475.25 MHz for PAL, or

61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages
with (D) and without (E) aerial signal. Measure the
voltages in the power supply section both in normal
operation (G) and in stand-by (F). These values are
indicated by means of the appropriate symbols.

• Manufactured under license from Dolby Laboratories.
“Dolby”, “Pro Logic” and the “double-D symbol”, are
trademarks of Dolby Laboratories.

2.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is
often used to indicate the decimal point location (e.g. 2K2
indicates 2.2 kohm).

• Resistor values with no multiplier may be indicated with
either an "E" or an "R" (e.g. 220E or 220R indicates 220
ohm).

• All capacitor values are given in micro-farads (μ= x10
nano-farads (n= x10

• Capacitor values may also use the value multiplier as the
decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An "asterisk" (*) indicates component usage varies. Refer
to the diversity tables for the correct values.

• The correct component values are listed in the Spare Parts
List. Therefore, always check this list when there is any
doubt.

2.3.3 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this
URL: www.atyourservice.ce.philips.com (needs subscription,
not available for all regions). After login, select “Magazine”,
then go to “Repair downloads”. Here you will find Information
on how to deal with BGA-ICs.

-9

), or pico-farads (p= x10

-12

-6

),

).

2.2 Warnings

• All ICs and many other semiconductors are susceptible to
electrostatic discharges (ESD w). Careless handling
during repair can reduce life drastically. Make sure that,
during repair, you are connected with the same potential as
the mass of the set by a wristband with resistance. Keep
components and tools also at this same potential. Available
ESD protection equipment:
– Complete kit ESD3 (small tablemat, wristband,

connection box, extension cable and earth cable) 4822
310 10671.

– Wristband tester 4822 344 13999.

• Be careful during measurements in the high voltage
section.

• Never replace modules or other components while the unit
is switched "on".

• When you align the set, use plastic rather than metal tools.
This will prevent any short circuits and the danger of a
circuit becoming unstable.

2.3 Notes

2.3.1 General

• Measure the voltages and waveforms with regard to the
chassis (= tuner) ground (H), or hot ground (I), depending
on the tested area of circuitry. The voltages and waveforms
shown in the diagrams are indicative. Measure them in the

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile,
which is coupled to the 12NC. For an overview of these profiles,
visit the website www.atyourservice.ce.philips.com (needs
subscription, but is not available for all regions)
You will find this and more technical information within the
"Magazine", chapter "Repair downloads".
For additional questions please contact your local repair help
desk.

2.3.4 Lead-free Soldering

Due to lead-free technology some rules have to be respected
by the workshop during a repair:

• Use only lead-free soldering tin Philips SAC305 with order
code 0622 149 00106. If lead-free solder paste is required,
please contact the manufacturer of your soldering
equipment. In general, use of solder paste within
workshops should be avoided because paste is not easy to
store and to handle.

• Use only adequate solder tools applicable for lead-free
soldering tin. The solder tool must be able:
– To reach a solder-tip temperature of at least 400°C.
– To stabilize the adjusted temperature at the solder-tip.
– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.

To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering
tin/parts is possible but PHILIPS recommends strongly to
avoid mixed regimes. If this cannot be avoided, carefully
clear the solder-joint from old tin and re-solder with new tin.

2.3.5 Alternative BOM identification

Directions for Use

MODEL :

PROD.NO:

32PF9968/10

AG 1A0617 000001

EN 7LC7.2E LA 3.

MADE IN BELGIUM

220-240V 50/60Hz

VHF+S+H+UHF

S

~

128W

BJ3.0E LA

E_06532_024.eps

130606

The third digit in the serial number (example:
AG2B0335000001) indicates the number of the alternative
B.O.M. (Bill Of Materials) that has been used for producing the
specific TV set. In general, it is possible that the same TV
model on the market is produced with e.g. two different types
of displays, coming from two different suppliers. This will then
result in sets which have the same CTN (Commercial Type
Number; e.g. 28PW9515/12) but which have a different B.O.M.
number.
By looking at the third digit of the serial number, one can
identify which B.O.M. is used for the TV set he is working with.
If the third digit of the serial number contains the number “1”
(example: AG1B033500001), then the TV set has been
manufactured according to B.O.M. number 1. If the third digit is
a “2” (example: AG2B0335000001), then the set has been
produced according to B.O.M. no. 2. This is important for

ordering the correct spare parts!

For the third digit, the numbers 1...9 and the characters A...Z
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be
indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit
serial number. Digits 1 and 2 refer to the production centre (e.g.
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers
to the Service version change code, digits 5 and 6 refer to the
production year, and digits 7 and 8 refer to production week (in
example below it is 2006 week 17). The 6 last digits contain the
serial number.

Figure 2-1 Serial number (example)

2.3.6 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide
if the board has to be exchanged or if it should be repaired on
component level.
If your repair procedure says the board should be exchanged
completely, do not solder on the defective board. Otherwise, it
cannot be returned to the O.E.M. supplier for back charging!

2.3.7 NVM content

If the processor NVM IC is replaced or initialised, the Model
Number, Serial Number, and SSB Code number must be re­written to the NVM. ComPair will foresee in a possibility to do
this.

2.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible
dangerous impact, others of quite high potential are of
limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected
reactions that are best avoided. Before reaching into a
powered TV set, it is best to test the high voltage insulation.
It is easy to do, and is a good service precaution.

3. Directions for Use

You can download this information from the following websites:
http://www.philips.com/support
http://www.p4c.philips.com

EN 8 LC7.2E LA4.

Mechanical Instructions

4. Mechanical Instructions

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

4.1 Cable Dressing

LC07: 26” (BASIC SET)

Notes:

• Figures below can deviate slightly from the actual situation,
due to the different set executions.

• Follow the disassemble instructions in described order.

Figure 4-1 Cable dressing (26” models)

G_16860_084.eps

150307

Mechanical Instructions

EN 9LC7.2E LA 4.

Figure 4-2 Cable dressing (32-inch models)

G_16860_064.eps

310107

Figure 4-3 Cable dressing (37” models)

G_16860_085.eps

150307

EN 10 LC7.2E LA4.

Mechanical Instructions

Figure 4-4 Cable dressing (42” models without 1080p module)

H_16940_009.eps

050307

Figure 4-5 Cable dressing (42” models with 1080p module)

G_16860_091.eps

150307

Mechanical Instructions

EN 11LC7.2E LA 4.

4.2 Service Positions

For easy servicing of this set, there are a few possibilities
created:

• The buffers from the packaging.

• Foam bars (created for Service).

• Aluminium service stands (created for Service).

Note: the aluminium service stands can only be used when the
set is equipped with so-called “mushrooms”. Otherwise use the
original stand that comes with the set.

4.2.1 Foam Bars

1

Required for sets

1

42”

4.3 Assy/Panel Removal

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before you remove

the rear cover.

1. Place the TV set upside down on a table top, using the
foam bars (see part "Service Position").

2. Remove rear cover screws and the stand (if mounted).

3. Remove rear cover.

4.3.2 Keyboard Control Panel

1. Refer to next figure (is taken from the 32” model, but the
method is comparable for the other screen sizes).

2. Remove the T10 parker screws [1].

3. Unplug connector [2].

4. Remove the unit.

5. Release clips [3] and remove the board.

When defective, replace the whole unit.

1

E_06532_018.eps

171106

Figure 4-6 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can
be used for all types and sizes of Flat TVs. See figure “Foam
bars” for details.
Sets with a display of 42” and larger, require four foam bars [1].
Ensure that the foam bars are always supporting the cabinet
and never only the display.
Caution: Failure to follow these guidelines can seriously
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen.

4.2.2 Aluminium Stands

E_06532_019.eps

170504

Figure 4-7 Aluminium stands (drawing of MkI)

The new MkII aluminium stands (not on drawing) with order
code 3122 785 90690, can also be used to do measurements,
alignments, and duration tests. The stands can be
(dis)mounted quick and easy by means of sliding them in/out
the "mushrooms". The new stands are backwards compatible
with the earlier models.
Important: For (older) FTV sets without these "mushrooms", it
is obligatory to use the provided screws, otherwise it is possible
to damage the monitor inside!

3

2

1

Figure 4-8 Keyboard control panel

4.3.3 Side I/O Panel

1. Refer to next figure (is taken from the 32” model, but the
method is comparable for the other screen sizes).

2. Unplug connector [a].

3. Remove screws [b] and remove the complete module. One
of the screws is T10 tapping, the other one is T10 parker.

4. Remove T10 parker screw [c]. Refer to next figure.

5. Push catch [d] (located at the underside of the bracket) and
slide the unit to the right from its bracket [e]. See fig. “Side
I/O panel 2”.

6. To remove the PWB from its bracket, you have to lift the
catch [f] located on top of the head phone connector. At the
same time, slide the PWB out of its bracket [g]. See fig.
“Side I/O panel 3”.

When defective, replace the whole unit.

G_16850_007.eps

090207

EN 12 LC7.2E LA4.

s
7

Mechanical Instructions

b (1x)

a

Figure 4-9 Side I/O module

c

b (1x)

G_16860_066.ep

01020

g

2

f

Figure 4-12 Side I/O panel [3/3]

4.3.4 IR/LED Panel

1. Refer to next figure (is taken from the 32” model, but the
method is comparable for the other screen sizes).

2. Unplug connector(s) [1].

3. Release clip [2] and remove the board.

When defective, replace the whole unit.

G_16860_077.eps

010207

Figure 4-10 Side I/O panel [1/3] top side

2d

2e

G_16860_075.eps

010207

1

2

Figure 4-13 IR/LED panel

G_16850_009.eps

110107

G_16860_076.eps

Figure 4-11 Side I/O panel [2/3] bottom side

010207

Mechanical Instructions

EN 13LC7.2E LA 4.

4.3.5 Speakers

This depends on the model/screen size: for the 26” and 32”
models, the bare speakers are accessible, while for the larger
models they are encased, and therefore must be replaced as
assembly when defective.

Full- or Mid-range Speakers (for 26” and 32” models)

1. Refer to next figure.

2. Unplug connectors [1].

3. Remove screws [2].

2 1 2

G_16850_010.eps

Figure 4-14 Mid-range speakers

Tweeters (only for 32” models)

1. Refer to next figure.

2. Unplug connectors [1].

3. Remove screws [2].

110107

4.3.6 1080p Panel

1. Refer to next figure(s).

2. Unplug cables [a]. Be careful with the LVDS connectors as
they are very fragile.

3. Remove the fixation screws [b].

4. Take the board out (it hinges at the lower side).

5. Remove the screws [c] that fixate the top and bottom
shieldings, and remove the shieldings.

Note: Pay special attention not to damage the EMC foams.
Ensure that EMC foams are mounted correctly, especially
notice the large EMC foam “block” [d] at the bottom shielding.

b

c

a

c

c

b

c

2 1

Figure 4-15 Tweeters

Speaker box (for 37” and 42” models)

1. Refer to next figure.

2. Unplug connectors [1].

3. Remove screws [2].
When defective, replace the whole unit.

Figure 4-16 Tweeters

G_16850_011.eps

110107

1

H_16851_011.eps

G_16860_089.eps

150307

Figure 4-17 1080p panel

d

22

G_16860_088.eps

080307

150307

Figure 4-18 Bottom shielding 1080p panel

EN 14 LC7.2E LA4.

s

7

4.3.7 Main Supply Panel

1. Refer to next figure (is taken from the 32” model, but the
method is comparable for the other screen sizes).

2. Unplug cables [a].

3. Remove the fixation screws [b].

4. Take the board out (it hinges at the left side).

Mechanical Instructions

b (3x)

a

Figure 4-19 Main supply panel (32” model)

4.3.8 Small Signal Board (SSB)

1. Refer to next figure (is taken from the 32” model, but the
method is comparable for the other screen sizes).

2. Disconnect all cables [a] on the SSB.

3. Remove the T10 tapping screws [b] that hold the SSB. See
Figure “SSB removal”.

4. Remove the screws that hold the CINCH and HDMI
connectors at the connector panel.

5. Lift the SSB from the set.

a

a

G_16860_065.ep

01020

a a

Figure 4-20 SSB removal

b (3x)

b (2x)b (3x)

b (2x)

G_16860_074.eps

010207

Mechanical Instructions

EN 15LC7.2E LA 4.

4.3.9 LCD Panel

The disassembly method for the LCD panel differs per model
or screen size. The following description applies to the 32”
model, but for the other screen sizes, the method is similar.

1. Refer to next figure(s).

2. Unplug the connectors on the Main Supply Panel [a] and
the LED & IR board [c].

3. Unplug the connectors [d] from the loudspeakers.

f (1x)

g (2x)

a

4. Do NOT forget to unplug the LVDS connector [e] from the
SSB. Important: Be careful, as this is a fragile connector!

5. Remove T10 parker screw [b] that holds the Side I/O
module bracket.

6. Remove T10 parker screws [f] of the central sub-frame.

7. Remove LCD panel fixation screws [g] and lift the complete
central sub-frame from the set (incl. the PSU, SSB, and
Side I/O boards and wiring).

8. Lift the LCD panel [7] from the front cabinet.

e

g (2x)

f (3x)

b

d

f (2x)

d

c (1x)

G_16860_067.eps

310107

Figure 4-21 LCD panel 32” [1/2]

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse
order.

7

Notes:

• While re-assembling, make sure that all cables are placed
and connected in their original position. See figure "Cable
dressing".

• Pay special attention not to damage the EMC foams.
Ensure that EMC foams are mounted correctly (one is
located above the LVDS connector on the display, between
the LCD display and the metal sub-frame).

Figure 4-22 LCD panel 32” [2/2]

G_16850_015.eps

110107

EN 16 LC7.2E LA5.

Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Service Tools

5.4 Error Codes

5.5 The Blinking LED Procedure

5.6 Software Upgrading

5.7 Fault Finding and Repair Tips

5.1 Test Points

In the chassis schematics and layout overviews, the test points
(Fxxx) are mentioned. In the schematics, test points are
indicated with a rectangular box around “Fxxx” or “Ixxx”, in the
layout overviews with a “half-moon” sign.
As most signals are digital, it will be difficult to measure
waveforms with a standard oscilloscope. Several key ICs are
capable of generating test patterns, which can be controlled via
ComPair. In this way it is possible to determine which part is
defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

The Service Mode feature is split into four parts:

• Service Default Mode (SDM).

• Service Alignment Mode (SAM).

• Customer Service Mode (CSM) and Digital Customer
Service Mode (DCSM).

• Computer Aided Repair Mode (ComPair).

SDM and SAM offer features, which can be used by the Service
engineer to repair/align a TV set. Some features are:

• A pre-defined situation to ensure measurements can be
made under uniform conditions (SDM).

• Activates the blinking LED procedure for error identification
when no picture is available (SDM).

• The possibility to overrule software protections when SDM
was entered via the Service pins.

• Make alignments (e.g. white tone), (de)select options,
enter options codes, reset the error buffer (SAM).

• Display information (“SDM” or “SAM” indication in upper
right corner of screen, error buffer, software version,
operating hours, options and option codes, sub menus).

The (D)CSM is a Service Mode that can be enabled by the
consumer. The CSM displays diagnosis information, which the
customer can forward to the dealer or call centre. In CSM
mode, “CSM”, is displayed in the top right corner of the screen.
The information provided in CSM and the purpose of CSM is to:

• Increase the home repair hit rate.

• Decrease the number of nuisance calls.

• Solved customers' problem without home visit.

ComPair Mode is used for communication between a computer
and a TV on I2C /UART level and can be used by a Service
engineer to quickly diagnose the TV set by reading out error
codes, read and write in NVMs, communicate with ICs and the
uP (PWM, registers, etc.), and by making use of a fault finding
database. It will also be possible to up and download the
software of the TV set via I2C with help of ComPair. To do this,
ComPair has to be connected to the TV set via the ComPair
connector, which will be accessible through the rear of the set
(without removing the rear cover).

5.2.1 General

Some items are applicable to all Service Modes or are general.
These are listed below.

Life Timer

During the life time cycle of the TV set, a timer is kept. It counts
the normal operation hours (not the Stand-by hours). The
actual value of the timer is displayed in SDM and CSM in a
decimal value. Every two soft-resets increase the hour by +1.

Software Identification, Version, and Cluster

The software ID, version, and cluster will be shown in the main
menu display of SDM, SAM, and CSM.
The screen will show: “AAAABCD X.YY”, where:

• AAAA is the chassis name: LC71 for analogue range (non­DVB), LC72 for digital range (DVB).

• B is the region indication: E= Europe, A= AP/China, U=
NAFTA, L= LATAM.

• C is the display indication: L= LCD, P= Plasma.

• D is the language/feature indication: 1= standard, H=
1080p full HD.

• X is the main version number: this is updated with a major
change of specification (incompatible with the previous
software version). Numbering will go from 1 - 9 and A - Z.
– If the main version number changes, the new version

number is written in the NVM.

– If the main version number changes, the default

settings are loaded.

• YY is the sub version number: this is updated with a minor
change (backwards compatible with the previous versions)
Numbering will go from 00 - 99.
– If the sub version number changes, the new version

number is written in the NVM.

– If the NVM is fresh, the software identification, version,

and cluster will be written to NVM.

Display Option Code Selection

When after an SSB or display exchange, the display option
code is not set properly, it will result in a TV with “no display”.
Therefore, it is required

repair.

such a

to set this display option code after

To do so, press the following key sequence on a standard RC
transmitter: “062598” directly followed by MENU and “xxx”,
where “xxx” is a 3 digit decimal value of the panel type: see
column “Panel Code” in table “Option Codes OP1...OP7” (ch.

8), or see sticker on the side/bottom of the cabinet. When the

value is accepted and stored in NVM, the set will switch to
Stand-by, to indicate that the process has been completed.

Display Option

Code

39mm

040

PHILIPS

MODEL:

32PF9968/10

27mm

PROD.SERIAL NO:
AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps

Figure 5-1 Location of Display Option Code sticker

During this algorithm, the NVM-content must be filtered,
because several items in the NVM are TV-related and not SSB­related (e.g. Model and Prod. S/N). Therefore, “Model” and
“Prod. S/N” data is changed into “See Type Plate”.
In case a call centre or consumer reads “See Type Plate” in
CSM mode, he needs to look to the side/bottom sticker to
identify the set, for further actions.

290107

Service Modes, Error Codes, and Fault Finding

s
7

EN 17LC7.2E LA 5.

5.2.2 Service Default Mode (SDM)

Purpose

Set the TV in SDM mode in order to be able to:

• Create a pre-defined setting for measurements to be
made.

• Override software protections.

• Start the blinking LED procedure.

• Read the error buffer.

• Check the life timer.

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz) Default syst.

Europe (except France),

475.25 PAL B/G

AP-PAL/-Multi
France SECAM L
NAFTA, AP-NTSC 61.25 (channel 3) NTSC M
LATAM PAL M

• Set linear video and audio settings to 50%, but volume to
25%. Stored user settings are not affected.

• All service-unfriendly modes (if present) are disabled, since
they interfere with diagnosing/repairing a set. These
service unfriendly modes are:
– (Sleep) timer.
– Blue mute/Wall paper.
– Auto switch “off” (when there is no “ident” signal).
– Hotel or hospital mode.
– Child lock or parental lock (manual or via V-chip).
– Skipping, blanking of “Not favourite”, “Skipped” or

“Locked” presets/channels.

– Automatic storing of Personal Preset or Last Status

settings.

– Automatic user menu time-out (menu switches back/

OFF automatically.

– Auto Volume levelling (AVL).

How to Activate

To activate SDM, use one of the following methods:

• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the MENU button
(do not allow the display to time out between entries while
keying the sequence).

• Short one of the “Service” jumpers on the TV board during
cold start (see Figures “Service jumper”). Then press the
mains button (remove the short after start-up).
Caution: Activating SDM by shorting “Service” jumpers will
override the DC speaker protection (error 1), the General
I2C error (error 4), and the Trident video processor error
(error 5). When doing this, the service-technician must
know exactly what he is doing, as it could damage the
television set.

On Screen Menu

After activating SDM, the following screen is visible, with SDM
in the upper right corner of the screen to indicate that the
television is in Service Default Mode.

HHHHH A A A A B CD- X . Y Y
ERR XX XX XX XX XX
O P X X X X X X X X X X X X X X X X X X

SDM

G_16860_030.ep

26010

Figure 5-3 SDM menu

Menu explanation:

• HHHHH: Are the operating hours (in decimal).

• AAAABCD-X.YY: See paragraph “Service Modes” ->
“General” -> “Software Identification, Version, and Cluster”
for the SW name definition.

• SDM: The character “SDM” to indicate that the TV set is in
Service mode.

• ERR: Shows all errors detected since the last time the
buffer was erased. Five errors possible.

• OP: Used to read-out the option bytes. See “Options” in the
Alignments section for a detailed description. Seven codes
are possible.

How to Navigate

As this mode is read only, there is not much to navigate. To
switch to other modes, use one of the following methods:

• Command MENU from the user remote will enter the
normal user menu (brightness, contrast, colour, etc...) with
“SDM” OSD remaining, and pressing MENU key again will
return to the last status of SDM again.

• To prevent the OSD from interfering with measurements in
SDM, command “OSD” (“STATUS” for NAFTA and
LATAM) from the user remote will toggle the OSD “on/off”
with “SDM” OSD remaining always “on”.

• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the OSD/i+
button to

switch to SAM (do not allow the display to time out

between entries while keying the sequence).

How to Exit

Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or on the television set.
If you switch the television set “off” by removing the mains (i.e.,
unplugging the television), the television set will remain in SDM
when mains is re-applied, and the error buffer is not cleared.
The error buffer will only be cleared when the “clear” command
is used in the SAM menu.

SDMSDM

G_16860_027.eps

260107

Figure 5-2 Service jumper (SSB component side)

Note:

• If the TV is switched “off” by a power interrupt while in SDM,
the TV will show up in the last status of SDM menu as soon
as the power is supplied again. The error buffer will not be
cleared.

• In case the set is in Factory mode by accident (with “F”
displayed on screen), by pressing and hold “VOL-“ and
“CH-” together should leave Factory mode.

EN 18 LC7.2E LA5.

Service Modes, Error Codes, and Fault Finding

5.2.3 Service Alignment Mode (SAM)

Purpose

• To change option settings.

• To display / clear the error code buffer.

• To perform alignments.

Specifications

• Operation hours counter (maximum five digits displayed).

• Software version, error codes, and option settings display.

• Error buffer clearing.

• Option settings.

• Software alignments (Tuner, White Tone, and Audio).

• NVM Editor.

• ComPair Mode switching.

• Set the screen mode to full screen (all contents on screen
are viewable).

How to Activate

To activate SAM, use one of the following methods:

• Press the following key sequence on the remote control
transmitter: “062596" directly followed by the OSD/
STATUS/INFO/i+ button (it depends on region which
button is present on the RC). Do not allow the display to
time out between entries while keying the sequence.

• Or via ComPair.

After entering SAM, the following screen is visible, with SAM in
the upper right corner of the screen to indicate that the
television is in Service Alignment Mode.

LLLL L A AAABCD- X. YY
ERR XX XX XX XX XX
O P X X X X X X X X X X X X X X X X X X

C l e a r > Y e s
O p t i o n s >
T u n e r >
R G B A l i g n >
N V M E d i t o r >
C o m p a i r >
S W E V E N T S >

Figure 5-4 SAM menu

Menu explanation:

1. LLLLL. This represents the run timer. The run timer counts
normal operation hours, but does not count Stand-by
hours.

2. AAAABCD-X.YY. See paragraph “Service Modes” ->
“General” -> “Software Identification, Version, and Cluster”
for the SW name definition.

3. SAM. Indication of the Service Alignment Mode.

4. ERR (ERRor buffer). Shows all errors detected since the
last time the buffer was erased. Five errors possible.

5. OP (Option Bytes). Used to read-out the option bytes. See
“Options” in the Alignments section for a detailed
description. Seven codes are possible.

6. Clear. Erases the contents of the error buffer. Select the
CLEAR menu item and press the MENU RIGHT key. The
content of the error buffer is cleared.

7. Options. Used to set the option bits. See “Options” in the
“Alignments” chapter for a detailed description.

8. Tuner. Used to align the tuner. See “Tuner” in the
“Alignments” chapter for a detailed description.

9. RGB Align. Used to align the White Tone. See “White
Tone” in the “Alignments” chapter for a detailed
description.

10. NVM Editor. Can be used to change the NVM data in the
television set. See also paragraph “Fault Finding and
Repair Tips” further on.

11. ComPaIr. Can be used to switch the television to “In
Application Programming” mode (IAP), for software

SAM

G_16860_031.eps

260107

uploading via ComPair. Read paragraph “Service Tools” ­> “ComPair”. Caution: When this mode is selected without
ComPair connected, the TV will be blocked. Remove the
AC power to reset the TV.

12. SW Events. Only to be used by development to monitor
SW behaviour during stress test.

How to Navigate

• In the SAM menu, select menu items with the MENU UP/
DOWN keys on the remote control transmitter. The

cted item will be indicated. When not all menu items fit

sele
on the screen, use the MENU UP/DOWN keys to display
the next / previous menu items.

• With the MENU LEFT/RIGHT keys, it is possible to:
– Activate the selected menu item.
– Change the value of the selected menu item.
– Activate the selected sub menu.

• When you press the MENU button twice while in top level
SAM, the set will switch to the normal user menu (with the
SAM mode still active in the background). To return to the
SAM menu press the MENU button.

• Command “OSD/i+” key from the user remote will toggle
the OSD “on/off” with “SAM” OSD remaining always “on”.

• Press the following key sequence on the remote control
transmitter: “062596” directly followed by the MENU button
to switch to SDM (do not allow the display to time out
between entries while keying the sequence).

How to Store SAM Settings

To store the settings changed in SAM mode (except the
OPTIONS settings), leave the top level SAM menu by using the
POWER button on the remote control transmitter or the
television set.

How to Exit

Switch the set to STANDBY by pressing the mains button on
the remote control transmitter or the television set.

Note:

• When the TV is switched “off” by a power interrupt while in
SAM, the TV will show up in "normal operation mode" as
soon as the power is supplied again. The error buffer will
not be cleared.

• In case the set is in Factory mode by accident (with “F”
displayed on screen), by pressing and hold “VOL-“ and
“CH-” together should leave Factory mode.

Service Modes, Error Codes, and Fault Finding

s

7

EN 19LC7.2E LA 5.

5.2.4 Customer Service Mode (CSM)

Purpose

The Customer Service Mode shows error codes and
information on the TV’s operation settings. A call centre can
instruct the customer (by telephone) to enter CSM in order to
identify the status of the set. This helps them to diagnose
problems and failures in the TV before making a service call.
The CSM is a read-only mode; therefore, modifications are not
possible in this mode.

Specifications

• Ignore “Service unfriendly modes”.

• Line number for every line (to make CSM language
independent).

• Set the screen mode to full screen (all contents on screen
are viewable).

• After leaving the Customer Service Mode, the original
settings are restored.

• Possibility to use “CH+” or “CH-” for channel surfing, or
enter the specific channel number on the RC.

How to Activate

To activate CSM, press the following key sequence on the
remote control transmitter: “123654” (do not allow the display
to time out between entries while keying the sequence).

Upon entering the Customer Service Mode, the following
screen will appear:

1 M O D E L : 3 2 P F L 5 5 2 2 D / 1
2 P R O D S / N : AG1A0712123456
3 S W I D : L C 7 1 E L 1 - 1 . x x
4 O P : X X X X X X X X X X X X X X X X X X X X X
5 C O D E S : X X X X X X X X X X
6 S S B : 3 1 39 1 27 12341
7 N V M : X X X X X X X X
8 F l a s h D a t a : X X . X X . X X . X X
9 L I F E T I M E R : L L L L L
1 0 T U N E R : W E A K / G O O D / S T R O N G
1 1 S Y S T E M : P A L / N T S C / S E C A M
1 2 S O U N D : M O N O / S T E R E O / N I C A M

1 3 H D A U : Y E S / N O
1 4 F O R M A T : X X X X X X X X

0

CS M

G_16860_032.ep

21020

Menu Explanation

1. MODEL. Type number, e.g. 42PFL7662/12. (*)

2. PROD S/N. Product serial no., e.g. SV1A0701000008. (*)

3. SW ID. Software cluster and version is displayed.

4. OP. Option code information.

5. CODES. Error buffer contents.

6. SSB. Indication of the SSB factory ID (= 12nc). (*)

7. NVM. The NVM software version no.

8. Flash Data. PQ (picture quality) and AQ (audio quality)
data version. This is a sub set of the main SW.

9. LIFE TIMER. Operating hours indication.

10. TUNER. Indicates the tuner signal condition: “Weak” when
signal falls below threshold value, “Medium” when signal is
at mid-range, and “Strong” when signal falls above
threshold value.

11. SYSTEM. Gives information about the video system of the
selected transmitter (PAL/SECAM/NTSC).

12. SOUND. Gives information about the audio system of the
selected transmitter (MONO/STEREO/NICAM).

13. HDAU. HDMI audio stream detection. “YES” means audio
stream detected. “NO” means no audio stream present.
Only displayed when HDMI source is selected.

14. FORMAT. Gives information about the video format of the
selected transmitter (480i/480p/720p/1080i).

15. HD SW ID. Software version of the 1080p full HD module
(when present).

16. Reserved.

17. Reserved.

18. Reserved.

(*) If an NVM IC is replaced or initialised, the Model Number,
Serial Number, and SSB Code Number must be re-written to
the NVM. ComPair will foresee in a possibility to do this.

How to Exit

To exit CSM, use one of the following methods:

• Press the MENU button twice, or POWER button on the
remote control transmitter.

• Press the POWER button on the television set.

Figure 5-5 CSM menu (example)

EN 20 LC7.2E LA5.

5.2.5 Digital Customer Service Mode (DCSM)

Purpose

The Digital Customer Service Mode shows error codes and
information on the IBO Zapper module (DVB reception part)
operation settings. The call centre can instruct the customer to
activate DCSM by telephone and read off the information
displayed. This helps the call centre to diagnose problems and
failures in the IBO Zapper module before making a service
call.The DCSM is a read-only mode; therefore, modifications
are not possible in this mode.

How to Activate

To activate the DCSM, put the television in its digital mode (via
the “A/D” button on the remote control).

1. Press the “Digital Menu” button on the remote control to
activate the digital user menu (called “Setup”).

2. Activate the “Information” sub menu (via the “down” and
“right” cursor buttons).

3. In the “Information” sub menu, press the following key
sequence on the remote control to activate the DCSM:
“GREEN RED YELLOW 9 7 5 9” (do not allow the display
to time out between entries while keying this sequence).
Then, the “Service menu” will appear (see figures below).

Alternative method to activate DCSM: press key sequence
“123654” on the remote control transmitter while in digital mode
(do not allow the display to time out between entries while
keying the sequence). Then, the “Service menu” will appear
(see figures below).

Menu explanation

Figure 5-6 DCSM menu - 1

Service Modes, Error Codes, and Fault Finding

Figure 5-8 DCSM menu - 3

1. Hardware version: This indicates the version of the IBO
Zapper module hardware.

2. Application SW: The application software version.

3. NOR Version: The NOR Flash image software version

4. Digital Frequency: The digital frequency that the set is
tuned to.

5. Bit Error Rate: The error rate measured before the error
correction algorithm circuitry. (this value gives an
impression of the received signal)

6. Tuner AGC: Tuner AGC value.

7. COFDM Lock: Indication if COFDM decoder is locked.

8. AFD Status: Status of the Active Picture Format
Descriptor.

9. Terrestrial Delivery System Parameters:
– Bandwidth: Bandwidth of the received signal.
– Constellation Pattern : Displays the signal

constellation.
– Alpha Value: Displays the Alpha Value.
– FEC Scheme: Displays the Forward Error Correcting

Scheme
– Guard Interval: Displays the value for the Guard

Interval.
– Transmission Mode: Displays the Transmission

Mode.

10. Audio Comp Type: Type of detected audio stream.

E_14970_040.eps

090904

11. MHEG Present:

12. CIM C

ard Present: Indicates if CIM card is present or not.

How to exit

Press the BLUE button on the Remote Control to exit DCSM.

Indicates if MHEG is present or not.

E_14970_042.eps

090904

Figure 5-7 DCSM menu - 2

E_14970_041.eps

100904

Service Modes, Error Codes, and Fault Finding

EN 21LC7.2E LA 5.

5.3 Service Tools

5.3.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips
Consumer Electronics products. and offers the following:

1. ComPair helps you to quickly get an understanding on how
to repair the chassis in a short and effective way.

2. ComPair allows very detailed diagnostics and is therefore
capable of accurately indicating problem areas. You do not
have to know anything about I2C or UART commands
yourself, because ComPair takes care of this.

3. ComPair speeds up the repair time since it can
automatically communicate with the chassis (when the uP
is working) and all repair information is directly available.

4. ComPair features TV software upgrade possibilities.

Specifications

ComPair consists of a Windows based fault finding program
and an interface box between PC and the (defective) product.
The (new) ComPair II interface box is connected to the PC via
an USB cable. For the TV chassis, the ComPair interface box
and the TV communicate via a bi-directional cable via the
service connector(s).
The ComPair fault finding program is able to determine the
problem of the defective television, by a combination of
automatic diagnostics and an interactive question/answer
procedure.

How to Connect

This is described in the chassis fault finding database in
ComPair.

TO TV

RS232 /UART

G_06532_036.eps

TO

UART SERVICE

CONNECTOR

260107

TO

ComPair II

RC in

Optional

Switch

Power ModeLink/

Activity

HDMI

2

I

C only

RC out

I2C SERVICE

CONNECTOR

Multi

function

PC

OR

2

I

C

ComPair II Developed by Philips Brugge

Optional power

5V DC

Figure 5-9 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as

shown in the picture above (with the ComPair interface in
between), as the ComPair interface acts as a level shifter. If
one connects the TV directly to the PC (via UART), ICs will be
blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• ComPair32 CD (update): 3122 785 60160.

• ComPair interface cable: 3122 785 90004.

• ComPair interface extension cable: 3139 131 03791.

• ComPair UART interface cable: 3122 785 90630.

Note: If you encounter any problems, contact your local
support desk

5.3.2 LVDS Tool

Introduction

This Service tool (also called “ComPair Assistant 1“) may help
you to identify, in case the TV does not show any picture,
whether the Small Signal Board (SSB) or the display of a Flat
TV is defective. Thus to determine if LVDS, RGB, and sync
signals are okay.

When operating, the tool will show a small (scaled) picture on
a VGA monitor. Due to a limited memory capacity, it is not
possible to increase the size when processing high-resolution
LVDS signals (> 1280x960). Below this resolution, or when a
DVI monitor is used, the displayed picture will be full size.

How to Connect

Connections are explained in the user manual, which is packed
with the tool. The LVDS cables included in the package cover
most chassis. For some chassis, a separate cable must be
ordered.

Note: To use the LVDS tool, you must have ComPair release
2004-1 (or later) on your PC (engine version >= 2.2.05).
For every TV type number and screen size, one must choose
the proper settings via ComPair. The ComPair file will be
updated regularly with new introduced chassis information.

How to Order

• LVDS tool (incl. two LVDS cables: 31p and 20p, covering
chassis BJx, EJx, FJx and LC4.1): 3122 785 90671.

• LVDS tool Service Manual: 3122 785 00810.

• LVDS cable 20p/DF -> 20p/DF (standard with tool):
3122 785 90731.

• LVDS cable 31p/FI -> 31p/FI (standard with tool):
3122 785 90662.

For other chassis, a separate L

VDS cable must be ordered.
Refer to table “LVDS cable order number” for an overview of all
available cables.

Table 5-2 LVDS cable order number

Chassis LVDS cable order number Remarks

BJ2.4 3122 785 90662
BJ2.5 3122 785 90662
BJ3.0 3122 785 90662
BJ3.1 3122 785 90662
EJ2.0 3122 785 90662
EJ3.0 3122 785 90662
EL1.1 3122 785 90662 1 / 3122 785 90821
FJ3.0 3122 785 90662
FTL2.4 3122 785 90662
LC4.1 3122 785 90731 1 / 3122 785 90851
LC4.3 3122 785 90821
LC4.31 3122 785 90821
LC4.41 3122 785 90662
LC4.8 3122 785 90662
LC4.9 3122 785 90662
LC7.x t.b.d.
JL2.1 3122 785 90861

1

1

1

1
1
1

1
1, 2

1, 2

/ 3122 785 90851 Only for 26 & 32” sets.

1, 2

/ 3122 785 90851

1, 2

/ 3122 785 90851 MFD variant only.

Notes:

1. Included in LVDS tool package.

2. Pins “27” and “28” must be grounded or not connected.

EN 22 LC7.2E LA5.

Service Modes, Error Codes, and Fault Finding

5.4 Error Codes

5.4.1 Introduction

Error codes are required to indicate failures in the TV set. In
principle a unique error code is available for every:

• Activated protection.

• Failing I2C device.

• General I2C error.

• SDRAM failure.

The last five errors, stored in the NVM, are shown in the
Service menu’s. This is called the error buffer.
The error code buffer contains all errors detected since the last
time the buffer was erased. The buffer is written from left to
right. When an error occurs that is not yet in the error code
buffer, it is displayed at the left side and all other errors shift one
position to the right.
An error will be added to the buffer if this error differs from any
error in the buffer. The last found error is displayed on the left.
An error with a designated error code may never lead to a
deadlock situation. This means that it must always be
diagnosable (e.g. error buffer via OSD or blinking LED
procedure, ComPair to read from the NVM).
In case a failure identified by an error code automatically
results in other error codes (cause and effect), only the error
code of the MAIN failure is displayed.

Example: In case of a failure of the I2C bus (CAUSE), the error
code for a “General I2C failure” and “Protection errors” is
displayed. The error codes for the single devices (EFFECT) is
not displayed. All error codes are stored in the same error
buffer (TV’s NVM) except when the NVM itself is defective.

5.4.2 How to Read the Error Buffer

You can read the error buffer in 3 ways:

• On screen via the SAM/SDM/CSM (if you have a picture).
Example:
– ERROR: 0 0 0 0 0 : No errors detected
– ERROR: 6 0 0 0 0 : Error code 6 is the last and only

detected error

– ERROR: 9 6 0 0 0 : Error code 6 was detected first and

error code 9 is the last detected (newest) error

• Via the blinking LED procedure (when you have no
picture). See “The Blinking LED Procedure”.

•Via ComPair.

5.4.3 Error Codes

In case of non-intermittent faults, write down the errors present
in the error buffer and clear the error buffer before you begin
the repair. This ensures that old error codes are no longer
present.
If possible, check the entire contents of the error buffer. In
some situations, an error code is only the result of another error
and not the actual cause of the problem (for example, a fault in
the protection detection circuitry can also lead to a protection).

Table 5-3 Error code overview

Error

1)

code

0No error.
1 DC Protection of speakers.
2 +12V protection error. 12V missing or "low".
3 Reserved.
4 General I2C error. note 2
5 Trident Video Processor

6 I2C error while communicating

7 I2C error while communicating

8 I2C error while communicating

9 I2C error communicating with

10 SDRAM defective. 7204
11 I2C error while communicating

12 I2C error while communicating

13 DVB HW communication

14 SDRAM defective. 7205
15 Reserved.
16 Reserved.
17 Reserved.
18 I2C error while communicating

19 I2C error while communication

Description Item nr. Remarks

communication error.

with the NVM.

with the Tuner.

with the IF Demodulator.

the Sound Processor.

with the HDMI IC.

with the MOJO PNX8314.

error.

with the iBoard processor.

with 1080p bolt-on module.

7202 When Trident IC is

defective, error 10 and 14
might also be reported.
Trident communicates via
parallel bus, not via the I2C
bus. The I2C bus of Trident
is only used in ComPair
mode.

7315 The TV will not start-up due

to critical data not available
from the NVM, but the LED
will blink the error code.

1101

7113

7411

7817

7G00 if applicable

7F01,

if applicable
7K00,
7G00

if applicable

if applicable

Notes

1. Some of the error codes reported are depending on the
option code configurations.

2. This error means: no I2C device is responding to the
particular I2C bus. Possible causes: SCL/SDA shorted to
GND, SCL shorted to SDA, or SCL/SDA open (at uP pin).
The internal bus of the Trident platform should not cause
the entire system to halt as such an error can be reported.

5.4.4 How to Clear the Error Buffer

The error code buffer is cleared in the following cases:

• By using the CLEAR command in the SAM menu:
– To enter SAM, press the following key sequence on the

remote control transmitter: “062596” directly followed
by the OSD/i+ button (do not allow the display to time
out between entries while keying the sequence).

– Make sure the menu item CLEAR is selected. Use the

MENU UP/DOWN buttons, if necessary.

– Press the MENU RIGHT button to clear the error

buffer. The text on the right side of the “CLEAR” line will
change from “CLEAR?” to “CLEARED”

• If the contents of the error buffer have not changed for 50
hours, the error buffer resets automatically.

Note: If you exit SAM by disconnecting the mains from the
television set, the error buffer is not reset.

Service Modes, Error Codes, and Fault Finding

EN 23LC7.2E LA 5.

5.5 The Blinking LED Procedure

5.5.1 Introduction

The software is capable of identifying different kinds of errors.
Because it is possible that more than one error can occur over
time, an error buffer is available, which is capable of storing the
last five errors that occurred. This is useful if the OSD is not
working properly.

Errors can also be displayed by the blinking LED procedure.
The method is to repeatedly let the front LED pulse with as
many pulses as the error code number, followed by a period of

1.5 seconds in which the LED is “off”. Then this sequence is
repeated.

Example (1): error code 4 will result in four times the sequence
LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After
this sequence, the LED will be “off” for 1.5 seconds. Any RC5
command terminates the sequence. Error code LED blinking is
in red colour.

Example (2): the content of the error buffer is “12 9 6 0 0”
After entering SDM, the following occurs:

• 1 long blink of 5 seconds to start the sequence,

• 12 short blinks followed by a pause of 1.5 seconds,

• 9 short blinks followed by a pause of 1.5 seconds,

• 6 short blinks followed by a pause of 1.5 seconds,

• 1 long blink of 1.5 seconds to finish the sequence,

• The sequence starts again with 12 short blinks.

5.5.2 Displaying the Entire Error Buffer

Additionally, the entire error buffer is displayed when Service
Mode “SDM” is entered. In case the TV set is in protection or
Stand-by: The blinking LED procedure sequence (as in SDM­mode in normal operation) must be triggered by the following
RC sequence: “MUTE” “062500” “OK”.
In order to avoid confusion with RC5 signal reception blinking,
this blinking procedure is terminated when a RC5 command is
received.

To erase the error buffer, the RC command “MUTE” “062599

“OK” can be used.

5.6 Software Upgrading

In this chassis, three SW “stacks” are used:

• TV mains SW (processor and processor NVM).

• Digital TV SW (IBO Zapper).

• 1080p Panel SW (if present, depends on execution).

5.6.1 TV Main SW Upgrade

For instructions on how to upgrade the TV Main software, refer
to ComPair.

5.6.2 “Digital TV” Software Upgrade

How to Upgrade Philips “Digital TV” Software (IBO Zapper):

Preparation of the Memory Device for Software Upgrade

For the procedure you will require:

1. A personal computer with web browsing capability.

2. An archive utility that supports the ZIP-format (e.g. Winzip
for Windows).

3. A CompactFlash PC Card Adapter (Type II).

4. A CompactFlash (Type I) portable memory card for
insertion into the PC Card Adapter. Philips recommends
using Compact Flash (CF) portable memory cards with
their respective PC Card Adapters (Sandisk or Kingston)
with memory sizes of up to 256MB. Philips does not
guarantee that other types of portable memory cards and
their respective PC Card Adapters, including multi-card PC
Card Adapters work on Philips Digital TV.
Note: Only FAT16-formatted portable memory is
supported. NTFS & FAT32 are not supported.

Copying of Software Image Files to the Flash Device

Copy the appropriate “FCL.img” and “IBOZ.img” to the root
directory of the flash device.

Verifying the Current Version of the TV Software

Before you start the software upgrade procedure, it is advised
to check what the current TV software is. The current TV
software version can be seen in the “System software” menu.

1. First press the “A/D” key and then the “DIGITAL MENU”
key on the remote controller to access the “Setup” menu.

2. Access the “Information” menu.

3. Access the “Current software version” menu.

Example:

The menu shows “IdtvZapper_HW260.256_SW2.0.24”. This
means that the hardware version is “260.256” and the software
version is “2.0.24”.

G_16221_001.eps

241006

Figure 5-10 Current software version

EN 24 LC7.2E LA5.

Service Modes, Error Codes, and Fault Finding

Software Upgrade Procedure

1. Power ON your TV with the power switch at the side of the
TV. Put your TV ON by using the remote controller if the TV
is in Stand-by.

2. Make sure that it is in “Digital” mode (via “A/D” button).

3. Make sure that your TV is not in Stand-by. Power OFF your
TV with the power switch of the TV.

4. Remove the Conditional Access Module (if any) from the
CI-slot.

5. Insert the PC Card Adapter with the portable memory card
containing the software upgrade files.

6. Switch ON your TV with the power switch at the side of the
TV.

7. At start-up, the TV will scan the CI slot until it finds the
update content. The TV will automatically go to the
upgrade mode. After a few seconds it will display the status
of the upgrade procedure.

Warnings:

Do NOT remove the memory card or the PC card adapter
during the software upgrade procedure.
In case of a power drop during the upgrade procedure, don’t
remove the portable memory from the TV. The TV will continue
the upgrade as soon as the power comes back.

Example: At start-up of the TV, the current software is erased.

G_16221_005.eps

241006

Figure 5-14 Upgrade ready

When the software upgrade has been successful, switch OFF
the TV, remove the PC Card Adapter, and restart the TV with
the Power switch at the side of the TV.
The TV will now start up with the new software.

Verifying that the Software Has Been Upgraded Successfully

Verify that the software is upgraded to the new version by
following the procedure outlined in the section “Verifying the
current version of the TV software”.

G_16221_002.eps

241006

Figure 5-11 Erasure of the software

If the erasure is successful, the programming will start.

G_16221_003.eps

241006

Figure 5-12 Programming of the software

Example: The programming is completed when the progress

bar reaches the 100% mark.

5.6.3 1080p Panel SW Upgrade

To upgrade the SW on the 1080p panel:

1. Remove the back cover of the TV.

2. Connect the ComPair UART cable to the UART connector
on the 1080p panel (refer to next figure).

3. Follow the instructions in ComPair.

DUAL LVDS

FLASH MEMORY

SINGLE LVDS + I2C

12V

UART

G_16860_090.eps

150307

G_16221_004.eps

241006

Figure 5-13 Programming complete

The TV will reset and the screen will go blank, after a few
seconds a dialogue box will occur to inform you that the current
module inserted in the CI slot is not recognized. This is normal
as the slot only recognizes a Conditional Access Module during
normal operation.

Example: The following dialogue box will appear after the TV is
upgraded successfully:

Figure 5-15 1080p connection overview

Service Modes, Error Codes, and Fault Finding

EN 25LC7.2E LA 5.

5.7 Fault Finding and Repair Tips

Notes:

• It is assumed that the components are mounted correctly
with correct values and no bad solder joints.

• Before any fault finding actions, check if the correct options
are set.

5.7.1 NVM Editor

In some cases, it can be convenient if one directly can change
the NVM contents. This can be done with the “NVM Editor” in
SAM mode. With this option, single bytes can be changed.

Caution:

• Do not change the NVM settings without
understanding the function of each setting, because
incorrect NVM settings may seriously hamper the
correct functioning of the TV set!

• Always write down the existing NVM settings, before
changing the settings. This will enable you to return to the
original settings, if the new settings turn out to be incorrect.

Table 5-4 NVM editor overview

Hex Dec Description

.ADR 0x000A 10 Existing value
.VAL 0x0000 0 New value
.Store Store?

5.7.2 Load Default NVM Values

Alternative method (1):

1. Go to SAM.

2. Select NVM Editor.

3. Select ADR (address) to 1 (dec).

4. Change the VAL (value) to 170 (dec).

5. Store the value.

6. Do a hard reset to make sure new default values took
place.

Alternative method (2):

It is also possible to upload the default values to the NVM with
ComPair in case the SW is changed, the NVM is replaced with
a new (empty) one, or when the NVM content is corrupted.
After replacing an EEPROM (or with a defective/no EEPROM),
default settings should be used to enable the set to start-up and
allow the Service Default Mode and Service Alignment Mode to
be accessed.

5.7.3 Start-up/Shut-down Flowcharts

Important note for DVB sets:

• When you put a DVB set into Stand-by mode with an RC,
the set will go to “Semi Stand-by” mode for 5 minutes. This,
to facilitate “Off the Air download” (OAD). If there is no
activity within these 5 minutes, the set will switch to Stand­by mode. In “Semi Stand-by” mode, the LCD backlight and
Audio Amplifier are turned “off” but other circuits still work
as normal. The customer might think the set is in Stand-by.
However, in real Stand-by mode, only the uP and the NVM
are alive and all other circuits are switched “off”.

• If you press the mains switch at the local key board in a
DVB set, the set will switch to Stand-by mode.

It is possible to download default values automatically into the
NVM in case a blank NVM is placed or when the NVM first 20
address contents are "FF". After the default values are
downloaded, it is possible to start-up and to start aligning the
TV set. To initiate a forced default download the following
action has to be performed:

1. Switch “off” the TV set with the mains cord disconnected
from the wall outlet (it does not matter if this is from "Stand­by" or "Off" situation).

2. Short-circuit the SDM jumpers on the SSB (keep short
circuited).

3. Press “P+” or “CH+” on the local keyboard (and keep it
pressed).

4. Reconnect the mains supply to the wall outlet.

5. Release the “P+” or “CH+” when the set is “on” or blue LED
is blinking.

When the downloading has completed successfully, the set
should be into Stand-by, i.e. red LED on.

On the next pages you will find start-up and shut-down
flowcharts, which might be helpful during fault finding.
Please note that some events are only related to PDP sets,
and therefore not applicable to this LCD chassis.

EN 26 LC7.2E LA5.

Start Up

Service Modes, Error Codes, and Fault Finding

Error 6 - NVM

[Protection]

Standby Normal Mode

(RED LED)

Port Assignment in STANDBY

Wait for RC key or

Wake up event

AC ON

+5VSTBY & +3V3STBY Available (1)

160ms

RENEAS POR by +3VSTBY (2)

STANDBYn = LOW

InitCold Component:

1. Check SDM port.

- If SDM pin = LOW and NVM first 20Byte =
0xFF, reload Software default NVM value.

2. Check Panel port.

- If Panel Pin = LOW and check slave address
0x65 = 0xA5, Enter Panel Mode.

No

Last status is ON?

Yes

Read NVM completed.

STOP I²C activities.

LED = BLUE for Normal mode

LED = RED for Recording mode

BLOCK RC Key

M16C RST_H = HIGH

RST_HDMI = LOW

RST_AUD = LOW
RESET_n = LOW

LCD_PWR_ON = LOW

SDI PDP => CTRL_DISP1 = LOW

(1) +5VSTBY to be measured
at PDTC114ET (item 7322)

(2) to be measured at pin 4
of BD45275G (item 7312)

User wake up the sets

in DVB recording mode

LCD_PWR_ON = HIGH

(Same function as CTRL-DISP2)

SDI PDP => CTRL_DISP1 = LOW

20ms

1000ms to

1500ms

Wait for 20 ms

Switch ON LVDS Signal

Init. Warm Component

(For software)

Error 2

[Protection]

Notes:

---------

1. LC07 TV software only start communication with IBOZ once
receive the INT message from IBOZ.

For DVB Sets only (Semistandby)
Recording mode

SDI PDP => CTRL_DISP1 = HIGH

Recording Mode finished

Software Shutdown:

WP for NVM

Port Assignment in STANDBY

Wait for 100ms

Time out = 2000ms

Yes

500ms

100ms

Error 7

Error 8

Error 9

Error 11

1700ms

Error 3

[Protection]

STANDBYn = HIGH

(Same function as CTRL-DISP3)

Wait for 500ms

Is Power Down =

No

BL_ADJ = HIGH (100% Duty Cycle)

HIGH?

Yes

Wait for 100ms

M16C RST_H to LOW

RST_HDMI = HIGH

RST_AUD = HIGH
RESET_n = HIGH

Enable Power Down INT

Enable DC_PROT INT

Initialise Tuner

Initialise IF Demodulator, Afric

TDA9886T

Initialise Micronas

Mute Audio

Initialise HDMI, Sil9023

Initialise Trident CX

DPTVInit( )

Initialise FHP Panel

* For FHP PDP Sets only

Initialise Bolt-ON

* For iTV, 1080P, Ambi Light

For LCD:

BL_ON_OFF = HIGH

* BL_ADJ keep 100% for 3000ms

before dimming.

Blank Picture

Picture Mode Setup & Detection

unBlank Picture &

UnMute Audio

No

Error 5 - Trident

[Protection]

Error 10 – SDRAM 7204

[Protection]

Error 14 – SDRAM 7205

[Protection]

Error 17 – AmbiLight

Error 18 – iTV iFace

End

For PDP:

3000ms delay

STANDBYn = LOW

Standby

Normal Mode

Enable RC Key

DVB recording mode

Figure 5-16 Start-up flowchart

Error 19 – 1080P

G_16860_070.eps

220207

Service Modes, Error Codes, and Fault Finding

EN 27LC7.2E LA 5.

SEMISTANDBY/ STANDBY

300ms

20ms

Start

Mute Audio

BL_ADJ stop dimming

(PWM duty cycle 100%)

BL_ON_OFF = LOW

Wait 300ms

Switch OFF LVDS

Wait 20ms

LCD_PWR_ON = LOW

LED = RED No

For DVB Sets only (Semistandby)

Wait for 3000ms

Except power tact switch

SDI PDP => CTRL_DISP1 = HIGH

Off Air Downloading/ Recording Mode

IBOZ send shut down command

Software Shutdown:

Standby using

“power key”

Yes

LED = NO LED

for Standby soft mode

Disable Power Down INT &

DC_PROT_INT

BL_ADJ = LOW

(PWM duty cycle 0%)

WriteProtect for NVM

Port Assignment in STANDBY

Sets go to standby here

40ms

Total = 360ms

STANDBYn = LOW

Wait for 3000ms

End

Figure 5-17 Semi Stand-by/Stand-by flowchart

Blocking for the next start up to ensure
power supply discard properly.

G_16860_071.eps

220207

EN 28 LC7.2E LA5.

Service Modes, Error Codes, and Fault Finding

Power Down INT:

AC OFF or Transient INT

Start

Notes:

1. Power Down INT will be based on fall edge triggering

2. +3V3STBY will stay for 15ms, software must perform
WriteProtect for NVM within 15ms.

Avoid false trigger

No

End

Poll the Power Down

INT for 5 times

Yes

Mute Audio & VIdeo

WriteProtect for NVM

STANDBYn = LOW

Wait 5000 ms

Re-start: Start up

End

DC_PROT INT

Avoid false trigger

No

End

Error 1

[Protection]

Start

is DC_PROT = LOW

for 3 sec?

Yes

Mute Audio & VIdeo

Log Error Code

WriteProtect for NVM

STANDBYn = LOW

End

G_16860_072.eps

220207

Figure 5-18 Power Down & DC_PROT flowchart

Block Diagrams, Test Point Overviews, and Waveforms

6. Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 26” & 32”

WIRING 26”- 32” LCD (STYLING ME7)

LCD DISPLAY

(1004)

29LC7.2E LA 6.

LVDS

30P

14P

CN2

INVERTER

8521

14P

CN2

12P

CN3

SUPPLY

(1005)

8520

CN6

CN7

CN1

9P

8P

8C01

8P11

B

8735

SSB

9P

1C01

8P

1P11

8G51

30P

1G51

7P

1M20

11P

1304

4P

1735

12P

CN3

INVERTER

SIDE I/O

D

2P3

(1116)

KEYBOARD CONTROL

(1114)

RIGHT SPEAKER

INLET

8002

8191

8192(UK)

8304

8735

LEFT SPEAKER

11P

8M20

E

3P

1M01

8M01

3P

1M01

140307

1304

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

G_16860_034.eps

Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 37” & 42”

WIRING 37”- 42” LCD

(STYLING ME7)

8521

8520

8C01

8P11

30LC7.2E LA 6.

LCD DISPLAY

(1004)

LVD S

30P

8G51

9P

X412

8P

X406

14P

X404

12P

X403

SUPPLY

(1005)

14P

CN2

9P

INVERTER INVERTER

B

2P3

X101

8002

1C01

SSB

8P

1P11

30P

1G51

7P

1M20

11P

1304

4P

1735

8735

D

SIDE I/O

(1116)

12P

CN3

KEYBOARD CONTROL

E

(1114)

RIGHT SPEAKER

INLET

8191

8192(UK)

LEFT SPEAKER

8304

11P

1304

8M20

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

3P

8M01

3P

1M01

G_16860_094.eps

160307

1M01

Block Diagrams, Test Point Overviews, and Waveforms

Wiring Diagram 42” 1080p

WIRING 42” LCD 1080p

(STYLING ME7)

8521

4P

X405

9P

X412

8C01

8P

X406

8P11

14P

X404

8520

12P

X403

31LC7.2E LA 6.

LCD DISPLAY

(1004)

LVDS

51P

8G52

41P

1G52

1080p BOLT-ON

F

1G51

40]P

4P

1710

SUPPLY

(1005)

14P

CN2

9P

INVERTER INVERTER

B

2P3

CN1

8002

INLET

1C01

SSB

8P

1P11

30P

1G51

8G51

7P

1M20

11P

1304

4P

1735

8735

8304

D

11P

SIDE I/O

(1116)

1304

12P

CN3

KEYBOARD CONTROL

3P

(1114)

E

1M01

RIGHT SPEAKER

8191

8192(UK)

LEFT SPEAKER

8M20

7P

1M20

IR/LED/LIGHT

J

SENSOR

(1112)

8M01

3P

1M01

G_16860_095.eps

160307

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Supply

SUPPLY 32” LCD

32LC7.2E LA 6.

DISPLAY SUPPLY

1. +24V

DISPLAY SUPPLY

1. +24V

2. +24V

3. +24V

4. +24V

5. +24V

6. GND

7. GND

8. GND

9. GND

10. GND

11. N.C.

12. N.C.

2. +24V

3. +24V

4. +24V

5. +24V

6. GND

7. GND

8. GND

9. GND

10. GND

11. DIM

12. BL-ON

13. PWM

14. N.C.

CN1

AC-IN

220 - 240V

50/60Hz

CN3

CN6

CONTROL:

1. BL-DIM

2. PG

3. BL-ON

4. GND

5. N.C.

6. PSON

7. N.C.

8. 12V.

CN2

CN7

CONTROL:

1. -12VA

2. +12VA

3. GND

4. 5.2VS

5. 5.2VS

6. 5.2VS

7. GND

8. GND.

9. GND

PRIMARY SIDE

SECONDARY SIDE

G_16860_035.eps

200207

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Video

VIDEO

B03A

TUNER IF & DEMODULATOR

1101
TD1316AF/IHP-2

MAIN

TUNER

(HYBRID)

10

11

VIP_IBO

VIM_IBO

9

IF_AGC_IBO

IF_OUT1

RF_AGC

33LC7.2E LA 6.

TUNER AGC

+5VS

DEMODULATOR

SUPPLY

VIF-PLL

SINGLE REFERENCE QSS MIXER

VIF AGC

SOUND TRAPS

4.5 to 6.5 Mhz

INTERCARRIER MIXER AND

AM-DEMODULATOR

MAD

I2C-BUS TRANSCEIVER

SCL

CVBS

17

SDA

7113
TDA9886T/V4

1102

1

1103

1

12

13

IF_ATV

RF_AGC_IBO

RF_AGC

DVB_SW

B03B

B04A

8

2

7111

14

11

7114

EF

VIF1

5

VIF2

4

SIF1

5

SIF2

4

VIF1

1

2

VIF2

SIF1

23

SIF2

24

TAGC

14

SIF AGC

B03B

DVB-DEMODULATOR

7F01
TDA10046AHT

COMP_OUT

CONDITIONAL

COFDM
CHANNEL
DECODER

ADC

7F04

PCMCIA

ACCESS

62
61
2

MPEG-TS

35

(PARALLEL)

121

RF_AGC_IBO

1K00

TDA_DAT(0-7)

TDA_SYNC

B03A

A_MDO(0-7)

68P

B03C

DVB-COMMON INTERFACE

7K00
STV0700L

PCMCIA

CONTROLLER

49

INTERFACE

A_MDI(0-7)

B03D

DVB-MOJO

7G00
PNX8314HS/C102

MOJO

ADC

TS_DATA(0-7)

TS_SYNC

62

TS

B06B

B06A

D

B06C

(TS)(AV)

30

IO - SCART 1 & 2

1504

19

15
11

7

1

20
16

8

EXT1

1506

19

21

20

2x SCART

15

8

EXT2

YPBPR & REAR IO

1615

Pr

Y

Pb

SIDE FACING SIDE AV

1302

VIDEO

1301

1

3

5

S VIDEO

4

2

HDMI

1810

1

3

4
6

1

7

9
10
12

18 2

19

19

1811

1

3

4
6

1

7

9
10
12

18 2

19

19

2x HDMI

CONNECTOR

C
B
G

R

3535

3528

3523

3516

3545

3528

3518

3522

3529

3552

3550

3617

3618

3619

FRONT_Y_CVBS_IN

FRONT_C_IN

7814

HDMI_HOTPLUG_RESET

7860

HDMI_HOTPLUG_RESET

163

172

165
167

7503

EF

7500

EF

RX2+A

RX2-A

RX1+A

RX1-A

RX0+A

RX0-A

RXC+A

RXC-A

RX2+B

RX2-B

RX1+B

RX1-B

RX0+B

RX0-B

RXC+B

RXC-B

C_CVBS

3537

SC1_STATU S

3521

SC2_STATU S

1304

2
4

B04A

B04A

B|Pb

G|Y

R|Pr

SC1_RF_OUT_CVBS

B04A

SC2_CVBS_MON_OUT

B04A

B04A

MICROPROCESSOR

1304

2
4

7817
SII9025CTU

52

+

R0X2

51

-

48

+

R0X1

47

-

44

+

R0X0

43

-

40

+

R0XC

39

-

71

+

R1X2

70

-

67

+

R1X1

66

-

63

+

R1X0

62

-

59

+

R1XC

58

-

B03F

DVB-MOJO
ANALOG BACK END

5J52
5J54
5J53

5J55

ADC

ODCK

HDMI

(MAIN)

DE

HSYNC
VSYNC

CVBS_RF

IBO_CVBS_IN

IBO_B_IN
IBO_G_IN
IBO_R_IN

SC1_R_IN
SC1_G_IN
SC1_B_IN

SC1_CVBS_IN

SC1_FBL_IN

SC2_Y_CVBS_IN

SC2_C_IN

HD_Pr_IN

HD_Y_IN

HD_Pb_IN

FRONT_Y_CVBS_IN_T

FRONT_C_IN_T

HDMI_VCLK

121

HDMI_DE

1

HDMI_H

2

HDMI_V

3

HDMI_Cb(0-7)

HDMI_Y(0-7)

HDMI_Cr(0-7)

B04B

VIDEO PROCESSOR

169

71
199
183
191

163

189
181
197

198
173

162

190

70

188

180

196

182
192

23

6
4

5

7202
SVP CX32-LF

CVBS1

FS1

PC_B

PC_G
PC_R

ANALOG

MUX

CVBS_OUT1

PR_R2
Y_G2
PB_B2

PB_B3
FB1

CVBS_OUT2

PR_R3

FS2

PR_R1

Y_G1

PB_B3

Y_G3
C

DP-CLK

DP_DE_FLD

DP_HS
DP_HS

DIN_PORTD

(24BIT)

VIDEO

PROCESSOR

8-BIT
SINGLE
LVD S TX

TCLK1

XTALO

MEMORY

TA1

TB1

TC1

TD1

XTALI

51
50

49
48

45
44

43
42

41
40

205

204

TXCLKn
TXCLKp

DQ(0-31)

CX_MA

TXAn
TXAp

TXBn
TXBp

TXCn
TXCp

TXDn
TXDp

1201
14M31

(0-11)

(0-15)

(0-11)

(16-31)

VDISP

TXAn1

1210

TXAp1

1211

TXBn1
TXBp1

1212

TXCn1
TXCp1

1213

TXCLKn1
TXCLKp1

1214

TXDn1
TXDp1

BOLT_ON_SCL
BOLT_ON_SDA

F2

F6

7204
IS42S16400D-6TL

DRAM

1Mx16x4

7205
IS42S16400D-6TL

DRAM

1Mx16x4

1G51 1G51

FLASH & NVM

7201
M29W400DT

EPROM

512Kx8

256Kx16

(ONLY FOR 1080P)

DDR SDRAM

7601
K4D263238I

SDRAM

1Mx32x4

(ONLY FOR 1080P)

1

3

5
7

2
4

6

8

12
14

18
20

24
26

27
29

F3

LVD S

CONNECTOR

TO DISPLAY

FOR NON

1080P SETS

OCMDATA

OCMADDR

DATA

ADDR

LVD S IN

40

38
36
34

30

28

26
24

22
20

16
14

12
10

2
4

7101
GM1601-LF

F1

OCM

SCALER

F6

SYSTEM

RA+

RB+

RC+

RCLK-

RCLK+

RD+

MAIN_SCL
MAIN_SDA

VDISP

RA-

RB-

RC-

RD-

F3

VIDEO

F4

AF23

F4

LVD S

AE23
AF22

AE22
AF21
AE21
AF20
AE20
AF19
AE19

AE16
AF16

AE15
AF15

AE14
AF14

AF13
AE12

AF12
AF11

VRED(0-7)

VGRN(0-7)

VBLU(0-7)

LVD S OUT

7301
THC63LVDF84B

LCD PANEL
INTERFACE

RECEIVER

TXA0n
TXA0p

TXA1n
TXA1p
TXA2n
TXA2p

TXACn
TXACp
TXA3n
TXA3p

TXB0n
TXB0p

TXB1n
TXB1p

TXB2n
TXB2p

TXBCn
TXBCp

TXB3n
TXB3p

1411

1412

1413

1414

1415

1416

1417

1818

1419

1420

(ONLY FOR 1080P)

1G52

32
31

30

29
28
27
25
24
22
21

CONNECTOR

TO FULL HD

17
16

15
14

13
12

10

9
7

6

(ONLY FOR 1080P)

G_16860_036.eps

LVD S

DISPLAY

230207

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Audio

AUDIO

TUNER IF & DEMODULATOR

B03A

1101
TD1316AF/IHP

MAIN

TUNER

(HYBRID)

10

11

VIP_IBO

VIM_IBO

IF_OUT1

RF_AGC

9

IF_AGC_IBO

B04A

8

2

DVB_SW

34LC7.2E LA 6.

AUDIO

7113
TDA9886T/V4

1102

7109

1

1103

1

6103

IF-ATV

7111

RF_AGC_IBO

12

14

RF_AGC

13

B04A

SAW_SW

11

B03B

VIF1

5

VIF2

4

SIF1

5

SIF2

4

VIF1

1

2

VIF2

23

SIF1

SIF2

24

TAGC

14
12

SIF AGC

TUNER AGC

+5VS

SUPPLY

VIF-PLL

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

VIF AGC

DEMODULATOR

SOUND TRAPS

4.5 to 6.5 Mhz

AM-DEMODULATOR

I2C-BUS TRANSCEIVER

SCL

MAD

CVBS

SIOMAD

SDA

B07

12

B03B

DVB-DEMODULATOR

7F01
TDA10046AHT

PCMCIA

CONDITIONAL

ACCESS

COFDM

ADC

CHANNEL
DECODER

1K00

68P

62
61
2

TDA_DAT(0-7)

A_MDO(0-7)

A_MDO(0-7)

B03C

DVB-COMMON INTERFACE

7K00
STV0700L

PCMCIA

CONTROLLER

TS

INTERFACE

TS_DATA(0-7)

I0 - SCART 1 & 2

B06B

1504

1

2x SCART

D

AUDIO

L/R IN

B06A

AUDIO
L/R IN

2

1

3

6

EXT1

1506

1
2

3

21

6

EXT2

SIDE FACING SIDE AV

1302

YPBPR &REAR IO

1615

DVB-MOJO

B03D

SC1_AUDIO _OUT_R

SC1_AUDIO _OUT_L

SC2_AUDIO _OUT_R

SC1_AUDIO _OUT_L

L_FRONT_IN

R_FRONT_IN

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

7G00
PNX8314HS/C102

MOJO

(TS)

(AV)

1304

6

8

202

203

204

SC1_AUDIO _MUTE_R

SC1_AUDIO _MUTE_L

SC2_AUDIO _MUTE_R

SC2_AUDIO _MUTE_L

MICROPROCESSOR

B04A

1304

6

8

SIDE_AUDIO_IN_L_CON

SIDE_AUDIO_IN_R_CON

SIF 50

MOJO_I2S_OUT_SD

MOJO_I2S_OUT_SCK

MOJO_I2S_OUT_WS

B06D

SC1_AUDIO_IN_R

SC1_AUDIO_IN_L

B06D

B06D

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

B06D

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

B04C

AUDIO PROCESSOR

7

4
5

67

68

1411
18M432

36
53

37
54

33
53

34

52

48

49

50

51

7411

MSP4450P-VK-E8 000 Y

ANA-IN1+

DA1

CL
WS

XTALIN

XTALOUT

SC1-OUT-R
SC1-IN-R

SC1-OUT-L
SC1-IN-L

SC2-OUT-R
SC2-IN-R
SC2-OUT-L
SC2-IN-L

SC4-IN-L

SC4-IN-R

SC3-IN-L

SC3-IN-R

SOUND

PROCESSOR

DACM-L

DACM-R

SUPPLY

DACA-L

DACA-R

7A01
TDA8932T/N1

27
26

AUDIO-LS_L

AUDIO-LS_R

3A03
3A11

9
1

CLASS D

5A03

27

POWER

AMPLIFIER

STANDBYn

B04A

ENGAGE

12
13

39
38

40

+5V_D
+8V
+5V_AUD

HEADPHONE AMP & MUTING

B06D

B04A

MICRO

3A19

3A26

6

5

B04A

DC_PROT

SIDE FACING SIDE AV

D

5A04

22

7A05÷7A07

DC-DETECTION

1735

1

2

3

4

LEFT

SPEAKER

RIGHT

SPEAKER

PROCESSOR

24

23

HP_AUDIO_OUT_L

HP_AUDIO_OUT_R

ANTI_PLOP

B04A

POWER_DOWN

B04A
B04A
B04A

STANDBY

MUTEn

7901

MUTING

CONTROL

HP_LOUT

HP_ROUT

SC1_AUDIO _MUTE_R

SC1_AUDIO _MUTE_L

SC2_AUDIO _MUTE_R

SC2_AUDIO _MUTE_L

1304

1304

6

8

6

8

B06B

HEAD_PH_L

HEAD_PH_R

1303

2

3

5

HEADPHONE

B06C

HDMI

1

18 2

19

1

18 2

19

2x HDMI

CONNECTOR

RXxxA

RXxxB

7817
SII9025CTU

+

RX2

-

HDMI

+

RX1

­+

RX0

­+

RXC

-

SCK

WS

SD0

MUTE

86

HDMI_I2S_SCK

85
84

77

HDNI_I2S_WS
HDMI_I2S_SD

7810
UDA1334ATS/N2

AUDIO

DAC

1

BCK

2

WS

3

DAT AI

8

MUTE

VOUTL

VOUTR

HDMI_AUDIO_IN_L

14

HDMI_AUDIO_IN_R

16

57

58

SC5-IN-L

SC5-IN-R

G_16860_037.eps

200207

Block Diagrams, Test Point Overviews, and Waveforms

Block Diagram Control & Clock Signals

CONTROL & CLOCK SIGNALS

B03B

DVB-DEMODULATOR

7F01
TDA10046AHT/C1

CONFDM

CHANNEL

DECODER

PCMCIA

CONDITIONAL

ACCESS

B03E

DVB-MOJO MEMORY

1

21

54

25
9

37
36
35

COMP_OUT

7F03

1

RESET_FE_n

TDA_CLK

TDA_VALID

TDA_SYNC

1K00

1

35

20
57

68P

34

68

7F04

7F02

1

TDA_DAT(0-7)

A_MDO(0-7)

PCMCIA_D(0-7)

PCMCIA_A(0-7)

PCMCIA_D(8-14)

B03C

DVB-COMMON INTERFACE

RF_AGC_IBO

4MHZ_CLK

50

48

49

A_MDI(0-7)

A_MICLK

A_MOCLK

7K04

110

118

35

27M

7K00
STV0700L

PCMCIA

CONTROLLER

7K03

BUFFERING

7K01

BUFFERING

7K01

BUFFERING

7H00
M29W320ET70N6F

EPROM
SDRAM

4MX8/2Mx16

2/4/8MB

NOR

FLASH

34

63
62
61

15

38

B03A

TUNER IF & DEMODULATOR

7111

12

13

RF_AGC

MIU_ADDR(15-24)

MIU_ADDR(0-7)

MIU_ADDR(8-14)

RESET_n

1101
TD1316AF/IHP-2

14

11

7113
TDA9886T/V4

DEMODULATOR

14

RESET_STV

TS_DATA(0-7)

TS_CLK
TS_SYNC
TS_VALID

MIU_RDY

MIU_DATA(0-7)

MIU_ADDR(0-20)

MIU_DATA(0-15)

B04A

7H02
K4S281632I-UC60

SYNC

SDRAM

4x2Mx16

MAIN

TUNER

(HYBRID)

2

DVB_SW

4MHZ_MOJO

FE_LOCK

6

B04A

MIU_ADDR(0-24)

SDRAM_CLK

38

SDRAM_DATA(0-15)

SDRAM_ADDR(0-14)

B03D

DVB-MOJO

7G00
PNX8314HS/C102

158

34
31

(GPIO)

32

(TS)

29
30
28

109

(MIU)

136

(SDRAM)

MOJO

35LC7.2E LA 6.

B04B

4

180

VIDEO PROCESSOR

B06C

HDMI

1

RXxxA

18 2

19

1

RXxxB

18 2

19

2x HDMI

CONNECTOR

E

KEYBOARD CONTROL

CHANNEL +
CHANNEL -

MENU
VOLUME ­VOLUME +

ON / OFF

J

IR/LED/LIGHT-SENSOR

+5V2-STBY

+5V2-STBY

+5V2_STBY

7204
IS42S16400D-6TL

DRAM

1Mx16x4

37

38

7205
IS42S16400D-6TL

DRAM

1Mx16x4

37
38

7817
SII9025CTU

+

R0

-

+

R1

-

102

1011
1012
1013
1014
1015

1016

6010

LED1

BLEU

6011

LED2
RED

7010

3010

HDMI_CCLK

121

HDMI_Cb(0-7)

HDMI_Y(0-7)

HDMI_Cr(0-7)

3012

3013

IR

SENSOR

DQ(0-31)

CX_MA(0-11)

CX_CLKE

CX_MCLK

7011

7012

7202
SVP CX32-LF

112

111

23

B03E

KEYBOARD

VIDEO

PROCESSOR

RESET_n

LED1

LED2

RC

N.C.

43

42

61
62
63

84
86

56

FOR DVB ONLY

1M01

2

1M01

2

1M20

7

66

44

33

11

TXCLKn

TXCLKP

B04A

MICROPROCESSOR

AD(0-7)

A(0-7)

7310
M29W800DT

EPROM

1Mx8

512Kx16

28

11

+3V3_STBY

3L11

B06B

B06B

B07

B06C

1M20

7

26
12

7312
BD45275G

5

VOUT

2,3

RST

IBO_RESET

IB0_IRQ

SC1_STATU S
SC2_STATU S

DC_PROT
HDMI_INT

KEYB

LED1

LED2

REMOTE

LIGHT_DENSOR

AD(0-7)

A(0-19)

CE

CPU_RST

4

(3V3)

CS

WR

RD
ALE_EMU
RST_H

INT

TXCLKn1

TXCLKP1

48
10

45
44
42

38

4

18

36

2

16

91
90

71

104

93

95

87

18

2

7311
M30300SAGP

MICRO

PROCESSOR

1G51

18

20

TO DISPLAY

(LVDS)

13

1301
10M

11

9

8

74
75
72

78
89

HDMI_HOTPLUG_RESET

88
3

4

100

99

19
23
21

3361

25

ANTI_PLOP

BL_ON_OFF

POWER_DOWN

STANDBYn

7322

LCD_PWR_ON

DCC_RESET

+3V3_STBY

3366

ITV_SPI_CLK
ITV_SPI_DATA_IN

ITV_CONNECTOR A

MUTEn

RST_AUD

STANDBY

RST_H

E_PAGE

SAW_SW

DVB_SW

4301

1312

6
5

B06D

B02

B6D

B06D
B06C
B04C
B04B

B07

B02 B06D

B04B

7315
M24C64-WMN6P

EEPROM

7

8Kx8

B04B

B06C
B03A
B03A

SDM

G_16860_038.eps

230207

Block Diagrams, Test Point Overviews, and Waveforms

Test Point Overview SSB (Bottom Side)

A110 E5
A115 E5
A116 E5
A124 E5
A125 E5
F111 E5
F112 E7
F114 E7
F115 F6
F116 F6
F117 F6
F118 E6
F119 E6
F120 E6
F121 E6
F122 E6
F123 D6

F126 E7
F127 E7
F128 D5
F129 D5
F130 D5
F131 E6
F132 E7
F133 E6
F134 F7
F140 D5
F210 A5
F211 C4
F212 A4
F213 A4
F214 A4
F215 A4
F217 A4

F218 A4
F219 A5
F220 A5
F221 A5
F222 A4
F223 A4
F224 A4
F225 A4
F226 A4
F227 A4
F228 A4
F229 A4
F230 A4
F231 C4
F232 B4
F302 B3
F303 C4

3139 123 6261.1

F304 A3
F305 B4
F309 B4
F310 A4
F311 B4
F312 A3
F313 B4
F314 A3
F315 B3
F316 A3
F317 B4
F318 A3
F319 B3
F320 A3
F321 B3
F322 A3
F323 A3

F324 B4
F325 A3
F326 B3
F327 A3
F328 B3
F329 B3
F330 A5
F331 B3
F332 B3
F333 B3
F334 B3
F335 B3
F336 A3
F337 A3
F338 B4
F339 B4
F340 B3

F341 B3
F342 F7
F343 F7
F344 F6
F345 C7
F346 B5
F347 B5
F348 B5
F349 B5
F350 B5
F351 A3
F352 A4
F353 B5
F354 B5
F356 A5
F357 A3
F360 A3

F361 B4
F362 A4
F363 B5
F364 B5
F365 B5
F366 B3
F367 A4
F368 A3
F369 B4
F370 F7
F379 A4
F380 A4
F381 B4
F382 A3
F383 A3
F384 A3
F385 A4

F386 A5
F387 A3
F401 B3
F402 C3
F403 C4
F510 E2
F511 E3
F512 E1
F513 E2
F514 E1
F515 E3
F516 D2
F517 D2
F518 D1
F519 E2
F520 D2
F521 D2

F522 D2
F523 D2
F524 D2
F525 C3
F526 C3
F527 C2
F528 C2
F529 C1
F530 C2
F531 D3
F532 D2
F534 E3
F535 E3
F536 E2
F537 E2
F538 D3
F539 D2

F540 D3
F541 D3
F542 D2
F543 E1
F544 D1
F601 F5
F602 F5
F603 E5
F604 F5
F605 F1
F606 F2
F607 F2
F608 F2
F609 F2
F610 F6
F611 F5
F612 F1

F613 E1
F614 F2
F615 F5
F616 F3
F801 E3
F802 E3
F805 D3
F806 E3
F832 F4
F840 F4
F841 F4
F842 F4
F843 F4
F850 F4
F851 E4
F861 F3
F869 F3

F870 F3
F871 F4
F872 F4
F873 F3
F874 F4
F875 E3
F876 D3
F877 E4
F901 B2
F902 B2
F903 B1
F904 C2
F905 B1
F908 B2
F910 B2
FA0 1 A3
FA0 2 A2

FA0 4 A2
FA0 5 A3
FA0 6 A3
FA0 7 A1
FA0 8 A1
FA0 9 B3
FA1 0 A1
FA1 1 A1
FA1 2 A3
FA3 2 A2
FB10 B8
FB11 C4
FB13 C6
FB14 E6
FB15 A8
FB16 C8
FB17 D6

FB19 D7
FB20 C8
FB21 A8
FB22 A8
FB23 A8
FB24 A8
FB25 A8
FB26 A8
FB27 B6
FB28 A9
FB29 A7
FB30 A8
FB31 A7
FB32 A6
FB33 A6
FB34 A6
FC25 A7

FC26 A6
FC27 A6
FC28 A6
FC29 A6
FF10 C8
FF11 E8
FF12 F8
FF13 F7
FF14 F8
FF16 E7
FF17 E8
FF18 E7
FF19 E8
FF20 E7
FF21 F7
FF22 E8
FF23 E7

36LC7.2E LA 6.

FF24 C10
FF25 F8
FF26 E7
FF27 F8
FF28 E7
FF29 E7
FF30 E7
FG10 B10
FG11 B10
FG12 B10
FG13 D10
FG14 C10
FG15 B10
FG16 B10
FG17 C10
FG18 B10
FG19 C10

FG20 C10
FG21 C10
FG24 C9
FG25 C9
FG26 C10
FG27 C9
FG28 C9
FG29 C8
FG30 B9
FG31 B10
FG32 C10
FG33 B10
FG34 C10
FG35 C10
FG36 C10
FG37 B9
FG39 C9

FG40 C9
FG41 C9
FG42 C10
FH00 B9
FH01 D9
FH02 B10
FH03 B10
FH04 B10
FH05 D10
FH06 D9
FH07 C8
FH08 D10
FJ01 D9
FJ02 F9
FJ22 C9
FJ23 C9
FJ24 F9

FJ25 F9
FJ26 C8
FJ27 C9
FK01 F9
FK02 F10
FK05 D8
FK06 E9
FK10 E9
FK11 E9
FK12 D9
FK13 E9
FK14 E9
FK15 E9
FK16 D9
FK17 E9
FK18 E9
FK19 E9

FK20 D9
FK21 E9
FK22 E9
FK23 E9
FK24 D9
FK25 E9
FK26 E9
FK27 E9
FK28 D9
FK29 E9
FK30 E9
FK31 E9
FK32 E9
FK33 E9
FK34 D9
FK35 E9
FK36 E9

FK37 E9
FK38 D9
FK39 E9
FK40 E9
FK41 E8
FK42 D9
FK43 E9
FK44 E8
FK45 E8
FK46 D8
FK47 E8
FK48 E8
FK49 E8
FK50 D8
FK51 E8
FK52 E8
FK53 E8

FK54 D8
FK55 E8
FK56 E8
FK57 E8
FK58 D8
FK59 E8
FK60 E8
FK61 E8
FK62 E10
FK63 E8
FK67 E10
FK68 E10
FK69 E10
FK70 D10
FK71 E10
FK72 E10
FK73 E9

FK74 D9
FK75 E9
FK80 D10
FK81 F10
FK82 F9
FK83 D9
FK84 F9
FL20 A2
FL21 A2
FL22 A2
FL23 A2
FL24 A2
FL25 A2
FL26 A2
I110 E5
I111 E7
I112 E5

I114 E5
I118 E5
I120 E5
I121 E7
I122 F6
I123 E6
I124 D5
I125 D5
I126 D5
I127 D5
I128 D5
I129 D5
I130 D5
I131 D5
I133 D5
I135 D5
I136 D4

I137 E6
I138 D5
I139 D5
I141 D6
I142 D5
I143 D5
I144 D5
I145 E6
I146 D6
I147 E6
I210 B5
I211 A5
I213 D6
I214 C4
I215 A5
I216 A5
I217 D5

I218 D5
I220 A5
I224 A5
I225 A5
I230 C4
I231 B5
I232 C4
I233 C4
I236 A3
I238 C4
I239 C5
I240 C4
I241 B5
I242 D5
I243 D4
I244 C4
I245 D5

I246 C4
I247 C4
I248 D4
I249 C4
I250 D5
I251 C4
I252 D4
I253 D4
I254 C4
I255 B4
I256 B4
I257 D4
I258 D4
I259 C4
I260 D4
I261 C4
I262 C4

I263 C4
I264 D5
I265 D3
I266 D3
I267 D3
I268 D4
I269 D4
I270 D4
I271 D4
I311 A4
I312 A4
I313 A4
I314 A4
I315 A4
I317 A4
I318 A5
I320 A4

G_16860_018.eps

I321 B3
I322 B3
I323 A3
I326 A5
I328 A3
I329 A3
I330 A4
I331 A4
I332 A3
I333 A4
I334 A4
I335 B4
I336 A4
I337 A4
I338 A4
I339 D3
I341 B5

240107

I342 B4
I344 B4
I345 C8
I347 B4
I349 B4
I351 B5
I352 A4
I353 A4
I354 B5
I357 A5
I359 B5
I362 A4
I363 B4
I364 A4
I365 B4
I366 B4
I367 B4
I368 B4
I369 B4
I370 B4
I373 A3
I374 A3
I376 A3
I380 A4
I382 B4
I383 B4
I384 B4
I387 B5
I388 F7
I389 A5
I390 A5
I391 B5
I392 B5
I393 A4
I394 A4
I395 A4
I396 B5
I397 A5
I398 B4
I399 D3
I412 C3
I413 C3
I414 B3
I415 B3
I416 B3
I417 B3
I418 B3
I419 B3
I420 C3
I421 C3
I422 C3
I423 C3
I424 C3
I425 C3
I426 B3
I427 D4
I428 D4
I429 D4
I430 D3
I431 D4
I432 D3
I510 E2
I512 E2
I517 E1
I520 D1
I528 C2
I530 C2
I533 C1
I540 E2
I541 E2
I543 C2
I544 C1
I545 D2
I548 C3
I549 C3
I550 C3
I551 C2
I552 C2
I553 D3
I554 C3
I556 C2
I557 C2
I610 E2
I611 E2
I615 E5
I623 E2
I627 E2
I631 E5
I632 F5
I633 F5
I635 F5
I636 E5
I801 E3
I802 E2
I803 E2
I804 E2
I805 E3
I806 E2
I813 E3
I814 E4
I820 E4
I821 E4
I822 E4
I823 E4
I828 F3

I831 F4
I833 F3
I840 E3
I841 E3
I842 E3
I843 E3
I844 E4
I845 E4
I846 E3
I847 E3
I848 E3
I850 F3
I851 E3
I852 F4
I853 E4
I854 E4
I855 F3
I856 E3
I857 E3
I858 E4
I861 F3
I862 E3
I863 F2
I864 E3
I865 E3
I866 E3
I901 B2
I902 B2
I903 B2
I904 B2
I905 B2
I911 B1
I912 E1
I913 C1
I914 B1
I915 C1
I916 B1
I917 B1
I918 C1
I919 E2
I920 E1
I921 E2
I922 E1
I923 C1
I924 B2
IA01 A2
IA02 A2
IA03 A2
IA04 A2
IA05 A3
IA06 A3
IA07 A2
IA09 B2
IA10 B3
IA11 B3
IA12 B3
IA13 B2
IA14 A2
IA15 A2
IA16 B2
IA17 A1
IA18 A2
IA19 B2
IA20 B2
IA21 A2
IA22 B2
IA23 A2
IA24 A2
IA25 A2
IA26 A2
IA27 A2
IA29 A2
IA30 A2
IA31 A2
IA33 A3
IA34 A2
IA35 A2
IA36 A2
IA37 A1
IA38 B2
IA39 B2
IA40 A2
IA41 A3
IB10 A8
IB11 B8
IB12 A8
IB13 A8
IB14 B6
IB15 B6
IB17 A8
IB18 A6
IB19 A8
IB20 B8
IF10 F7
IF11 C9
IF12 F7
IF13 F8
IF14 E7
IF15 E7
IF16 E8
IF17 E7
IF18 E8
IF19 F8
IF20 F9
IF21 F8

IF22 F8
IF23 F9
IF24 F8
IF25 F8
IF26 F8
IF27 F9
IF28 F8
IF29 F8
IF30 F8
IF31 E8
IF32 E7
IG13 C9
IG14 C9
IG15 C10
IG16 C10
IG17 C10
IG18 B10
IG19 C10
IG20 B10
IG21 B10
IH04 C10
IH06 D10
IH07 D9
IJ01 D8
IJ02 D8
IJ11 B9
IJ63 C9
IJ64 C9
IJ65 C9
IJ66 C9
IJ67 F9
IJ68 F9
IK68 E9
IK69 F9
IK70 F9
IK72 E9
IK73 E9
IK75 C9
IK76 F9
IK84 F8
IK85 F9
IL20 A2
IL21 A3
IL22 A2
IL23 A2

I2C IC’s Overview

I²C

MICROPROCESSOR

B04A

Block Diagrams, Test Point Overviews, and Waveforms

+3V3_STBY

+3V3_SW

B03D

DVB-MOJO

B06C

HDMI

37LC7.2E LA 6.

AUDIO PROCESSOR

B04C

VIDEOPROCESSOR

B04B

TUNER IF & DEMODULATOR

B03A

SDA2

7311

M30300SAGP

MICRO

PROCESSOR

TXD1

RXD1

SCL2

3382

28
27

29

30

3378

IIC_SDA_up
IIC_SCL_up

PROT

04

(NOT STUFFED)

DEVELOPMENT

3357

56

M24C64
EEPROM

(NVM)

1G01

ONLY FOR

3379

3355

7315

ERR

06

+3V3_STBY

3L07

1
7
9
2
5

+3V3_STBY

3377

3L06

7320

3343

3345

3L09

3L08

(FOR DEVELOPMENT ONLY)

4G01

4G02

4G03

VIDEO PROCESSOR

B04B

7321

1314

1

3

2

COMPAIR

SERVICE

CONNECTOR

1311

1

3

2

UART

CONNECTOR

MOJO_TRST

MOJO_TMS

MOJO_TCK

MOJO_TDI

STV_TDI

JTAG_TCK

JTAG_TRST

JTAG_TMS

10046_TDO

3388

3305

2
1

3

208
207

F3

3G46

3G47

9 8

7G00

PNX8314HS

MOJO

ERR

12

LVD S IN

7
6

185

15

14

1

18 2

19

1

18 2

19

2x HDMI

CONNECTOR

3G44
3G43

TXD0

RXD0

1810

1811

PROT

+5V_SW

16
15

16
15

56

M24C02

EEPROM

I2C_LOCAL_SDA

I2C_LOCAL_SCL

13

user_EEPROM_WP

B03F

4J14

4J15

F5

IIC_SDA

IIC_SCL

DOC_SDAA
DOC_SCLA

DOC_SDAB
DOC_SCLB

7850

DVB-MOJO ANALOG
BACK END

SUPPLY IN

56

M24C02

EEPROM

1J14

1

3

2

UART CON FOR
COMPAIR ONLY

7811

+3V3_SW

7851-7852

7812-7813

DVB-MOJO MEMORY

B03E

3897

31

SII9025CTU

32

29
30

27 28

7817

HDMI

CONTROL

+5V_SW

3H13

3H10

+5V_SW

F1

3H09

56

3H13

7H03

M24C64

7

EEPROM

8Kx8

OCM ON CHIP MICROCONTROLLER

ERR

11

3896

3H12

3411

MSP4450P

PROCESSOR

DVB-COMMON INTERFACE

B03C

3K00

3K01

30 31

7K00

STV0700L

PCMCIA

CONTROLLER

3410

3 2

7411

SOUND

ERR

09

STV_TDO

STV_TDI

JTAG_TCK
JTAG_TRST
JTAG_TMS

B03D

7204
IS42S16400D

DRAM

1Mx16x4

ERR

10

7205
IS42S16400D

DRAM

1Mx16x4

ERR

14

DVB-DEMODULATOR

B03B

3F40

8 6

7F01

TDA10046AHT

COFDM

CHANNEL

DECODER

3F44

3215

58 57

7202

SVP CX32-LF

VIDEO

PROCESSOR

ERR

05

+5V_SW

3F41

4

3

10046_TDO
JTAG_TCK
JTAG_TRST
JTAG_TMS

B03D

B03D

3212

3F42

I2C_TDA_SDA

I2C_TDA_SCL

B04A

DVB_SW

3128

3129

10 11

7113

TDA9886T/V4

DEMODULATOR

ERR

08

7111
74HCT4053D

1

3

2
5

11

15
4

3120

3121

54

1101

TD1316AF/IHP

TUNER

ERR

07

RXD0

TXD0

3354

33
34

3356

BOLT_ON_SDA
BOLT_ON_SCL

3352

3351

3247
3246

(ONLY FOR 1080P)

1G51 1G51

29 4
27 2

(LVDS CONNECTOR)

F6

MAIN_SDA
MAIN_SCL

DDR SDRAM

7601
K4D263238I

(ONLY FOR 1080P)

SDRAM

1Mx32x4

DATA

ADDR

3543

3542

N1 N2

7101

GM1601-LF

DISPLAY

PERFECTION

+3V3_STBY

M2

M1

3112
3113

3377

3379

1101

2
1
2

GROBE UART

(ONLY FOR 1080P)(ONLY FOR 1080P)(ONLY FOR 1080P)

G_16860_039.eps

230207

Block Diagrams, Test Point Overviews, and Waveforms

Supply Lines Overview

SUPPLY LINES OVERVIEW

DC-DC

B02

CN6
X406

1P11

77

88

CN7
X412

1CO1

11
22
44
55

66
77

88

99

B04A

SUPPLY

5B01

7B01

DOWN

X405

1

TO 1710

F7

2

1080P

STANDBY

STEP

REG.

7

3B13

7B02

IN OUT

7B04

IN OUT

7B06

IN OUT

7B08

IN OUT

7B03

13

COM

COM

COM

COM

4C57÷4C60

RES

7B05

5B06

5B03 5B02

+5V_STANDBY

+12V_DISP

-AUDIO_POWER

+AUDIO_POWER

+5V_STANDBY

+5V_SW

+3V3_STBY

+5V_SW

ONLY FOR LCD

+3V3_SW

+3V3_MOJO

+1V2_MOJO

6B03

+VTUN

(34V)

+1V8S_SW

B04b,c

B07
B07
B04a,B06d

B04a

B03a,b,c,e,
B04c,
B06a,b,c,d

B03a,f,B04a,b,
B06c

B03f

B03d

B03a

B03b,B04b

B02

B02

B02

B02

B02

B03f

B02

B03f

B02

B02

B03f

B03f

B03f

B02

B02

TUNER IF & DEMODULATOR

B03A

+3V3_SW+3V3_SW

+5V_SW +5V_SW

3133

3134

+VTUN +VTUN

+12V_DISP +12V_DISP

DVB-DEMODULATOR

B03B

+1V8S_SW +1V8S_SW

+3V3 +3V3

5F10

+5V_SW +5V_SW

DVB-COMMON INTERFACE

B03C

+3V3 +3V3

5K03

5K04

5K05

+5V_SW +5V_SW

B03D

+1V2_MOJO +1V2_MOJO

+3V3

+3V3clean

B03E

+3V3

+5V_SW +5V_SW

B03F

+3V3_MOJO

+1V8S_SW

7K05

IN OUT

COM

DVB-MOJO

5G04

DVB-MOJO MEMORY

5H02

DVB-MOJO ANALOF BACK END

5JO1

IJ01
CONTROL

5114

5115

ONLY FOR ANALOG TV

5K01

5K02

7J04

+5VS

+5V_IF

+3V3FE

+3V3_STV

+3V3_CORE

+3V3_BUF

PCMCIA_5V

PCMCIA_AVCC

PCMCIA_VPP

+3V3

+3V3_VDDP

+3V3clean

+3V3

+3V3_NOR48

+3V3_MOJO

+3V3clean

+3V3

B02

B02

B02

B02

B02

B02

B02

B02

B02

B02

38LC7.2E LA 6.

B03d

B03b,c,d

MICROPROCESSOR

B04A

+3V3_STBY

+3V3_SW

+5V_STANDBY

VIDEO PROCESSOR

B04B

+1V8S_SW +1V8S_SW

3244

3248

5224

5226

5220

5222

5225

5227

+3V3_SW+3V3_SW

5219

5223

5218

5221

+12V_DISP +12V_DISP

7210

7208

CONTROL

AUDIO PROCESSOR

B04C

+12V_DISP +12V_DISP

4401

+5V_SW +5V_SW

3402

YPBPR & REAR IO

B06A

+5V_SW +5V_SW

IO - SCART 1 & 2

B06B

+5V_SW +5V_SW

+AUDIO_POWER_+12V_DISP

7410

IN OUT

COM

5401

5402

3L10

CX_AVDD_ADC1

CX_AVDD_ADC2

CX_AVDD_ADC3

CX_AVDD_ADC4

CX_AVDD3_BG_ASS

CX_AVDD3_OUTBUF

CX_AVDD3_ADC1

CX_AVDD3_ADC2

5215
5217

LCD_PWR_ON

+3V3_STBY

+3V3_SW

+5V_STANDBY

5304

CX_PAVDD1

CX_PAVDD2

CX_PDVDD

CX_PAVDD

VDISP

ONLY FOR LCD

+8V

+5V_D

+5V_AUD

B04A

1M20

1G51

IO - SCART 1 & 2

B06B

1G52

41

TO

SUPPLY

1M20

B04A

SSB

TO

DISPLAY

F7

F7

F7

F7

F7

F7

F7

F7

F7

F7

F7

F7

F7

F7

F4

B02

5

IR/LED

B02

B02

B02

B02

B02

B02

1

1080P

F7

F7

F7

F7

F7

F7

1G51

B04B

SSB

F3

+5V_SW +5V_SW

HDMI

B06C

1M20

J

+3V3_SW+3V3_SW

+5V_SW +5V_SW

CONNECTOR-1

CONNECTOR-2

B06D

+3V3_STBY +3V3_STBY

+5V_SW +5V_SW

B07

+AUDIO_POWER +AUDIO_POWER

-AUDIO_POWER -AUDIO_POWER

1G51

F3

F1

+3V3_SW

F2

+3V3_IO

+3V3_SW

F3

+3V3_LVDSA

+3V3_LVDSVCC

+3V3_LVDSD

1G51
40

F4

+VDISP

1810

HDMI

18

1811

HDMI

18

HEADPHONE AMP & MUTING

AUDIO

3A01

5A05

4A01

5A07

RES

3A02

5A06

OCM ON CHIP MICROCONTROLLER

FLASH & NVM

LVD S IN

LVD S OUT

+5VHDMI_A

+5VHDMI_B

VDDA

VDD

+AUDIO_POWER_+12V_DISP

VSSA

VSS

+3V3_SW

(ONLY FOR 1080P)

+3V3_IO

+3V3_SW

(ONLY FOR 1080P)

+3V3_LVDSA

+3V3_LVDSVCC

+3V3_LVDSD

+VDISP

(ONLY FOR 1080P)

+VDISP

(ONLY FOR 1080P)

SUPPLY IN

F5

+1V8_CORE

+1V8_DVI

+1V8_ADC

+3V3_IO

+3V3_ADC

+3V3_SW

+3V3_PLL

+3V3_LVDSA

+3V3_LVDSD

+3V3_LBADC

+3V3_D

VI

LVD S IN

F6

+1V8_CORE

+2V5_DDR_MAL

+3V3_SW

DC POWER SUPPLY

F7

1710

5A07

1

7701-1

7710

11

1M20

5

STEP

DOWN

REG.

J

7

5A07

7701-2

14

5716
5717
5718
5719
5720
5721
5722
5723
5724

7713

IN OUT

COM

7714

IN OUT

COM

IR/LED/LIGHT-SENSOR

+5V_STANDBY +5V_STANDBY

+1V8_CORE

+1V8_DVI

+1V8_ADC

+3V3_IO

+3V3_ADC

+3V3_SW

+3V3_PLL

+3V3_LVDSA

+3V3_LVDSD

+3V3_LBADC

+3V3_DVI

(ONLY FOR 1080P)

+1V8_CORE

+2V5_DDR_MAL

+3V3_SW

(ONLY FOR 1080P)

+12V

+3V3

+3V3_IO

+3V3_LVDSA
+3V3_LVDSD
+3V3_LBADC

+3V3_ADC
+3V3_SW
+3V3_DVI
+3V3_PLL

+3V3_LVDSVCC

+2V5

+2V5_DDR_MAL

5715

+1V8

5712

+1V8_CORE

5713

+1V8_ADC

5714

+1V8_DVI

(ONLY FOR 1080P)

F2,F5
F3,F5
F3,F5
F5
F5

F1,F2,
F5,F6

F5
F5

F3

F6

F5,F6
F5
F5

G_16860_040.eps

090307

Circuit Diagrams and PWB Layouts

7. Circuit Diagrams and PWB Layouts

SSB: DC/DC

39LC7.2E LA 7.

123456789

DC - DC

B02 B02

1n0

A

-AUDIO_POWER

+AUDIO_POWER

+5V_STANDBY

+5V_SW

B

*

LCD

4C55 / 4C56 / 4C61 / 4C62

PDP

4C57 / 4C58 / 4C59 / 4C60

BL_ADJUST
POWER_DOWN

BL_ON_OFF
BACKLIGHT_BOOST

C

D

STANDBY
+5V_STANDBY

+5V_STANDBY

E

STANDBY

F

3139 123 6261.1

0V(5V)

(---V) MEASURED IN STANDBY

+12V_DISP

5B10
5B11

4C55

*

4C56

*

4C61

*

4C62

*

4C57

*

4C58

*

4C59

*

4C60

*

FC26

FC27

FC28

FB34

FC29

2C58

RES

ITV Connector

100n

2B17

ONLY FOR LCD

3B18

6K8

2C55 1n0

GNDSND

22u
22u

5V2

1n0

2C57

RES

4C01

1n0

1
2
3

B3B-PH-SM4-TBT(LF)

6K8

3B17

IB17

10n

2C60

RES

GNDSND

IB18

FB32
FB33

1B11

45

FB15

2B22

2C56

GNDSND

-12V2

+12V2

RES

35V4u7

4

10n

2C61

RES

FB21
FB23
FB25

100n

2C59

32

+5V_STANDBY

2

3

1

SI4423DY

567

1C01
FB22
FB24
FB26
FB28FB27
FB29
FB30

FC25

FB31

B9B-PH-K

1P11

2V9
2V8

1V6

0V(5V)

B8B-PH-K-S

7B02

LD1117DT33C

OUTIN

COM

1

7B05

8

2B24

1
2
3
4
5
6
7
8
9

1
2
3
4
5
6
7
8

+5V_SW

TO / FROM PSU

TO / FROM PSU

16V
47u

2B18

2B25

FB13

10u 16V

100n

+3V3_STBY

Item

+5V_SW

5B01

10u

2B12

GNDDC

EU-LCD

EU-PDP

FB10

L5973D

2

22u

Description

EU iTV - LCD

R)HSIV(50B7

7B01

3

8

Φ

INH

SYNC

GND GND_HS

7

LOC 5MP 8K6 3060 MS TSR71B3
LOC 5MP 8K6 3060 MS TSR81B3

LOC 50R0 .PMUJ 3060 MS TSR55C4
LOC 50R0 .PMUJ 3060 MS TSR65C4
LOC 50R0 .PMUJ 3060 MS TSR75C4
LOC 50R0 .PMUJ 3060 MS TSR85C4
LOC 50R0 .PMUJ 3060 MS TSR95C4
LOC 50R0 .PMUJ 3060 MS TSR06C4
LOC 50R0 .PMUJ 3060 MS TSR16C4
LOC 50R0 .PMUJ 3060 MS TSR26C4

R )00TS( C33TD7111DL MS CI60B7

R )00TS( TD7111DL MS CI80B7

R LOC 02MP 7U4 V53 MS PACLE22B2
R LOC 02MP U01 V61 MS PACLE32B2
R LOC 02MP U01 V61 MS PACLE62B2

VREFVCC

COMP

9

6

OUT

FB

+5V_SW

+5V_SW

+5V_SW

RES
5B05

33u

RES

5B04

7B03
2N7002

GNDTUN

2B21

2B23

2B26

3B12
470R

3B19

100u

FB17

10u

FB19

16V 16V
10u

FB20

16V10u

IB11

10K

5B06

SS24

6B01

68u

1

5

IB12

4

2B14

220p

2B15

22n

IB13

IB19

3B13

3B15

1%1K0

3B14

220R

1K0

4K7

3B11

IB14

7B04

LD1085D2T33

FB16

32

32

32

OUTIN

COM

1

7B06

LD1117DT33C

OUTIN

COM

1

7B08

LD1117DT

OUTIN

COM

1

RES RES

IB15

2B20

5B03

33u

3B10

IB20

2B16

100p

IB10

2B13

6B03BAV99

16V470u

RES

4B01

5B02

10u

2B19

2B10

FB14

22u 35V

FB11

16V

100u

34V

6B02

+3V3_SW

+3V3_MOJO

+1V2_MOJO

10n

BZX384-C33

+1V8S_SW

2B11

+VTUN

G_16860_001.eps

250107

A

B

C

D

E

F

1B11 D2
1C01 A3
1P11 C3
2B10 B8
2B11 B9
2B12 B4
2B13 B8
2B14 B6
2B15 B6
2B16 B7
2B17 D1
2B18 D3
2B19 C8
2B20 D7
2B21 E7
2B22 F2
2B23 E7
2B24 F3
2B25 F3
2B26 F7
2C55 A2
2C56 A2
2C57 B2
2C58 C2
2C59 B2
2C60 A2
2C61 A2
3B10 B7
3B11 C6
3B12 B7
3B13 C6
3B14 C7
3B15 D6
3B17 F2
3B18 F2
3B19 C7
4B01 A8
4C01 C2
4C55 B1
4C56 B1
4C57 B1
4C58 B1
4C59 B1
4C60 B1
4C61 B1
4C62 B1
5B01 A4
5B02 A8
5B03 A8
5B04 C7
5B05 A8
5B06 C7
5B10 A1
5B11 A1
6B01 B7
6B02 C9
6B03 C8
7B01 A5
7B02 D3
7B03 D7
7B04 D6
7B05 F3
7B06 E6
7B08 F6
FB10 A5
FB11 A9
FB13 D4
FB14 C9
FB15 E2
FB16 D6
FB17 D7
FB19 E7
FB20 F7
FB21 A3
FB22 A3
FB23 A3

FB24 A3
FB25 A3
FB26 A3
FB27 A3
FB28 A3
FB29 B3
FB30 B3
FB31 B3
FB32 C2
FB33 C2
FB34 C2
FC25 B3
FC26 C1
FC27 C1
FC28 C1
FC29 C1
IB10 A8
IB11 A7
IB12 B6
IB13 B7
IB14 C6
IB15 C7
IB17 F2
IB18 C2
IB19 B6
IB20 B8

123456789

Circuit Diagrams and PWB Layouts

40LC7.2E LA 7.

SSB: Tuner & Demodulator

12345678910111213

B03A B03A

A

IF_ATV

B

C

D

E

F

G

H

I

SAW_SW

DEMODULATOR

RF_AGC

VIF2
VIF1

SIF2
SIF1

IIC_SCL

IIC_SDA

SIF

TUNER IF & DEMODULATOR

SAW FILTERS

A110

5111
390n

I141

+5VS

I110

5110

8
7

+5V_IF

I120

3122

18K

100R

RES

7113

TDA9886T/V4

2VIF2
1VIF1

24 SIF2
23 SIF1

10n

2138

41114110

2110
220p

5

6

34

1

2

RESERVED

3118

2K2

7109

BC847B

3124

2124

22n

9TOP

14TAGC

TUNER AGC VIF AGC

SUPPLY

AGND

20 Vp

18

**

3113

47R

40.4MHz
Trap

3113/4110 & 2110/4111
at same position

3119

22K

2V
2V

2V
2V

2111

F128

I112

68p

2114

3p3

I124

2125

470n

2126

I126

I127

19VPLL

VAGC 16

VIF-PLL

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

SIF

AGC

NC

13

F111

+5V_IF

3116

6K8

2117

10n

2K2

3117

6103

3123
330R

2123

RC VCO

OUTPUT

I143

1n5

PORTS

3 OP1

1n0

2145

2140

2141

2144 10n

OP2
22

I125

I144

3128

220n

AM-DEMODULATOR

I114

1SS356

1102

15

I

O1

4

GND

OFWK3953M

38M9

1103

I

GND

OFWK9656M

38M9

1104

4M0

7 DGND

11 SCL

10 SDA

I135

I136

O2IGND

O1
O2ISWI

4

2127

12 SIOMAD

3

15

I118

3

DIGITAL VCO CONTROL

MAD

2

I C-BUS TRANSCEIVER

100R

I133

RES

100R3129

RES

A115

A116

5117

RES

A124

A125

5113

RES

22p

0V

15REF

SOUND TRAPS

NARROW-BAND FM-PLL

2V1

1n0

2143

I142

21AFC

AFC DETECTOR

4.5 to 6.5 Mhz

AUDIO PROCESSING

AND SWITCHES

DEMODULATOR

I131

VIF1
VIF2

SIF2
SIF1

4 FMPLL

2V3

2137

10n

2139
390p

I130

F112

2146

3127

5K6

+VTUN

F140

3136

47R

1

330n

I147I146

7133

L78M05CDT

OUTIN

COM

2

3130

1K0

I137

2119
100n

CVBS_RF

2142
10u

3137

50V

47R

I145

3

4V9

2118
10n

I121

I123

+5V_SW

+5V_SW

DVB ONLY

7111
74HCT4053D

14

4V3

15

4

F114

3133

1R0

3134

1R0

RES

3131

4K7

RES

3132

4K7

+5V_IF

VDD

MDX

*

+5V_IF

*

+5V_IF

4X1
4X2

VEEVSS

8

4121

4122

2113

16

G4

10n

1
2

7

RES

7131

BSH111

RES

7132

BSH111

4110
4111
4112
4113
4114
4115

4116
4117
4118
4119
4120
4121
4122
4123
4124

6

13
12
11

1
2

10

3
5
9

*

2148

RES
2151
10u

100n

5112
220R

F133

*

2120

50V

22u

5118

+12V_DISP

1u0

4112

RES

*

2115

F132

1u0

1101

*

RES

2116

15

1

1u0

F116

4114

+12V_DISP

TUNER

TUNER

TD1316AF/IHP-2

SCL4SDA

XTAL_OUT

RF_AGC

+5V

CS3DC_PWR

5

6

2

7

F115

F119

F118

F117

4116

4115

IF_OUT18IF_OUT2

9

F121

F120

4118

4117

IF_AGC

10

11

F123

F122

4119

1314

MTMT

12

IF_OUT3

220R

F134

2147

ONLY FOR ANALOG TV

4113

*

** ****

F126

F127

2122

15p

1V3

1V3

5120 120R

3120 10R

RES

4120

*

I122

4123

*

5121

RES

2121

15p

+5VS

15R

3135

10n

2128

F130

17CVBS

8AUD

I128

5DEEM

I129

6AFD

2133

10n

2136
470n

2V1

7114
BC847B

1V5

I138

3125

I139

3126

150R

180R

2134

4124

*

5116

15p

120R

3121 10R

5u6

15p

2135

RES

5114

10u

5115

10u

ANALOG

2129

22u

2131

22u

3111

2112

10u

Y
Y
Y
Y

Y

Y
Y
Y
Y
Y

4125

*

+3V3_SW

+3V3_SW

2130

10n

2132

22u

5K6

6110

BAS316

2149

2u2

F129

F131

DIGITAL

Y
Y

Y

Y
Y
Y
Y
Y

Y
Y

I111

3139 123 6261.1

12345678910111213

+5V_IF

+5VS

+5V_IF

RF_AGC

3110

8K2

3115

39K

RF_AGC_IBO

WAGC_SW

DVB_SW

IIC_SDA

I2C_TDA_SDA

IIC_SCL

I2C_TDA_SCL

VIM_IBO

IF_AGC_IBO

VIP_IBO

4MHZ_CLK

IF_ATV

G_16860_002.eps

240107

1101 A6

A110 B1

1102 B4

A115 B5

1103 C4

A116 B5

1104 E4

A124 C5

2110 B2

A125 C5

2111 B2

F111 B3
2112 B11
2113 B10
2114 B2
2115 B6
2116 B6
2117 C3
2118 C10
2119 C8
2120 C9
2121 E7
2122 D7
2123 F3
2124 F2
2125 F3
2126 F3
2127 F5
2128 F7
2129 H11
2130 H11
2131 I11
2132 I11
2133 G6
2134 H7
2135 H8
2136 H6
2137 H5
2138 H2
2139 H5
2140 I3
2141 I3
2142 C9
2143 F5
2144 I3
2145 I3
2146 B6
2147 A8
2148 A9
2149 B11
2151 C9
3110 A12
3111 A11
3113 B2
3115 B12
3116 B3
3117 C3
3118 D2
3119 D1
3120 D8
3121 E8
3122 D2
3123 E3
3124 E2
3125 G7
3126 H7
3127 H6
3128 I4
3129 I3
3130 B8
3131 D10
3132 E10
3133 H10
3134 H10
3135 F7
3136 A8
3137 A9
4110 B2
4111 B2
4112 B6
4113 B8
4114 C7
4115 C7
4116 C7
4117 C7
4118 C7
4119 C7
4120 D8
4121 D10
4122 E10
4123 D7
4124 G8
4125 B11
5110 B2
5111 B1
5112 B9
5113 C5
5114 H11
5115 H11
5116 G8
5117 B5
5118 A8
5120 D8
5121 E8
6103 C3
6110 A11
7109 D2
7111 B10
7113 F2
7114 G7
7131 D11
7132 E11
7133 A8

F112 B6

F114 H10

F115 B7

F116 B7

F117 B7

F118 B7

F119 B7

F120 B7

F121 B7

F122 B7

F123 B7

F126 C7

F127 C7

F128 F2

F129 H11

F130 G6

F131 H11

F132 B6

F133 B9

F134 A8

F140 G8

I110 B2

I111 A12

I112 B3

I114 C4

I118 C4

I120 D2

I121 D10

I122 D7

I123 E10

I124 E3

I125 F4

I126 F3

I127 F3

I128 G6

I129 G6

I130 H6

I131 H5

I133 I4

I135 I4

I136 I4

I137 B8

I138 G7

I139 G7

I141 D1

I142 F5

I143 H3

I144 H4

I145 A9

I146 A8

I147 A8

A

B

C

D

E

F

G

H

I

Circuit Diagrams and PWB Layouts

41LC7.2E LA 7.

SSB: DVB - Demodulator

123456

B03B B03B

DVB - DEMODULATOR

7891011

A

2F10

2F21

2F24

100n

5F10

60R

2F11

47u

5F11

60R

2F18

100n

16V47u

33R45
33R3F31-3 3 6

33R
33R3F32-3 3 6
33R27
33R3F32-1

33R

33R

33R

IF20
IF21
IF22
IF23
IF24
IF25
IF26
IF27

16V

IF28

IF29

IF30

+3V3

+1V8S_SW

TDA_DAT(0)
TDA_DAT(1)
TDA_DAT(2)
TDA_DAT(3)
TDA_DAT(4)
TDA_DAT(5)
TDA_DAT(6)
TDA_DAT(7)

TDA_CLK

TDA_VALID

TDA_SYNC

10046_TDO

STV_TDO

JTAG_TMS

JTAG_TCK

JTAG_TRST

B

C

D

E

F

4MHZ_CLK

RF_AGC_IBO

COMP_OUT

+5V_SW

I2C_TDA_SDA

I2C_TDA_SCL

IF32

+5V_SW

+5V_SW +5V_SW

7F04-1

3F23

2F30

4K7

100n

LM393D

8

1

2V2

4

+5V_SW

7F04-2

8

LM393D

5

6

4

3V3

3V3

2F27

100n

3F24

3

IF18

100K

2

7

RES

4F11

RES

3F223F27

IF14

+5V_SW

3F41 3F42

2K7

680K

100K

+5V_SW

4F12

2F28
100n

2K7

IF_AGC_IBO

VIM_IBO

VIP_IBO

2F33

10p

7F02

74AHC1GU04GW

IF10

3F28 3F29
100K

1V3

3F11
680K

7F03

74AHC1GU04GW

3F15

680K

FF16

FF18
FF20

100K

+3V3

3V2

5

2

1

NC

3

1

+3V3

3V2

5

2

1

NC

1V3

3

1

3F25
100K

2F29

2F31

2F32 100n

COMP_OUT

FE_LOCK

I2C_LOCAL_SDA

I2C_LOCAL_SCL

FF10

4

1V6

220K3F13

FF13

4

1V6

220K3F17

+5V_SW +5V_SW

100n

100n

3F10
330R

3F14
330R

3F19
4K7

3F26

1K0

+3V3FE

IF12

IF11

3F12
330R

390R

3F16

3F20

4K7

4MHz_MOJO

2F26
100n

FF24

3F40

3F44

FF26

FF28

3F48 100R

3F18

10K

FF17

FF19

3F30

33R

3F33

10K

RESET_FE_n

IF16IF15

IF17

FF21

FF22

FF23

IF19

3V2

100R

FF25

100R

FF27

100R3F46

FF29

FF30

IF13

2V8
1V3

1V5

0V7
0V6

2V3

3V2

1V5

4V6

4V6

5V
5V

2F12

2F22

7F01

TDA10046AHT

9

CLR_CLR_

1

AGC_TUNAGC_TUN

AGC_IF2AGC_IF

VIP62VIP

VIM61VIM

XIN54XIN

55

XOUTXOUT

21

GPIO0

GPIO0

23

GPIO1GPIO1

GPIO225GPIO2

26

GPIO3GPIO3

SADDR011SADDR0

10

SADDR1SADDR1

SDA8SDA

6

SCLSCL

4

SDA_TUNSDA_TUN

3

SCL_TUNSCL_TUN

TEST12TEST

+3V3FE

+1V8S_SW

64

60

VDD33_ADCVDD33_ADC

VDDA33_ADCVDDA33_ADC

FF11

2F14
100n

59

53

57

VDDA18_PLL

VDDA18_PLL

VDDA18_OSC

VDDA18_OSC

VDD18_PLL_ADC

VDD18_PLL_ADC

2F15
100n

50

VDDI18_4VDDI18_4

100n

+3V3FE

100n

COFDM

CHANNEL DECODER

I2C

VSSA_OSCVSSA_OSC

VSS_PLL_ADCVSS_PLL_ADC

VSSA_ADCVSSA_ADC

58

63

56

VSS752VSS7

VSS645VSS6

2F16

100n

22

42

VDDI18_2VDDI18_2

VDDI18_3

VDDI18_3

VSS5VSS5

40

VDDI18_1VDDI18_1

VSS4VSS4

29

2F13

VSS324VSS3

FF12

2F19

100n

100n

FF14

475

19

34

VDDE33_2VDDE33_2

VDDE33_3VDDE33_3

VDDE33_1VDDE33_1

TDO20TDO

TDI17TDI

TMSTMS

JTAG

MPEG-TS (SERIAL)

VSS2VSS2

15

TCKTCK

TRST

TRST

ENSERI13ENSERI

S_DOS_DO

S_OCLKS_OCLK

S_DENS_DEN

S_PSYNC

S_PSYNC

MPEG-TS (SERIAL)

S_UNCORS_UNCOR

DO038DO0
DO139DO1
DO241DO2
DO3DO3
DO4DO4
DO5DO5
DO648DO6
DO749DO7

OCLK37OCLK

DEN36DEN

MPEG-TS (PARALLEL)

PSYNC35PSYNC

UNCOR33UNCOR

SACLK51SACLK

VSS1

VSS1

7

+3V3FE

2F17

2F20

100n

100n

2F23
100n

0V

0V
2V4

16

0V

18

14

2V4

32

31

30

28

27

3F31-4

2V2
2V2

3F31-2 33R

2V2

3F31-1 33R

2V2

43

3F32-4 4 5

2V2

44

2V2

46

3F32-2

2V2
2V2

1V7

3F34-1
3F34-2

1V3

3F34-3

0V

0V

IF31

100n

+3V3FE

2F25
100n

3F21

33R

27
18

18

18

27

36

G

3139 123 6261.1

TDA_DAT(0:7)

G_16860_003.eps

240107

A

B

C

D

E

F

G

2F10 B10
2F11 B10
2F12 B7
2F13 B9
2F14 B8
2F15 B8
2F16 B8
2F17 B9
2F18 B10
2F19 B9
2F20 B9
2F21 B10
2F22 C7
2F23 C9
2F24 C10
2F25 C10
2F26 C6
2F27 C2
2F28 D3
2F29 D5
2F30 D1
2F31 D5
2F32 D5
2F33 D4
3F10 B5
3F11 B4
3F12 B6
3F13 B5
3F14 C5
3F15 C4
3F16 C6
3F17 C5
3F18 C6
3F19 C5
3F20 C6
3F21 C10
3F22 D3
3F23 D1
3F24 D2
3F25 D5
3F26 D5
3F27 D3
3F28 D4
3F29 D5
3F30 E6
3F31-1 E9
3F31-2 E9
3F31-3 E9
3F31-4 E9
3F32-1 F9
3F32-2 F9
3F32-3 F9
3F32-4 E9
3F33 E6
3F34-1 F9
3F34-2 F9
3F34-3 F9
3F40 F6
3F41 F3
3F42 F3
3F44 F6
3F46 F6
3F48 F6
4F11 D3
4F12 D3
5F10 A10
5F11 B10
7F01 C7
7F02 B4
7F03 B4
7F04-1 C2
7F04-2 D2
FF10 B5
FF11 B8
FF12 B9
FF13 C5
FF14 C9
FF16 D4
FF17 D6
FF18 D4
FF19 D6
FF20 D4
FF21 D6
FF22 E6
FF23 E6
FF24 E6

FF25 F6
FF26 F6
FF27 F6
FF28 F6
FF29 F6
FF30 F6
IF10 B4
IF11 B6
IF12 C5
IF13 C7
IF14 D3
IF15 D4
IF16 D6
IF17 D6
IF18 D2
IF19 E6
IF20 E10
IF21 E10
IF22 E10
IF23 E10
IF24 E10
IF25 E10
IF26 F10
IF27 F10
IF28 F10
IF29 F10
IF30 F10
IF31 F9
IF32 C1

1234567891011

Circuit Diagrams and PWB Layouts

42LC7.2E LA 7.

SSB: DVB - Common Interface

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

DVB-COMMON INTERFACE

B03C B03C

A

A_MOVAL

A_MDO(0)

47R3K40

3K41 47R

0V0V0V

125

MDOA01MDOA1

MOVALA

MOVAL

MDO053MDO154MDO2

61

2V2

33R

33R

3K03-1

3K02-1

TS_VALID

TS_DATA(0)

PCMCIA_A(10)
PCMCIA_A(11)

PCMCIA_A(9)
PCMCIA_A(8)
PCMCIA_A(13)
PCMCIA_A(14)

PCMCIA_A(12)
PCMCIA_A(7)
PCMCIA_A(6)
PCMCIA_A(5)
PCMCIA_A(4)
PCMCIA_A(3)
PCMCIA_A(2)
PCMCIA_A(1)
PCMCIA_A(0)

33R

33R3K26

33R3K23-4

33R3K23-3
33R
33R

33R3K24-4

33R3K24-3

33R3K24-2 2 7

33R3K24-1 1 8

A_MDO(0:7)

A_MDO(1)

A_MDO(2)

A_MDO(3)

47R3K44

47R3K42

3K43 47R

0V

5

3

MDOA2

MDOA374MDOA476MDOA578MDOA680MDOA7

MDO3

55

56

2V2

2V2

2V2

33R

33R

33R

3K03-4

3K03-3

3K03-2

TS_DATA(3)

TS_DATA(2)

TS_DATA(1)

TS_DATA(0:7)

DATDIR
|DATOE

PCMCIA_D(7)

PCMCIA_D(6)
PCMCIA_D(5)
PCMCIA_D(4)
PCMCIA_D(3)
PCMCIA_D(2)
PCMCIA_D(1)
PCMCIA_D(0)

A_MDO(4)

A_MDO(5)

47R3K46

47R

3K45

0V

0V0V0V

MDO4

MDO558MDO659MDO760

57

2V2

2V2

33R

33R

3K05-2

3K05-1

TS_DATA(5)

TS_DATA(4)

PCMCIA_D(0:7)

A_MDO(6)

A_MDO(7)

47R3K48

3K47 47R

0V

84

TS INTERFACE

2V2

2V2

33R

33R

3K05-3

3K05-4

TS_DATA(7)

TS_DATA(6)

PCMCIA_D(3)
PCMCIA_D(4)
PCMCIA_D(5)
PCMCIA_D(6)
PCMCIA_D(7)
A_|CE1

PCMCIA_|OE

PCMCIA_|WE
A_|RDY|IRQ

PCMCIA_AVCC
PCMCIA_VPP

PCMCIA_D(0)
PCMCIA_D(1)
PCMCIA_D(2)

108

91

MICLKB

A_MIVAL
A_MICLK

104

MIVALB

MISTRTB

MDIB093MDIB195MDIB2

A_|IOIS16

10K

3K08

+3V3_STV

117

126

98

102

106

111

113

MDIB3

MDIB4

MDIB5

MDIB6

115

MDIB7

MOCLKB

MOSTRTB

124

MOVALB

68p PCMCIA

CONNECTOR

1K00-A

1K00-B

ROW_A

ROW_B

GND1

FK80

D3

FK68

D4

FK70

D5

FK72

D6

FK74

D7

FK10

CE1

FK12

A10

FK14

OE

FK16

A11

FK18

A9

FK20

A8

FK22

A13

FK24

A14

FK26

WE|P

FK28

RDY|BSY

FK30

VCC1

FK31

VPP1

A16

FK34

A15
A12

FK38 FK39

A7
A6

FK42 FK43

A5
A4

FK46 FK47

A3
A2

FK50 FK51

A1
A0

FK54 FK55

D0
D1

FK58 FK59

D2

FK60

WP|IOIS16

GND2

FK63

4K7

3K51

GND3

35

1

CD1

36

2

D11

37

3

D12

38

4

D13

5

39

D14

6

40

D15

7

41

CE2

42

8

VS1

9

43

IORD

44

10

IOWR

11

45

A17

12

46

A18

47

13

A19

48

14

A20

49

15

A21

16

50

VCC2

17

51

VPP2

18

52

A22

53

19

A23

54

20

A24

55

21

A25

22

56

VS2

57

23

RESET

24

58

WAIT

59

25

INPACK

60

26

REG

27

61

BVD2|SPKR

62

28

BVD1|STSCHG

63

29

D8

30

64

D9

65

31

D10

66

32

CD2

67

33

GND4

68

34

6970

7172

128

MDOB0

EMC

EMC

2

IK84

2K17 2K16

FK62

PCMCIA_5V

4

MDOB2

MDOB373MDOB475MDOB577MDOB679MDOB7

MDOB1

+5V_SW

7K04
OC
27M

4

VDD

1

GND

2

47n

47n

A_MDO(0:7)

FK67
FK69
FK71
FK73
FK75
FK11
FK13
FK15
FK17
FK19
FK21
FK23
FK25
FK27
FK29

PCMCIA_AVCC

FK33FK32
FK35
FK37FK36

FK41FK40
FK45FK44
FK49FK48
FK53FK52
FK57FK56
FK61

+3V3_STV

3K19
3K21

3K20
3K18
3K15
3K16
3K17
3K22

3

FK05

A_MDO(3)

A_MDO(4)

A_MDO(5)

A_MDO(6)

PCMCIA_VPP

A_|INPACK

3K07

83

+3V3_STV

2K14

+3V3_STV

A_MDO(7)

A_|VS1

10K

+3V3_STV

+3V3_STV

10K
10K

10K
10K
10K
10K
10K
10K

3K09

3K06

2V5

1n0

3K04

10K

A_|CD1

A_|CD2

3V2

3V2
72

CD1A_

CD2A_7CD2B_

RESET

CLK

34

35

0V

FK01

FK02

10K

RESET_STV

A_MDO(0)

10K

IK68

INTERRUPTS

EXTINT
12

3V2

A_MDO(1)

A_MDO(2)

IK69

3V2

3V2

101

71

6

CD1B_

MANAGEMENT

INT
14

3V2

+3V3_STV

STV_INT

A_MDI(0)

A_MDI(1)
A_MDI(2)
A_MDI(3)

A_MDI(4)
A_MDI(5)
A_MDI(6)
A_MDI(7)

A_|RDY|IRQ

IK73

5V

5V

100

RDY|IRQA_

RDY|IRQB_

3K12

10K

PCMCIA_|IORD

PCMCIA_|IOWR

A_MDI(0:7)

PCMCIA_|REG

A_RESET

0V

120

119

RSTA

RSTB

WR|STR

RD|DIR

16

17

3V2

3V2

MIU_WEN

MIU_OEN

A_|CD1

A_|CE2

A_MISTRT

A_MOCLK

A_RESET

A_|WAIT

A_MOVAL

A_MOSTRT

A_|CD2

A_|WAIT

5V

122

WAITA_

CS
18

3V2

IK75

MIU_RDY

STV_CS

IK76

5V

121

WAITB_

WAIT|ACK

15

3V2

PCMCIA_|OE

PCMCIA_|WE

PCMCIA_|REG

PCMCIA_|IORD

PCMCIA_|IOWR

3V2

3V2

123

REG_

A1519A1620A1721A1822A1923A20

0V

MIU_ADDR(15)

3V2

3V2

97

89

90

WE_

IORD_

IOW_R

UCSG

0V

3V2

3V2

MIU_ADDR(16)

MIU_ADDR(17)

MIU_ADDR(18)

MIU_ADDR(0:24)

3V2

88

OE_

3V2

MIU_ADDR(19)

A_|CE1

A_|CE2

3V2

3V2

85

CE1A_82CE1B_81CE2A_87CE2B_

A2125A2226A2327A2428A25

24

3V2

3V2

0V0V0V

MIU_ADDR(21)

MIU_ADDR(22)

MIU_ADDR(23)

MIU_ADDR(20)

VCCEN

70

VCCEN

MIU_ADDR(24)

|DATOE

0V0V0V

68

69

DATOE_

29

0V

STV_A25

DATDIR

67

DATDIR

EXTCS

13

|ADOE

0V

ADOE_

ADLE

0V

66

ADLE

GND-DVB2

GND-PROC

GND-TSO

GND-TSI

GND-CORE

VCC-PROC

VCC-TSO

VCC-TSI

VCC-CORE

PCMCIA_5V

86

9
52
39

37

109

64
51

36

VCCEN

PCMCIA_5V

PCMCIA_5V

+3V3

+3V3

+3V3

+3V3_STV

+3V3_CORE

+3V3_STV

FK06

2K07

5K01

5K02

5K03

5K04

5K05

CURRENT

SWITCH

100n

100n

100n

ST890C

FAULT_

4

2K09

7K05

GND

100n

ON_

IN1
IN2

2K10

FK81

100n

FK82

FK83

3V2

1
2
8
3

3K11

0V

PCMCIA_AVCC

PCMCIA_VPP

+3V3_STV

+3V3_CORE

+3V3_BUF

5V

IK72

10K

3K10

FK84

7

5V

OUT1

6

OUT2

IK70

5

SET

0V
1%

3K13

10u

2K0

60R

100n

2K05

60R

100n

2K02

2K03

60R

60R

60R

2K06

2K11

2K13

2K08

10u 16V

16V

2K12

10u

10u 16V

G_16860_004.eps

9 10111213141516

B

C

STV_TDO
JTAG_TRST

D

STV_TDI

JTAG_TMS
JTAG_TCK

E

F

G

MIU_ADDR(0:24)

H

I

J

K

3139 123 6261.1

12345678

PCMCIA

CONTROLLER

10

TDO

8

TRST_

2

38
65
11

7K00

STV0700L

MIU_ADDR(7)
MIU_ADDR(6)
MIU_ADDR(5)
MIU_ADDR(4)
MIU_ADDR(3)
MIU_ADDR(2)
MIU_ADDR(1)
MIU_ADDR(0)

MIU_ADDR(8)
MIU_ADDR(9)
MIU_ADDR(10)
MIU_ADDR(11)
MIU_ADDR(12)
MIU_ADDR(13)
MIU_ADDR(14)

TDI
TMS
TCK

|ADOE
ADLE

SA0
32

I C

INTERFACE

SA1

SCL

33

31

4V6

100R

3K00

I2C_LOCAL_SCL

3K50

BUS TRANSCEIVER

MIU_DATA(0:15)

MIU_DATA(7)
MIU_DATA(6)

MIU_DATA(5)
MIU_DATA(4)
MIU_DATA(3)
MIU_DATA(2)
MIU_DATA(1)
MIU_DATA(0)

A_MICLK

A_MISTRT

47R3K28

3K27 47R

0V

0V

92

110

MISTRTA

MISTRT

MICLK MICLKA

SDA

49

50

30

1V60V2V2

4V6

100R

3K01

TDA_SYNC

TDA_CLK

I2C_LOCAL_SDA

LATCH

74LVC573ADB

33R3K49

0V

3V2

33R

0V
3V2
3V2
3V2
3V2
0V

3V2
3V2

LATCH

74LVC573ADB

0V

0V

3V2

0V
0V

3V2

0V

3V2

2K04
100n

7K03

74LVC245A

0V
0V

0V
0V
0V
0V
0V
0V

A_MIVAL

3K29 47R

0V

105

MIVALA

MIVAL

48

TDA_VALID

7K01

OE_1

11

2D0
3D1
4D2
5D3
6D4
7

D5
8D6
9D7

7K02

1 OE_

11

2D0

D13
4D2
5D3
6D4
7D5
8D6
9D7

18
17

16
15
14
13
12
11

A_MDI(0)

A_MDI(1)

47R3K31

47R3K30

0V

94

96

MDIA0

MDIA1

MDI0

MDI1

40

41

2V2

2V2

TDA_DAT(0)

TDA_DAT(1)

+3V3_BUF

20

EN

VCC

C1

1D

GND

10

+3V3_BUF

20

EN

VCC

C1

1D

GND

10

+3V3_BUF

3V2

VCC

1

GND

10

A_MDI(0:7)

A_MDI(2)

A_MDI(3)

47R

47R3K32

1

8

3K33 47R

3K34-1

0V

0V0V0V

99

103

107

MDIA3

MDIA4

MDIA2

MDI2

MDI3

MDI444MDI545MDI646MDI747

42

43

2V2

2V2

2V2

TDA_DAT(2)

TDA_DAT(3)

TDA_DAT(0:7)

19Q0
18Q1
17Q2
16Q3
15Q4
14Q5
13Q6
12Q7

Q0 19

18Q1
17

Q2
Q3 16

15Q4
14Q5
13Q6
12Q7

20

3EN1
3EN2

G3

2

A_MDI(4)

A_MDI(5)

47R3K34-3

47R
2

7

6

3K34-2

0V

0V

112

114

MDIA5

MDIA6

2V2

1V3

TDA_DAT(4)

TDA_DAT(5)

2K00
100n

0V
3V2
3V2
3V2
3V2

0V

3V2
3V2

2K01
100n

0V
3V2
0V
0V
3V2
0V
3V2

0V

1

19

0V

2

0V
0V

3

0V

4

0V

5

0V

6

0V

7

0V

8
9

0V

A_MOCLK

A_MOSTRT

A_MDI(6)

A_MDI(7)

47R3K34-4

47R

4K7

453

3K52

3K38

3K39 47R

IK85

2V8

0V

0V

118

127

116

MDIA7

MOCLKA

MOSTRTA

MOSTRT

MOCLK
63

62

2V2

1V50V1V3

33R

33R

TDA_DAT(6)

TDA_DAT(7)

3K02-3

3K02-2

TS_SYNC

TS_CLK

PCMCIA_A(0:14)

PCMCIA_A(7)
PCMCIA_A(6)
PCMCIA_A(5)
PCMCIA_A(4)
PCMCIA_A(3)
PCMCIA_A(2)
PCMCIA_A(1)
PCMCIA_A(0)

PCMCIA_A(8)

PCMCIA_A(9)
PCMCIA_A(10)
PCMCIA_A(11)
PCMCIA_A(12)
PCMCIA_A(13)
PCMCIA_A(14)

3K25

2K15 100p

45
36

27

3K23-2

3K23-1 1

8
45
36

10K

+5V_SW

240107

1K00-A H7
1K00-B H8
2K00 H4
2K01 I4
2K02 H15
2K03 H15
2K04 J2
2K05 G15
2K06 H15
2K07 F14
2K08 H15

A

2K09 H15
2K10 H15
2K11 I15
2K12 I15
2K13 I15
2K14 F9
2K15 K4
2K16 F8
2K17 G8
3K00 F2
3K01 F2
3K02-1 F4

B

3K02-2 F4
3K02-3 F4
3K03-1 F5
3K03-2 F5
3K03-3 F5
3K03-4 F5
3K04 H9
3K05-1 F5
3K05-2 F5
3K05-3 F5
3K05-4 F6

C

3K06 J9
3K07 J9
3K08 J6
3K09 F9
3K10 E14
3K11 F16
3K12 F10
3K13 F14
3K15 B9
3K16 B9
3K17 B9
3K18 B9

D

3K19 B9
3K20 B9
3K21 B9
3K22 B9
3K23-1 K4
3K23-2 K4
3K23-3 K4
3K23-4 K4
3K24-1 K4
3K24-2 K4
3K24-3 K4
3K24-4 K4

E

3K25 J4
3K26 K4
3K27 B2
3K28 B2
3K29 B3
3K30 B3
3K31 B3
3K32 B3
3K33 B3
3K34-1 B3
3K34-2 C3

F

3K34-3 C4
3K34-4 C4
3K38 B4
3K39 B4
3K40 B4
3K41 B5
3K42 B5
3K43 B5
3K44 B5
3K45 B5
3K46 B5
3K47 B5

G

3K48 B6
3K49 H2
3K50 H2
3K51 J6
3K52 B4
5K01 G14
5K02 H14
5K03 H14
5K04 I14
5K05 I14
7K00 E1
7K01 H3

H

7K02 I3
7K03 J3
7K04 F8
7K05 E1
FK01 E9
FK02 E10
FK05 F9
FK06 F14
FK10 H7
FK11 H8
FK12 H7

I

FK13 H8
FK14 H7
FK15 H8
FK16 H7
FK17 H8
FK18 I7
FK19 I8
FK20 I7
FK21 I8
FK22 I7
FK23 I8
FK24 I7

J

FK25 I8
FK26 I7
FK27 I8
FK28 I7
FK29 I8
FK30 I7
FK31 I7
FK32 I7
FK33 I8
FK34 I7
FK35 I8
FK36 I7

K

FK37 I8
FK38 I7
FK39 I8
FK40 I7
FK41 I8
FK42 I7
FK43 I8
FK44 J7

FK45 J8
FK46 J7
FK47 J8
FK48 J7
FK49 J8
FK50 J7
FK51 J8
FK52 J7
FK53 J8
FK54 J7
FK55 J8
FK56 J7
FK57 J8
FK58 J7
FK59 J8
FK60 J7
FK61 J8
FK62 J8
FK63 J7
FK67 H8
FK68 H7
FK69 H8
FK70 H7
FK71 H8
FK72 H7
FK73 H8
FK74 H7
FK75 H8
FK80 H7
FK81 H15
FK82 I15
FK83 I15
FK84 E15
IK68 C10
IK69 C10
IK70 F15
IK72 F16
IK73 C10
IK75 F11
IK76 C11
IK84 F8
IK85 C4

5

Circuit Diagrams and PWB Layouts

43LC7.2E LA 7.

SSB: DVB - Mojo

1234567891011121314

10K

3G38

B03D B03D

DVB-MOJO

A

RES

RES

+3V3

3G18
3G19

3G15

3G16
3G17

10K
10K

10K
10K
10K

3G20 10K
MIU_WEN
NOR_RYBY

RES
RES

4G09
4G10

MOJO_TRST
MOJO_TDI
10046_TDO
MOJO_TMS
MOJO_TCK

RESET_n

FG10

FG11
FG12
FG14
FG15

FG16
FG40
FG41

ROW_1
1G01-1

FTSH

ROW_2
1G01-2

FG13

21

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

FTSH

FOR DVE. ONLY

B

C

D

E

F

G

H

I

4MHZ_MOJO

+3V3

TS_DATA(0:7)

TS_DATA(0)
TS_DATA(1)
TS_DATA(2)
TS_DATA(3)
TS_DATA(4)
TS_DATA(5)
TS_DATA(6)
TS_DATA(7)

MOJO_I2S_OUT_SD
MOJO_I2S_OUT_SCK
MOJO_I2S_OUT_WS

I2C_LOCAL_SCL
I2C_LOCAL_SDA
IIC_SCL
IIC_SDA

RESET_n

3V3

FG42

RES

RES

1
2
3
4
5

BM05B-SRSS-TBT

PRO. FOR USB

2G34

1G04

67

RES
7G06
NCP303LSN30

2

INP

5

CD

33n

IG14

IG15

IG16

RES
3G65

1K0

NC

4

3G35 22R

3G34

3G33 22R

POWER ON RESET

1

OUTP

GND

3V3

3

4

12

SKQTLB

1G03

3

RES

FOR DEV. ONLY

2V2

20

0

2V2

21

1

2V2

22

2

2V2

23

3

22R

24
25
26
27

FG31
FG33

FG17

FG19

IG18
IG19
IG20

3G44
3G46
3G47

TS_DATA

4
5
6
7

202
203
204
206
205

1V6

2V2
2V2
2V2
2V2

USB_OVRCUR

USB_PWR
USB_DM
USB_DP

1V

0V

7G00-2

PNX8314HS

(TS)

SD_OUT

SCK_OUT

WS_OUT

SPDIF

FSCLK

FG32

100R3G43

FG34

100R

FG35

100R

FG36

100R

RESET_n

TS_SYNC

TS_STROBE

TS_VAL

7G00-3

PNX8314HS

(AV)

6
7
8
9
36
198
39

4V6
4V6
3V3
3V3

SCL0

SDA0

SCL1

SDA1

SC0_DA

USB_OVRCUR

SC0_OFF

RES

2G31

+1V2_MOJO

0V

30

1V6

29

1V3

TS_VALID

28

168

CVBS

Y

172

C

CVBS

170

Y

CVBS

163

B

165

G
Y

167

R
C

7G00-6

PNX8314HS

(I2C-USB-SCO)

4G31

TS_SYNC

TS_CLK

0V

C_CVBS

0V
0V

0V

SC0_CMDVCC

USB_PWR

SC0_CCK

SC0_RST

100n

B|Pb

USB_DP

USB_DM

R|Pr

4G01

4G02

4G03

33R

MOJO_TCK

MOJO_TMS

0V

XTAL_IN

158

3V3

RESETN

195 4

3V3

TCK

PCST1

196

MOJO_TRST

0V

3V3

3

2

TMS

TRST

PCST0
12012

0

189

188

197

1

194

FG18

3V2

TDO

DSU_TPC0

SYS_RESETN

5

IG21

10K

3G11

3G48

3V2

208

207

TDI

7G00-8

PNX8314HS

(JTAG-ETAG-SYS)

4G04

4G05

CONFIGURABLE

4G05 FOR DEVELOPMENT ONLY
4G01, 4G02, 4G03,4G04 FOR PRODUCTION

5G03
100MHz

1V2clean

2G32
100n

2G33

10u 16V

FG37

AVSS_PLL

160

1V2

157

AVDD_PLL

XTAL_OUT

DSU_CLK

DSU_TPC1

186

159

187

+3V3_VDDP

+1V2_MOJO

5G01
100MHz

5G02
100MHz

G|Y

37
199
200
201

40

38

2G02 10u16V

FG39

+3V3

2G17 16V10u

1V2_CORE

2G12

16V2G18

2G13

10u

2G14
2G15
2G16
2G03
2G04
2G05
2G06
2G07
2G08

5G04

60R

2G09
2G10

2G22

2G23

10u 16V

2G24

10u

+3V3_VDDP

100n
100n
100n2G11

16V10u

16V

100n
100n
100n
100n
100n

100n
100n
100n
100n
100n
100n

1V2

3V3

41
78
119
134
191
10
43
60
76
94
111
130
161
190

VDDC

VDDP

7G00-1

PNX8314HS

(PWR)

AVDD

IDUMP

VSSC

VSSP

42

79
120
135
192

11

44

61

77

95
112
131
162
193
175

0

169

1

164

2

171

1

166

2

174
173

1V2

2G21 100n

IG13

3G40

+3V3clean

100n2G19
100n2G20

1%
1K2

JTAG_TCK

JTAG_TRST

JTAG_TMS

STV_TDI

10046_TDO

MIU_DATA(0:15)

+3V3_VDDP

3G12

FG26

DSW_n

SDRAM_DATA(0:15)

SDRAM_DATA(0)
SDRAM_DATA(1)
SDRAM_DATA(2)
SDRAM_DATA(3)
SDRAM_DATA(4)
SDRAM_DATA(5)
SDRAM_DATA(6)
SDRAM_DATA(7)
SDRAM_DATA(8)
SDRAM_DATA(9)
SDRAM_DATA(10)
SDRAM_DATA(11)
SDRAM_DATA(12)
SDRAM_DATA(13)
SDRAM_DATA(14)
SDRAM_DATA(15)

RESET_FE_n
RESET_STV
user_EEPROM_WP

FE_LOCK
NOR_RYBY
NOR_WP

10K

STV_INT
STV_A25

RXD0
TXD0

MIU_DATA(0)
MIU_DATA(1)
MIU_DATA(2)
MIU_DATA(3)
MIU_DATA(4)
MIU_DATA(5)
MIU_DATA(6)
MIU_DATA(7)
MIU_DATA(8)
MIU_DATA(9)
MIU_DATA(10)
MIU_DATA(11)
MIU_DATA(12)
MIU_DATA(13)
MIU_DATA(14)
MIU_DATA(15)

3G63 10K

3G57-1
3G57-3

8
6

3G58-3

3G56-3 33R
3G59-1

3G57-2 33R

7

3G58-2
3G58-4
3G56-2
3G56-4

7

3G59-2
3G59-4

MIU_RDY
NOR_CS
STV_CS

3G60

MIU_OEN

3G61

MIU_WEN

3G62

33R

33R

33R

IG17

0V

113

2V6

114

2V6

115

2V6

116

2V6

117

2V6

118

0V

121

2V3

122

2V9

132

2V5

129

0V

128

2V5

127

2V3

126

2V3

125

0V

124

2V3

123

3V3

31

0V

32

4V6

185

33
34

3V3
0V

35

0V

45

0V

46

0V

47

3V3

48
49

0V

12
13

0V

14

0V

15
16

33R18

69

36

67

33R

1

33R3G58-1

65

3

33R

63

18

33R3G56-1

59

36

57

18

33R

55

36

33R3G59-3

53

27

68

45

33R3G57-4

66

2

33R

64

45

33R

62

27

33R

58

45

33R

56

2

33R

54

45

33R

52
109

3V3
3V3

74
73

3V3

72
71

3V3

70
108

3V3

106

0

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V
0V

PNX8314HS

(SDRAM)

SDRAM_DATA

PNX8314HS

IR_IN

IR_OUT

PWM

VS

VPP

C4

C8

SC1_DA

SC1_CMDVCC

SC1_RST

SC1_OFF

SC1_CCK

CTS0

RTS0

RX0

TX0

DCD0

PLL_OUTX0

PIO <0:15>

PNX8314HS

0
1
2
3
4
5
6
7

MIU_DATA

8
9
10
11
12
13
14
15

MIU_RDY

MIU_CS_N0

MIU_CS_N1

MIU_CS_N2

MIU_CS_N3

MIU_OE_N

MIU_WEN

MIU_MASK0

7G00-4

SDRAM_ADDR

7G00-7

(GPIO)

7G00-5

(MIU)

DQM0

DQM1

CAS

RAS

WE

CKE

HSCKB

VCXO_CLOCK

BOOT <0:3>

ITU_OUT

ITU_CLOCK

PIO <16:27>

MIU_ADDR

MIU_MASK1

MIU_LBA

MIU_BAA

MIU_CLK

10

11

12

13

14

DTR0

0V

153

0

0V

154

1

0V

155

2

0V

156

3

0V

149

4

0V

148

5

0V

147

6

0V

146

7

0V

145

8

0V

144

9

0V

152

0V

143

0V

142

0V

150

0V

151

2V1

138

3V1

133

3V

140

2V9

141

3V

139

3V3

137

1V5

136

17

0V

0V

18

RX1

3V3

19

TX1

0V

176

0

177

3V3

1

3V3

178

2

FG28

179

3

180

4

181

3V2

5

182

6

FG30

183

7

0V

184

DSW_I2C_enable

3G54

0V

75

0

80

3V3

1

0V

81

2

82

3V3

3

3V3

83

4

3V3

84

5

3V3

85

6

0V

86

7

0V

87

8

3V3

88

9

0V

89

10

0V

90

11

3V3

91

12

0V

92

13

3V3

93

14

0V

96

15

0V

97

16

3V3

98

17

3V3

99

18

3V3

100

19

3V3

101

20

3V3

102

21

0V

103

22

0V

104

23

0V

105

24

107
110

50
51

3139 123 6261.1

1234567891011121314

SDRAM_ADDR(0:14)

SDRAM_ADDR(0)
SDRAM_ADDR(1)
SDRAM_ADDR(2)
SDRAM_ADDR(3)
SDRAM_ADDR(4)
SDRAM_ADDR(5)
SDRAM_ADDR(6)
SDRAM_ADDR(7)
SDRAM_ADDR(8)

SDRAM_ADDR(9)
SDRAM_ADDR(10)
SDRAM_ADDR(11)
SDRAM_ADDR(12)
SDRAM_ADDR(13)
SDRAM_ADDR(14)

SDRAM_DQM0
SDRAM_DQM1

SDRAM_CAS
SDRAM_RAS

SDRAM_WE
SDRAM_CKE
SDRAM_CLK

FG22
FG23

FG21
FG20

RX_ZAP

TX_ZAP

PIO19|ITU_OUT0|BOOT0
PIO20|ITU_OUT1|BOOT1

PIO21|ITU_OUT2|BOOT2

PIO22|ITU_OUT3|BOOT3

FG29

RES

3G51

10K

10K

RES

3G55

10K

3G41

FG24

FG25

FG27

10K

3G30

3G28

3G29
3G37

MIU_ADDR(0)
MIU_ADDR(1)
MIU_ADDR(2)
MIU_ADDR(3)
MIU_ADDR(4)
MIU_ADDR(5)
MIU_ADDR(6)
MIU_ADDR(7)
MIU_ADDR(8)

MIU_ADDR(9)
MIU_ADDR(10)
MIU_ADDR(11)
MIU_ADDR(12)
MIU_ADDR(13)
MIU_ADDR(14)
MIU_ADDR(15)
MIU_ADDR(16)
MIU_ADDR(17)
MIU_ADDR(18)
MIU_ADDR(19)
MIU_ADDR(20)
MIU_ADDR(21)
MIU_ADDR(22)
MIU_ADDR(23)
MIU_ADDR(24)

10K

10K

+3V3

10K3G31

+3V3

RES

10K3G36
10K

+3V3

RES

10K

IBO_IRQ

+3V3

+3V3

MIU_ADDR(0:24)

G_16860_005.eps

240107

A

B

C

D

E

F

G

H

I

1G01-1 A8
1G01-2 A9
1G03 D2
1G04 I1
2G02 G5
2G03 G6
2G04 G6
2G05 G6
2G06 H6
2G07 H6
2G08 H6
2G09 H6
2G10 H6
2G11 H6
2G12 F6
2G13 G6
2G14 G6
2G15 G6
2G16 G6
2G17 G6
2G18 G6
2G19 H9
2G20 I9
2G21 I9
2G22 H6
2G23 I6
2G24 I6
2G31 B4
2G32 C5
2G33 C5
2G34 D1
3G11 E6
3G12 E9
3G15 A4
3G16 A4
3G17 A4
3G18 A4
3G19 A4
3G20 A4
3G28 E14
3G29 F14
3G30 E14
3G31 E14
3G33 G2
3G34 G2
3G35 F2
3G36 F14
3G37 F14
3G38 A4
3G40 I8
3G41 E14
3G43 H2
3G44 H2
3G46 H2
3G47 I2
3G48 C6
3G51 G13
3G54 G13
3G55 G13
3G56-1 H10
3G56-2 H10
3G56-3 H10
3G56-4 H10
3G57-1 G10
3G57-2 H10
3G57-3 G10
3G57-4 H10
3G58-1 G10
3G58-2 H10
3G58-3 G10
3G58-4 H10
3G59-1 H10
3G59-2 H10
3G59-3 H10
3G59-4 H10
3G60 I11
3G61 I11
3G62 I11
3G63 F10
3G65 C2
4G01 B9
4G02 B9
4G03 B9
4G04 C8
4G05 C8
4G09 A2
4G10 A2
4G31 C4
5G01 F5
5G02 G5
5G03 C4
5G04 I6
7G00-1 F7
7G00-2 E3
7G00-3 F3
7G00-4 A12
7G00-5 G12
7G00-6 H4
7G00-7 D12
7G00-8 D7
7G06 C1
FG10 A7
FG11 A7
FG12 A7
FG13 A9
FG14 A7
FG15 A7
FG16 A7
FG17 H2
FG18 C6
FG19 H2
FG20 E13
FG21 E13
FG22 E13
FG23 E13
FG24 E14
FG25 E14
FG26 E9
FG27 F14
FG28 F13
FG29 F13
FG30 F13
FG31 H2
FG32 H3
FG33 H2
FG34 H3
FG35 H3
FG36 I3
FG37 C5
FG39 F6
FG40 A7

FG41 A7
FG42 C1
IG13 I8
IG14 F1
IG15 G1
IG16 G1
IG17 F11
IG18 F2
IG19 G2
IG20 G2
IG21 E6

Circuit Diagrams and PWB Layouts

44LC7.2E LA 7.

SSB: DVB - Mojo Memory

12345678

B03E B03E

A

B

C

D

E

SDRAM_ADDR(0:14)

SDRAM_ADDR(12)

SDRAM_ADDR(0)
SDRAM_ADDR(1)
SDRAM_ADDR(2)
SDRAM_ADDR(3)
SDRAM_ADDR(4)
SDRAM_ADDR(5)
SDRAM_ADDR(6)
SDRAM_ADDR(7)
SDRAM_ADDR(8)
SDRAM_ADDR(9)
SDRAM_ADDR(10)
SDRAM_ADDR(11)

SDRAM_ADDR(13)
SDRAM_ADDR(14)

SDRAM_CLK
SDRAM_CKE

SDRAM_RAS
SDRAM_CAS
SDRAM_WE

DVB-MOJO MEMORY

+3V3

5H01

100MHz

2H06

7H02

EDS1216AGTA

23

0V

24

0V

25

0V

26

0V

29

0V

30

0V

31

0V

32

0V

33

0V

34

0V

22

0V

35

0V

20

0V

21

0V

38

1V5

37

3V3

19
18

3V

17

3V

16

3V

16V10u

FH07

100n2H09

100n

2H10

11427 3 9

0
1
2
3
4
5

A

6
7
8
9
10
11

0

BA

1

CLK
CKE
CS
RAS
CAS
WE

28 41 54 6 12 46 52

100n

100n

2H08

2H13 100n

VDD VDDQ

VSS

2H03

Φ

SYNC
SDRAM
4x2Mx16

VSSQ

100n2H12

43

D

2H11 100n

49

DQM

NC

MIU_ADDR(0:24)

5H02

+3V3

MIU_ADDR(1)
MIU_ADDR(2)
MIU_ADDR(3)
MIU_ADDR(4)
MIU_ADDR(5)
MIU_ADDR(6)
MIU_ADDR(7)
MIU_ADDR(8)
MIU_ADDR(9)
MIU_ADDR(10)
MIU_ADDR(11)
MIU_ADDR(12)
MIU_ADDR(13)
MIU_ADDR(14)
MIU_ADDR(15)
MIU_ADDR(16)
MIU_ADDR(17)
MIU_ADDR(18)

MIU_ADDR(19)

MIU_ADDR(20)

MIU_ADDR(22)
MIU_ADDR(21)

+3V3_NOR48

NOR_RYBY

0V

36
40

2

1V3

0

4

1V3

1

5

1V

2

7

1V3

3

8

1V3

4

10

1V2

5

11

0V

6

13

1V4

7

42

1V3

8

44

1V3

9

45

1V

10

47

1V4

11

48

1V4

12

50

1V3

13

51

0V7

14

53

1V2

15

15

L

U

3V3

39

2V2

SDRAM_DATA(0:15)

SDRAM_DATA(0)
SDRAM_DATA(1)
SDRAM_DATA(2)
SDRAM_DATA(3)
SDRAM_DATA(4)
SDRAM_DATA(5)
SDRAM_DATA(6)
SDRAM_DATA(7)
SDRAM_DATA(8)

SDRAM_DATA(9)
SDRAM_DATA(10)
SDRAM_DATA(11)
SDRAM_DATA(12)
SDRAM_DATA(13)
SDRAM_DATA(14)
SDRAM_DATA(15)

SDRAM_DQM0
SDRAM_DQM1

RESET_n

MIU_WEN
MIU_OEN

NOR_CS

3H00

MIU_ADDR(20)

+5V_SW

+5V_SW

4H02

4H03

RES

4H01

RES

3H14

1R0

4H003K3

4H04

I2C ADDRESS:A0

5V

IH04

FH05

7H03

M24C64-WMN6

1

2

3

3V2

0V

3V2

3V2
3V2

3V2

0V
0V

3V2

0V
0V

3V2

0V

3V2

0V
0V

3V2

0V
3V2
3V2
3V2

3V2

3V2
3V2
3V2

3V2
3V2

FH01

FH06

+3V3_NOR48

5H03

FH03

100MHz

5V

8

Φ

(8Kx8)

EEPROM

0

ADR

1
2SDA

4

100MHz

M29W320ET70N

25

0

24

1

23

2

22

3

21

4

20

5

19

6

18

7

8

8

7

9

6

10

5

11

4

12

3

13

2

14

1

15

48

16

17

17

16

18

9

19

10

20

15

RB

12

RP

11

WE

28

OE

26

CE

47

BYTE

2H14

220n

WC

SCL

7H00

A

FH08

2H07

37

EPROM

4Mx8/2Mx16

0

32M-1

2/4/8MB

NOR

FLASH

VPP/WP_

27 46

2H15

220n

7

6
5

16V10u

D

2H04

10
11
12
13
14
15

A-1

NC

0
1
2
3
4
5
6
7
8
9

+3V3_NOR48

100n

29
31
33
35
38
40
42
44
30
32
34
36
39
41
43
45

IH07

13

IH06

14

3H11

4V6

FH00

4V6

FH04

4V6

FH02

0V
0V

0V

0V
0V
0V

0V

0V
0V
0V

0V

0V

0V

0V

0V
0V

0V

3V2

+5V_SW

10K

4H12

3H10

100R

3H09
100R

MIU_DATA(0)
MIU_DATA(1)
MIU_DATA(2)
MIU_DATA(3)
MIU_DATA(4)
MIU_DATA(5)
MIU_DATA(6)
MIU_DATA(7)
MIU_DATA(8)

MIU_DATA(9)
MIU_DATA(10)
MIU_DATA(11)
MIU_DATA(12)
MIU_DATA(13)
MIU_DATA(14)
MIU_DATA(15)

MIU_ADDR(22)

4H05

3H05

10K

4H15

RES

3K33H12

3H13 3K3

MIU_DATA(0:15)

+3V3_NOR48

NOR_WP

user_EEPROM_WP

I2C_LOCAL_SCL

I2C_LOCAL_SDA

A

B

C

D

E

2H03 C2
2H04 A7
2H06 B1
2H07 A6
2H08 C2
2H09 C2
2H10 C2
2H11 C2
2H12 C2
2H13 C2
2H14 D6
2H15 D6
3H00 C4
3H05 C7
3H09 E7
3H10 E7
3H11 E7
3H12 E7
3H13 E7
3H14 D5
4H00 C5
4H01 C5
4H02 C5
4H03 C5
4H04 C5
4H05 C7
4H12 E7
4H15 C7
5H01 B1
5H02 A6
5H03 D5
7H00 A6
7H02 C1
7H03 D5
FH00 E7
FH01 D5
FH02 E7
FH03 D6
FH04 E7
FH05 D5
FH06 D5
FH07 B2
FH08 A6
IH04 C5
IH06 C7
IH07 C7

3139 123 6261.1

G_16860_006.eps

240107

12345678

Circuit Diagrams and PWB Layouts

SSB: DVB - Mojo Analog Back End

45LC7.2E LA 7.

123456789

B03F B03F

DVB-MOJO ANALOG BACK END

A

RES

B

C

D

E

C_CVBS

G|Y

B|Pb

R|Pr

IJ63

IJ64

IJ65

IJ66

3J65

3J63

180R

3J59

3J61

180R

2J72

180R

180R

2J69

180p

2J63

2J66

RES

2J71

22p

5J55

3u3

180p

180p

180p

RES

2J68

22p

5J54

3u3

2J60

22p

5J52

3u3

2J64

22p

5J53

3u3

2J73

2J70

68p

2J62

2J67

68p

68p

68p

3J66

3J60

3J62

3J64

47R

47R

47R 47R

RES

RES

RESRES

6J61 6J60

6J63 6J62

PESD5V0S1BA

PESD5V0S1BA PESD5V0S1BA

PESD5V0S1BA

FJ22

FJ23

FJ26

FJ27

IBO_CVBS_IN

IBO_G_IN

IBO_B_IN

IBO_R_IN

+3V3_MOJO

+1V8S_SW

5J01
60R

2J01

2J02

100n

10u 16V

IJ01

3J03

100R

UART CON FOR COMPAIR ONLY

1J14

S3B-PH-SM4-TB

1
2
3

45

FJ02

6J03

1001

1V8

BAS316

1002

7J05
PDTC114ET

6J14

BZX384-C6V8

ESD Protection

3J02

12K

FJ24

FJ25

6J15

3J01

IJ02

4J14

3J14

RES

RES
4J15

BZX384-C6V8

RES

22K

100R

2J15

330p
RES

2J04

100R3J15

IJ11

+3V3_MOJO

22u 16V

1V2

IJ67

IJ68

2J14
330p
RES

7J04

SI2301BDS

2J05

100u 16V

TXD0

RXD0

EMC

2J06

FJ01

100n

3139 123 6261.1

123456789

+3V3clean

+3V3

G_16860_007.eps

240107

A

B

C

D

E

1001 D7
1002 D7
1J14 D6
2J01 B7
2J02 B7
2J04 B8
2J05 C8
2J06 C9
2J14 D8
2J15 D8
2J60 A2
2J62 B3
2J63 B2
2J64 C2
2J66 C2
2J67 C3
2J68 D2
2J69 D2
2J70 D3
2J71 E2
2J72 E2
2J73 E2
3J01 B8
3J02 B8
3J03 B6
3J14 D8
3J15 D8
3J59 B2
3J60 B3
3J61 C2
3J62 C3
3J63 D2
3J64 D3
3J65 E2
3J66 E3
4J14 D8
4J15 D8
5J01 A6
5J52 A2
5J53 C2
5J54 D2
5J55 E2
6J03 C7
6J14 D7
6J15 D8
6J60 B3
6J61 C3
6J62 D3
6J63 E3
7J04 B9
7J05 B7
FJ01 B9
FJ02 D6
FJ22 A4
FJ23 C4
FJ24 D8
FJ25 D8
FJ26 D4
FJ27 E4
IJ01 B7
IJ02 B8
IJ11 A8
IJ63 B1
IJ64 C1
IJ65 C1

IJ66 C1
IJ67 D8
IJ68 D8

Circuit Diagrams and PWB Layouts

46LC7.2E LA 7.

SSB: Micro Processor

1 2 3 4 5 6 7 8 9 10 11 12 13

FL20

FL21

FL22

FL23
FL24
FL25
FL26

3337

100R

16V100n

2320

10K

I318

1
2
3

1305

6313

RES

BZX384-C6V8

FRONT_Y_CVBS_IN

FRONT_C_IN

L_FRONT_IN
R_FRONT_IN

HEAD_PH_L

HEAD_PH_R

7313-2

BC847BPN

5

+12V_DISP

4

RES

I323

3330

10K

I322

I328

7313-1
BC847BPN

6

6303

1

I329

2

+3V3_STBY

7315

8

M24C64-WMN6

Φ

(8Kx8)

EEPROM

0

ADR

1
2S

F382

I373
F383
F384

4

F345

DA

F387

1n0

1n02328

RES

EMC

EMC

2329

BZX384-C6V8

B04A B04A

A

CPU_RST

B

F330

3325

C

MUTEn
CTRL_DISP1_up
CTRL_DISP4_up
BL_ON_OFF
ANTI_PLOP
HDMI_INT

D

E

F

G

H

ESD_INT WAGC_SW
POWER_DOWN

6317

RES

BZX384-C3V3

7317

BC847BW

DC_PROT

7323-2
NL27WZ08USG

CE

100n

2323

NL27WZ08USG

CS
WR

RD

ALE_EMU

IIC_SDA_up
IIC_SCL_up

I

3139 123 6261.1

MICROPROCESSOR

+3V3_STBY

6301 BAS316

10K3335

RES

I393

220n

3395

I394

100R3345

6306

BZX384-C6V8

3319 10K

RES

1K5

3331 10K

3L04

1K5

47K

2317
100n

1302

+3V3_STBY

3316

10K

+3V3_STBY

+3V3_STBY

10K3363

10K

RES

RES

3332

+12V_DISP

6318

PDZ6.2-B

+3V3_STBY

10K

3383

3381

3384

3385
3386 100R
3375

F342

F343

6307

BZX384-C6V8

CNVSS

F380

F381

3399

3V2
7316

BC847BW

1303

2318

3339 100R
3341 100R

F344

S3B-PH-SM4-TB

7312

BD45275G

1

10K

+3V3_STBY

3394

22K

BC847BW

3L15
330R

7323-1

2

SUBERGND

3393

7308

+3V3_STBY

3

7

VDD

I353
I330
I332
I334
I337
I339

I399

I380

5

Φ

1K23300

4323

3

15K

RES

100n

2315

4

VOUT

3V3

+3V3_SW

10K

RES

3333

RES

3334 10K

4324

RES

4325

RES

F379

0V8

2338

3398

100K

5

6

48

1

2

48

+3V3_STBY
+3V3_STBY
+3V3_STBY

3343 100R

15p

2314

15p

2316
3314 10K

3318

3321

RES

100n

AD(0:7)

100R3364
100R3338

100R3340
100R3342

A(0:7)

A(8:19)

22R

3V3

22R

4K73372

47K

4K7

COMPAIR

1314

1
2
3

5

4

M30300SAGP

1V5

1301

1V5

100R

1K0
100R3323

AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)

A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)

A(8)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)

A(16)
A(17)
A(18)
A(19)

7311

10M

I312

I387

I352
I331
I333
I335
I338
F385

F361

I365

I368

I384

13
11
6
7
10
96
86

85
84
83
82
81
80
79

78
77
76
75
74
73
72
71

70
69
68
67
66
65
64
63

61
59
58
57
56
55
54
53

52
51
50
49
48
47
46
45

44
43
42

41
40
39
38
37

+3V3_STBY

2312

100n

14

VCC

IN

XTAL

OUT

BYTE

CNVSS

RESET

VREF

0
1
2
3

DATA

4

6
7

P0<0:7>

AN0<0:7>

8
9
10
11

DATA

12
13
14
15

P1<0:7>

INT<3:5>

0
1
2
3

ADDR

4
5
6
7

D<0:7>

D<0:7>
A<0:7>
AN2<0:7>

P2<0:7>

8
9
10
11

ADDR

12
13
14
15

P3<0:7>

16
17

ADDR

18
19
0
1

CS

2
3

P4<0:7>

WRL
WR
WRH
BHE
RD
BCLK
HLDA
HOLD
ALE
RDY
CLKOUT

P5<0:7>

VSS

12

+3V3_STBY

60R

5301

2313

60

Φ

AVSS

62

+3V3_STBY

100n

97

AVCC

AN

P10<0:7>

KI<0:3>

TBIN<0:4>5

CLK3

SIN3

SOUT3

CLK4
ANEX0
SOUT4
ANEX1

SIN4

ADTRG

P9<0:7>

TA4OUT

TA4IN

INT

XCOUT

XCIN

P8<0:7>

TA0OUT

TXD2

SDA2
TB5IN
TA0IN

RXD2

SCL2

TA1OUT

CLK2

TA1IN

CTS2
RTS2

TA2OUT

TA2IN

TA3OUT

TA3IN

P7<0:7>

CTS0
RTS0
CLK0
SCL1

RXD0

TXD0

SDA0

CTS0
CTS1
RTS1

CLKS1

CLK1
SCL1

RXD1

TXD1

SDA1

P6<0:7>

94

2310

DA0
DA1

ZP

NMI

100n

0
1
2
3
4
5
6
7

100

U

U

0
1
2

V

V
V

W

W

RES

95

I313

93

I314

92

I315

91

I317

90

I395

89
88

F362
I320

87

F386

5

I326

4

I357

3
2

I389

1

I364

99

I336

98

I341

20

I342

19
18

I344

17

I345

16

I396

15

I397

9

I398

8

28

27

26

NC

I351

3361 100R

25

RES FOR PSU_STBY

24

RES

I354

23
22

RES
RES

I359

21

RES

I363

36

35

RES

34
33

I382

32

I383

31

I369

30

I370

29

B10B-PH-SM4-TBT(LF)

+3V3_STBY

10K

10K3312

RES

3311

I311

3313 330R
3315
3317 330R

RES

3322 100R
3303 100R
3L05 100R
3324 330R

RES

3329

IBO_RESET

3380

RES

RES
3344
3346

3347 10K
3348

3350 10K
3397 47K

3387
3388

F305

+3V3_SW

3367

3365

3369 10K

3370

+3V3_STBY

3371

3373 100R

4308

BOOT LOADER
3L08

1312

1
2
3
4
5
6
7
8
9

10

12

11

+3V3_STBY

1K0

3310

100R
100R3320

3327 10K

100R

10K

100R

100R3L26

100R
100R

47R

10K3349

100R
100R

4301

SDM

100R

100R3368

RES

I362

RES

+3V3_STBY
+3V3_STBY

+3V3_STBY
+3V3_STBY

+3V3_STBY

+5V_STANDBY

F304

I390

3376

I388
3304 1K5

10K3366

+3V3_STBY

100R

100R

F370
F303

10K

3L01

4K7

RES

100R3L02

F309

4313

PANEL

100R
100R3L09

I391
I392

ITV_Connector A:

F346
F347
F349

+5V_STANDBY

F348
F353
F351

F352
F354

F323

F302

RES
3362
10K

10K

+3V3_SW

I367

+3V3_STBY

I366

+3V3_STBY

RES
7314
BC847BW

1

I349

I347

3354

+3V3_STBY

10K

RES

RES

3L06

BOLT_ON_SCL
BOLT_ON_SDA

ITV_SPI_DATA_IN

SC1_CVBS_RF_OUT

3

23360

RES FOR BDS

RES FOR BDS

+3V3_STBY

10K

3L07

ITV_SPI_CLK

REMOTE

CPU_RST

STANDBY

Item

iTV

7322

PDTC114ET

3382 100R
3379 3K3

3377
3378

RES
RES

RES
RES

1K0

RES

3306

3L12 3K3

3352

100R3356

RES

3351 3K3

100R

RES

1311

5

4

3
2
1

Description

with Side AV

Other region

3396

3L11

FOR DVB ONLY

B HP 00.2 M P11 V NOC4031

B HP 00.2 M P6 V NOC5131
B HP 00.2 M P7 V NOC02M1

HDMI_HOTPLUG_RESET

1K0

+5V_STANDBY

100R

R HP MS 00.2 M P01 V NOC2131

LOC P22 V05 0PN 3060 1REC1232
LOC P22 V05 0PN 3060 1REC2232
LOC 5MP R001 3060 MS TSR0233

LOC 5MP R001 3060 MS TSR2233
LOC 5MP 3K3 3060 MS TSR1533
LOC 5MP 3K3 3060 MS TSR2533

LOC 5MP R001 3060 MS TSR4533

LOC 5MP R001 3060 MS TSR6533

LOC 5MP R001 3060 MS TSR0733

LOC 5MP R001 3060 MS TSR80L3

LOC 5MP R001 3060 MS TSR90L3

R 5MP R1 6021 ESUF MS TSR01L3
LOC 5MP K01 3060 MS TSR21L3
LOC 5MP K01 3060 MS TSR31L3

LOC 50R0 .PMUJ 3060 MS TSR90L4

LED1

KEYB

LIGHT_SENSOR

SC1_STATUS
SC2_STATUS

RST_AUD

LED2

ESD_RST

RST_H

STANDBY

STANDBYn

RESET_n

E_PAGE

1304

1
2
3
4
5
6
7
8

9
10
11

B11B-PH-K

TO / FROM SIDE IO

LCD_PWR_ON

ISP

BL_ADJUST

DDC_RESET

REMOTE

INT

F356

RES

2326 100p

IBO_IRQ

ITV_SPI_CLK

ITV_SPI_DATA_IN

IIC_SDA_up

ISP

CPU_RST
WR

RD
CE

3K3

100R

F350

RES
2325
100p

IIC_SCL_up

SAW_SW

3358 4K7

4K7

3359

2324 22u

3307

3K3

2322

100p

3K33L13

100p2321

UART CON

F357

For Development only

1M20

7
6
5
4
3
2
1

B7B-PH-K

+3V3_SW

+5V_SW

+3V3_STBY

+3V3_SW

+3V3_STBY

+3V3_SW

1306

1307

6309

RES

BACKLIGHT_BOOST

DVB_SW

BOLT_ON_SCL

BOLT_ON_SDA

RES

6308

BZX384-C6V8

1308

6310

RES

BZX384-C6V8

BZX384-C6V8

1309

RST

EMC

2327

10n

BOLT_ON_SDA
BOLT_ON_SCL

1310

6311

RES

BZX384-C6V8

RES

6305

+3V3_STBY

RES

6312

RES

TO / FROM IR/ LED & KEYBOARD

BZX384-B5V1

3L14

4316

F360

1 2 3 4 5 6 7 8 9 10 11 12 13

10p

RES*RES

2L21

RES

RES

2L31 1n0

*

100p2L27

RES

RES

*

3

I321

3328

47K

6302

1N4148

BZX384-C12

WC

SCL

RES
RES

1n0

1n0

EMC

2330

2331

4L20

*

RES

3L20 100R

4L21

*

RES

10p

2L20

*

4L24
3L24

*

RES

4L25
3L25

RES

*

1n02L30

*

3L23

100p

2L26

*

A(8:19)

1N4148

6304

F363

7

F364

6

3355 100R

F365

3357 100R

5

4314
4315

5304 220R
3390 47R
3391 47R
RES

2333 1n0

1n02340

4310

RES

100R3L21

A(1:7)

RES

3326

100R

3336

+3V3_STBY

3V3

+5V_STANDBY

33R
33R

33R3L22
33R

RES

3353

47R3389

47R3392

A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)
A(8)
A(9)
A(10)
A(11)
A(12)
A(13)
A(14)
A(15)
A(16)
A(17)
A(18)
A(19)

100n2319

RES

IL20
IL22

10K

RES

1n0

2334

10p

10p

RES

RES

2L23

2L22

*

*

2L24 220n

1n02L33

RES

RES

2L32 1n0

*

*

22n

22n

*

FOR EMC

2L28

2L29

M29W800DT-70N6

F310
F311
F313
F315
F317
F319
F321
F324
F326
F328
F329
F331
F332
F333
F334
F335
F336
F338
F339

100R

F340
F341
F366
F367
F369

RES
4306 4307

312

7320

BSH111

+3V3_STBY

1R0

3L10

4302

I374

1n02335

1n02337

EMC

EMC

2336 1n0

RES

2339 1n0

FRONT_Y_CVBS_IN_T

FRONT_C_IN_T

SIDE_AUDIO_IN_L_CON

IL21

220n2L25

IL23

SIDE_AUDIO_IN_R_CON

7310

EPROM

1Mx8/512Kx16

25

0

24

1

23

2

22

3

21

4

20

5

19

6

18

7

8

8

7
6
5
4
3
2
1

17
16

15
12
11
28
26
47

9
10
11
12
13
14
15
16
17
18

RB
RP
WE
OE
CE
BYTE

0

A

8M-1

+3V3_SW

3K3

3305

312

3309

7321

BSH111

RES

4303

RES

I376

1n02332

4309

HP_LOUT

HP_ROUT

37

27

46

3308

RES

3V2

LIGHT_SENSOR

D

NC

3K3

3374

RES

F368

0
1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

A-1

+3V3_SW

KEYB

LED1
LED2

REMOTE

2311

29

F312

31

F314

33

F316

35

F318

38

F320

40

F322

42

F325

44

F327
30
32
34
36
39
41
43
4548

F337

9
10
13
14

E_PAGE

IIC_SCL
IIC_SDA

IIC_SDA
IIC_SCL

+3V3_STBY

5302

60R

10u

AD(0:7)

AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)

A(0)

G_16860_008.eps

250107

A

B

C

D

E

G

H

F

I

1301 B3
1302 I2
1303 I2
1304 A9
1305 I9
1306 H8
1307 I8
1308 I8
1309 I8
1310 I9
1311 H7
1312 H5
1314 I3
1M20 H8
2310 A4
2311 C13
2312 A4
2313 A4
2314 B3
2315 B1
2316 B3
2317 B2
2318 C3
2319 E11
2320 F9
2321 G7
2322 G7
2323 G1
2324 F7
2325 F8
2326 E8
2327 H9
2328 I10
2329 I10
2330 I10
2331 I10
2332 I12
2333 I10
2334 I11
2335 I11
2336 I11
2337 I12
2338 E2
2339 I12
2340 I10
2L20 A10
2L21 A10
2L22 A11
2L23 A11
2L24 A12
2L25 A12
2L26 B10
2L27 B10
2L28 B11
2L29 B11
2L30 B10
2L31 B10
2L32 B11
2L33 B11
3300 C1
3303 B5
3304 D6
3305 G12
3306 F7
3307 G7
3308 G12
3309 G12
3310 B6
3311 B5
3312 B5
3313 B5
3314 B3
3315 B5
3316 B2
3317 B5
3318 B3
3319 B2
3320 B5
3321 B3
3322 B5
3323 B3
3324 C5
3325 C1
3326 D11
3327 C5
3328 D10
3329 C5
3330 D10
3331 C2
3332 D2
3333 C1
3334 C2
3335 C2
3336 E11
3337 E9
3338 D3
3339 D3
3340 D3
3341 D3
3342 D3
3343 I1
3344 D5
3345 I1
3346 D5
3347 D5
3348 D5
3349 E5
3350 E5
3351 G7
3352 G7
3353 F11
3354 G7
3355 G11
3356 G7
3357 G11
3358 F7
3359 F7
3360 G5
3361 F5
3362 C6
3363 D2
3364 D3
3365 F5
3366 F5
3367 F5
3368 C5
3369 G5
3370 G5
3371 G5
3372 H2
3373 G5
3374 G13
3375 H2

3376 D6
3377 E7
3378 F7
3379 E7
3380 D5
3381 G2
3382 E7
3383 F2
3384 H2
3385 H2
3386 H2
3387 E5
3388 E5
3389 I11
3390 I11
3391 I11
3392 I11
3393 E1
3394 D1
3395 E2
3396 C7
3397 E5
3398 E2
3399 E2
3L01 G6
3L02 H5
3L04 E2
3L05 B5
3L06 H6
3L07 H7
3L08 H5
3L09 H5
3L10 H11
3L11 C7
3L12 G7
3L13 G7
3L14 G9
3L15 F1
3L20 A11
3L21 A11
3L22 B11
3L23 B11
3L24 A11
3L25 A11
3L26 D5
4301 F6
4302 H11
4303 H12
4306 G12
4307 G12
4308 H5
4309 I12
4310 I11
4313 H6
4314 H11
4315 H11
4316 G9
4323 F1
4324 D2
4325 D2
4L20 A11
4L21 A11
4L24 A11
4L25 A11
5301 A4
5302 C13
5304 I11
6301 B2
6302 D10
6303 E10
6304 E10
6305 F9
6306 I2
6307 I2
6308 H8
6309 I8
6310 I8
6311 I9
6312 I9
6313 I9
6317 D1
6318 E2
7308 E1
7310 C12
7311 B3
7312 B1
7313-1 D9
7313-2 C10
7314 F6
7315 F10
7316 F2
7317 E1
7320 H11
7321 H12
7322 C7
7323-1 G1
7323-2 F1
F302 C6
F303 G6
F304 C6
F305 F5
F309 H5
F310 C11
F311 C11
F312 C13
F313 C11
F314 C13
F315 C11
F316 C13
F317 C11
F318 C13
F319 C11
F320 C13
F321 C11
F322 C13
F323 B6
F324 D11
F325 D13
F326 D11
F327 D13
F328 D11
F329 D11
F330 B1
F331 D11
F332 D11
F333 D11
F334 D11
F335 D11
F336 D11
F337 D13
F338 D11
F339 D11
F340 D11

F341 E11
F342 I2
F343 I2
F344 I3
F345 G10
F346 H5
F347 I5
F348 I5
F349 I5
F350 F8
F351 I5
F352 I5
F353 I5
F354 I5
F356 E8
F357 H8
F360 I9
F361 D3
F362 C5
F363 G11
F364 G11
F365 G11
F366 E11
F367 E11
F368 C13
F369 E11
F370 G6
F379 D2
F380 B3
F381 B3
F382 I10
F383 I10
F384 I10
F385 D3
F386 C5
F387 I10
FL20 A9
FL21 A9
FL22 A9
FL23 A9
FL24 A9
FL25 A9
FL26 A9
I311 B5
I312 B3
I313 B5
I314 B5
I315 B5
I317 B5
I318 G9
I320 C5
I321 D10
I322 D10
I323 D10
I326 C5
I328 D10
I329 E9
I330 D1
I331 D3
I332 D1
I333 D3
I334 D1
I335 D3
I336 D5
I337 D1
I338 D3
I339 D1
I341 D5
I342 D5
I344 D5
I345 E5
I347 G6
I349 G6
I351 F5
I352 D3
I353 D1
I354 F5
I357 C5
I359 G5
I362 D6
I363 G5
I364 D5
I365 G3
I366 E6
I367 E6
I368 G3
I369 H5
I370 H5
I373 I10
I374 I11
I376 I12
I380 E1
I382 G5
I383 H5
I384 H3
I387 B3
I388 D6
I389 C5
I390 C6
I391 H6
I392 H6
I393 E2
I394 E2
I395 B5
I396 E5
I397 E5
I398 E5
I399 D1
IL20 A11
IL21 A12
IL22 A11
IL23 A12

Circuit Diagrams and PWB Layouts

E3(VISH)R

47LC7.2E LA 7.

SSB: Video Processor

1234567891011121314151617

VIDEO PROCESSOR

B04B B04B

A

ESD_RST

3273

10K

B

C

RES

CS
WR
RD

D

E

F

IIC_SCL

IIC_SDA
INT
RST_H

+3V3_SW

RES

RES

3219

3220

4K7

4K7

3221

3222

FRONT_Y_CVBS
HD_Y_IN

SC1_G_IN
FRONT_Y_CVBS_IN_T
IBO_G_IN
HD_PR_IN
SC1_R_IN
SC2_Y_CVBS_IN
IBO_R_IN
HD_PB_IN
SC1_B_IN
SC1_CVBS_IN
IBO_B_IN

G

H

HDMI_H
HDMI_V
HDMI_VCLK
HDMI_DE

I

FRONT_C
FRONT_C_IN_T
ALE_EMU

CVBS_RF

J

+5V_SW

VGA_H

3257

4K7

3250
22R

+5V_SW

K

74LCX14T

4K7

3258

3254
22R

VGA_V

74LCX14T

L

RES
FOR ITV ONLY

I266

3274

3212
100R

3215
100R

FOR NON
SIDE IO

4208

150R3229

RES

RES

7211-1

74LCX14T

1

7211-2

74LCX14T

3

7211-3

5

7211-4

9

7213-1

74LVC04APW

7214
BC847BW

10K

7213-2

74LVC04APW

7213-3

74LVC04APW

7213-4

74LVC04APW

7213-5

74LVC04APW

7213-6

74LVC04APW

I255

I256

RES

150R3230

RES

RES

3228 150R

3231 150R

FOR NON SIDE IO

RES

4209

+3V3_SW

714

714

714

714

I265

3276

560R

+1V8S_SW

150R

HDMI_Y(0:7)

RES

3232

HDMI_Cb(0:7)

HDMI_Cr(0:7)

2

4

6

I264

8

1

714

3

714

5

I267

714

14

9

7

11

714

13

714

5216

HDMI_Y(0)
HDMI_Y(1)
HDMI_Y(2)
HDMI_Y(3)
HDMI_Y(4)
HDMI_Y(5)
HDMI_Y(6)
HDMI_Y(7)
HDMI_Cb(0)
HDMI_Cb(1)
HDMI_Cb(2)
HDMI_Cb(3)
HDMI_Cb(4)
HDMI_Cb(5)
HDMI_Cb(6)
HDMI_Cb(7)
HDMI_Cr(0)
HDMI_Cr(1)
HDMI_Cr(2)
HDMI_Cr(3)
HDMI_Cr(4)
HDMI_Cr(5)
HDMI_Cr(6)
HDMI_Cr(7)

A(0:7)

A(0)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
A(7)

AD(0:7)

3251
22R

3253
22R

2294
100n

3255

22R

3256

22R

3275
560R

2

4

6

8

10

12

30R

10u

2236

20p2246

20p2247

2251 100n
2253 100n
2255 100n

2256
2257 100n
2258
2259
2260

3201-2 100R
3201-3
3201-4
3202-1 100R18
3202-2 100R
3202-3
3202-4

3203-4

AD(0)

3203-3

AD(1)

3203-2 220R

AD(2)

3203-1 220R

AD(3)

3204-4

AD(4)

3204-3

AD(5)

3204-2

AD(6)
AD(7)

2275

2277

RES

3240

150R

PC_VGA_H

74LCX14T

+3V3_SW

+3V3_SW

ESD_INT

+3V3_SW

100n

2237 100n

2238

1201

14M31818

F232

I230
I231

I232

I233
100n2250
100n2252
100n2254
100n
100n

100n
100n
100n2261

27
45
27
4
45

36
27
18

36
27
18

100n2273

2n7
2n72276

100n

3239
100R

PC_VGA_V

7211-5

11

5219

60R

5223

60R

5210

5214 60R

100n2240

2239 100n

SVP CX32

100R183201-1

6

100R3
100R

100R36

5

100R
220R

220R

220R45
220R
220R
220R3204-1

I238

I257
I258

I239

714

CX_AVDD3_BG_ASS

2284
10u

CX_AVDD3_OUTBUF

I250
2289

10u

60R

100n

100n2242

2241

7202

205

I

XTAL

204

O

61

CS

62

WR_

63

RD_

57

SCL

58

SDA

56

INTN

86

RESET

60

0

GPIO

59

1

180

1

181

23Y_G

182
183

PC_G

188

1

189

2

PR_R

190

3

191

PC_R

196

1

197

PB_B

2

198

3

199

PC_B

37

0

36

1

35

2

34

3

33

4

32

5

31

6

30

7

29

8

26

9

25

10

24

11

22

12

21

13

18

14

17

15

16

16

15

17

14

18

11

19

10

20

9

21

8

22

7

23

4

DP_HS

5

DP_VS

23

DP_CLK

6

DP_DE_FLD

64

0

65

1

66

2

67

3

68

ADDR

4

69

5

70

6

71

7

83

0

82

1

81

2

80

3

A_D

79

4

78

5

77

6

76

7

84

ALE

158

AIN_HS

159

AIN_VS
CVBS1

2

PLF2

207

MLF1

192

C

157

TESTMODE

7211-6

74LCX14T

13

10

2211 10u

10u2230

100n2244

2243 100n

DP

+3V3_SW

I242I245

5218

CX_AVDD3_ADC1

60R

2280
10u

5221

I248

CX_AVDD3_ADC2

60R

2288
10u

I210

100n2212

100n

100n2214

2215

2213 100n

F231

100n

100n

2232

2231

I214

CX_AVDD_ADC1

CX_AVDD_ADC2

CX_AVDD_ADC3

177

186

193

1227537496

119

136

160

19

7298108

VDDC

VDDH VDDM

VIDEO PROCESSOR

Item

EU LCD

1217 FIL CM SM 50V 100MHZ 67R R
1218 FIL CM SM 50V 100MHZ 67R R
2207 CER2 0603 X7R 16V 100N COL
2208 ELCAP SM SEV 25V 100U PM20 R

2209 ELCAP SM SEV 25V 100U PM20 R

2210 CER2 0603 X7R 16V 100N COL
2248 CER2 0805 X7R 16V 1U PM10 R
2267 CER2 0603 X7R 16V 100N COL
2294 CER2 0603 X7R 16V 100N COL
3213 RST SM 0603 47K PM5 COL
3216 RST SM 0603 47R PM5 COL
3217 RST SM 0603 47K PM5 COL
3227 RST SM 0603 100R PM5 COL
3233 RST SM 0603 100R PM5 COL
3235 RST SM 0603 100R PM5 COL
3238 RST SM 0603 100R PM5 COL
3241 RST SM 0603 220R PM5 COL
3242 RST SM 0603 4K7 PM5 COL
3243 RST SM 0603 100R PM5 COL
3245 RST SM 0603 10K PM5 COL
3246 RST SM 0603 100R PM5 COL
3247 RST SM 0603 100R PM5 COL
3250 RST SM 0603 22R PM5 COL
3253 RST SM 0603 22R PM5 COL
3254 RST SM 0603 22R PM5 COL
3256 RST SM 0603 22R PM5 COL
3257 RST SM 0603 10K PM5 COL
3258 RST SM 0603 10K PM5 COL
4204 RST SM 0603 JUMP. 0R05 COL
4205 RST SM 0603 JUMP. 0R05 COL
4206 RST SM 0603 JUMP. 0R05 COL
4208 RST SM 0603 JUMP. 0R05 COL
4209 RST SM 0603 JUMP. 0R05 COL
5215 IND FXD 0805 EMI 100MHZ 220R R
5217 IND FXD 0805 EMI 100MHZ 220R R
6202 DIO REG SM BZX384-C5V6 COL R
7203 TRA SIG SM BC847BW (COL) R
7206 TRA SIG SM BC847BW (COL) R
7208 TRA SIG SM PDTC114ET (COL) R
7210
7211 IC SM 74LCX14T (COL) R

VSSC VSSH VSSM AVSS_ADC

547597

13

28

EU PDP

207399

120

137

161

134

146

EU/US LCD-iTV

AP/CH/LT LCD

AP/CH/LT PDP

176

187

110

135

147

178

AVDD_ADC

Description

ELCAP SM 16V 100U PM20 COL R

ELCAP SM 16V 100U PM20 COL R

194

179

I268

12

714

3139 123 6261.1

1234567891011121314151617

CX_AVDD_ADC4

CX_AVDD3_ADC1

CX_AVDD3_ADC2

CX_AVDD3_BG_ASS

CX_AVDD3_OUTBUF

168

195

166

165

AVDD3_ADC

AVDD3_BG_ASS

AVDD3_OUTBUF

AVSS_BG_ASS

AVSS_OUTBUF

167

164

RES RES
2205

1215

RES

RES

4210

DLW21S

CX_PAVDD

+1V8S_SW

CX_PAVDD1

CX_PAVDD2

202

208

3

12

PAVDD

PAVSS

12

1

203

206

I269

RES

4211

3244

3248

5224

5226

22R

22R

60R

60R

I270

200201

PDVDD

PDVSS

38 39

2206

1216

4212

DLW21S

CX_PDVDD

I243

2279

10u

I247

2286

10u

2290

I254

2292

PLL_VCC

PLL_GND

47 46

I251

10u

10u

52

LVDSVCC

LVDSGND

CX_PAVDD1

CX_PAVDD2

CX_PDVDD

CX_PAVDD

+5V_STANDBY

1K0

3211

2245
100n

85

V5SF

CVBS_OUT

LVDSVDDP

MD

DQM

TCLK1

VREF

I263

I271

RES

4213

+1V8S_SW

I246

5220

CX_AVDD_ADC1

2233 100n

2298

100n2234

60R

5222

60R

5225

60R

5227

60R

2235 100n

F211

2216

2282

10u

I249

CX_AVDD_ADC2

2287

10u

I252

CX_AVDD_ADC3

2291

10u

I253

CX_AVDD_ADC4

2293

10u

5213

60R

10u

+3V3_SW

DQ(0:31)

DQ(8)
DQ(9)
DQ(10)
DQ(11)
DQ(12)
DQ(13)
DQ(14)
DQ(15)
DQ(0)
DQ(1)
DQ(2)
DQ(3)
DQ(4)
DQ(5)
DQ(6)
DQ(7)

7204
IS42S16400D-6TL

CX_DQM(1)
CX_DQM(0)

VDDQ

VDD

36
40

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53

39
15

Φ

DRAM

NC

1M X 16 X 4

0

A

0
1
2
3
4
5
6

D

7
8
9
10
11
12
13
14
15

H

DQM

L

VSSQ

1M-1

BA

CLK

VSS

41

546124652

11427394349

23

0

24

3260-2

1

25

3260-3

2

26

3260-4

3

29

3261-1 22R

4

30

3261-2

5

31

3261-3

6

32

3261-4

7

33

8

34

3262-2

9

22

3262-4

10

35

3262-3

11

20

0

21

1

38
37

CKE

19

3268-2

CS

18

3268-4

RAS

17

CAS

16

3271-3

WE

28

3266

I213

100n2217

100n2218

18
27
36
45
18

7

2
36
45
18
27
45
36

12
27

5

4
18
36

2219 100n

22R3260-1
22R
22R
22R

22R
22R
22R
22R3262-1
22R
22R
22R

22R
22R

22R
22R3271-1
22R

100n

2220

CX_MCLK
CX_CLKE

CX_CS0#
CX_RAS#
CX_CAS#

CX_WE#

+3V3_SW

100n

100n2296

100n2227

0

A

BA

CLK

CKE

CS
RAS
CAS

WE

41

100n2225

2224 100n

11427394349

23

3263-1 22R

0

24

3263-2

1

25

3263-3

2

26

3263-4

3

29

4

30

3264-2

5

31

3264-3

6

32

3264-4

7

33

3265-1 22R

8

34

3265-2

9

22

3265-4

10

35

3265-3

11

20

0

21

1

38

3267
37
19

3268-1 22R

18

3268-3

17

3271-2

16

3271-4

28

DLW21S

1211 1210

DLW21S DLW21S

1213 1212

1214

DLW21S DLW21S

2226 100n

18
27
36
45
18
27
36
45
18
2
45
36

18
36
27
45

TXAn1

TXAp1

TXBn1

TXBp1

TXCn1

TXCp1

TXCLKn1

TXCLKp1

TXDn1

TXDp1

2295 100n

2228 100n

22R
22R
22R
22R3264-1
22R
22R
22R

22R

7

22R
22R

CX_MCLK

22R

CX_CLKE

CX_CS0#

22R

CX_RAS#

22R

CX_CAS#

22R

CX_WE#

I217

163

1

162

2

155

0

154

1

153

2

152

3

151

4

150

5

149

6

148

7

145

8

144

9

143

10

142

11

141

12

140

13

139

14

138

15

107

16

106

17

105

18

104

19

103

20

102

21

101

22

100

23

95

24

94

25

93

26

92

27

91

28

90

29

89

30

88

31

124

0

123

1

122

2

121

3

118

4

117

5

MA

116

6

115

7

114

8

113

9

125

10

126

11

156

0

133

1

109

2

87

3

51

M

TA1

50

P

49

M

TB1

48

P

45

M

44

TC1

P

41

M

40

TD1

P

43

M

42

P

173

1

172

FB

2

171

1

170

FS

2

175

N_1

174

P_1

185

N_2

184

P_2

128

0

127

BA

1

129169

CS0_

130

RAS_

131

CAS_

132

WE_

111

MCK

112

CLKE

55

PWM0

3245

10K

I244

RES
2281

10u

SC1_RF_OUT_CVBS

I218

SC2_CVBS_MON_OUT

DQ(15)
DQ(14)
DQ(13)
DQ(12)
DQ(11)
DQ(10)

DQ(9)
DQ(8)
DQ(7)
DQ(6)
DQ(5)
DQ(4)
DQ(3)
DQ(2)
DQ(1)

DQ(0)
DQ(23)
DQ(22)
DQ(21)
DQ(20)
DQ(19)

DQ(0:31)

DQ(18)
DQ(17)
DQ(16)
DQ(31)
DQ(30)
DQ(29)
DQ(28) CX_DQM(2)
DQ(27)
DQ(26)
DQ(25)
DQ(24)

CX_MA(0:11)

CX_MA(0)

CX_DQM(0:3)

CX_MA(1)
CX_MA(2)
CX_MA(3)
CX_MA(4)
CX_MA(5)
CX_MA(6)
CX_MA(7)
CX_MA(8)

CX_MA(9)
CX_MA(10)
CX_MA(11)

CX_DQM(0)
CX_DQM(1)

CX_DQM(3)

100n2267

2268 100n

CX_BA0
CX_BA1

CX_CS0#
CX_RAS#
CX_CAS#

CX_WE#

CX_MCLK

CX_CLKE

+3V3_SW

3242

4K7

7206

BC847BW

I240

7203

BC847BW

CX_DQM(2)

RES
4207

SC1_FBL_IN

IBO_CVBS_IN

FOR LCD ONLY

3241

220R

3243
100R

TXAn
TXAp
TXBn
TXBp
TXCn
TXCp
TXDn
TXDp

TXCLKn
TXCLKp

SC2_C_IN

3272
RES

BL_ADJUST

I241

RES

2278

I261
I262

150R

22u

DQ(24)
DQ(25)
DQ(26)
DQ(27)
DQ(28)
DQ(29)
DQ(30)
DQ(31)
DQ(16)
DQ(17)
DQ(18)
DQ(19)
DQ(20)
DQ(21)
DQ(22)
DQ(23)

2272

100n

2271

100n

2274
100n

CX_DQM(3)

I259
I260

7205
IS42S16400D-6TL

36
40

2
4
5
7
8
10
11
13
42
44
45
47
48
50
51
53

39
15

2266
100n

100n

2270

2269

100n

VDDQ

VDD

Φ

DRAM

NC

1M X 16 X 4

0
1
2
3
4
5
6

D

7
8
9
10
11
12
13
14
15

H

DQM

L

VSSQ

1M-1

VSS

546124652

TXAn

TXAp

TXBn

TXBp

TXCn

TXCp

TXCLKn

TXCLKp

TXDn

TXDp

2221 100n

CX_BA0
CX_BA1

5228

22u

2297

CX_BA0
CX_BA1

+3V3_SW

5212

22u

100n2223

100n2222

6.3V

2229

60R

6.3V

CTRL_DISP1
CTRL_DISP2
CTRL_DISP3
CTRL_DISP4

BOLT_ON_SCL
BOLT_ON_SDA

60R

CX_MA(0)
CX_MA(1)
CX_MA(2)
CX_MA(3)
CX_MA(4)
CX_MA(5)
CX_MA(6)
CX_MA(7)
CX_MA(8)
CX_MA(9)

CX_MA(10)

CX_MA(11)

CX_MA(0)
CX_MA(1)
CX_MA(2)
CX_MA(3)
CX_MA(4)
CX_MA(5)
CX_MA(6)
CX_MA(7)
CX_MA(8)
CX_MA(9)

CX_MA(10)

CX_MA(11)

CTRL-DISP1

CTRL-DISP2(LCD_PWR_on)

CTRL-DISP3(Rev_Standby)

CTRL-DISP4

FOR LCD ONLY

7210

SI4835BDY

+12V_DISP

+5V_STANDBY

4205

4206

4203

4204

3213

6202

BZX384-C5V6

3216

I220

47R

I216

47K

2248

I224

1u0

RES

VDISP-SWITCH

7208

PDTC114ET

3V2

+3V3_SW

CTRL_DISP1_up

LCD_PWR_ON

VDISP

100p

RES

2285

F229

100p

RES

I236

LGE

DISPEN
On time : H
Off time : Don’t care

36 37
34 35

32 33
31
30
29
28
27
26
25
24
23
22
21

F218

20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

F230

2283

STANDBYn

CTRL_DISP4_up

F219
F220

F221

F222

F223

F224
F225

F226
F227

F228

100R3246
100R3247

I211

RES

7207

SI3441BDV

3217
47K

I225
0V

RES

RES
4K7

4K7

3227

3223

3224

100R

3233

100R

3238

100R

3235

100R

RES

RES

100p

100p

2262

2263

RESET
Semi standby : H
Normal and off : L

DISPLAY CONTROL

RES

1G50

CONNECTOR

5211
220R
5215
220R

5217
220R

RES RES

3210

1K0
RES

RES

RES

4K7

4K7

3225

RES

100p

100p

2264

LVDS

4215 4214

3226

RES

2265

RES

F210

12V1

2210

100u 16V16V100u

2207

2208 2209

I215

SML-310

RES

F212

CTRL_DISP1

F213

CTRL_DISP2

F214

CTRL_DISP3

F215

CTRL_DISP4

FHPSDI

CPU-GO
On time : H
Off time : Don’t care

PDWIN
On time : H
Off time : Don’t care

PDP-GO

On time : H

Semi standby : L

Off time : Don’t care

6201

LCD

PDP

F217

0-1453230-3

G_16860_009.eps

VDISP

100n

100n

1G51

32

1201 D4
1210 H12
1211 I12
1212 I12
1213 J12
1214 J12
1215 L7
1216 L7
1G50 H15

A

1G51 H17
2205 K7
2206 K7
2207 B17
2208 B16
2209 B16
2210 B17
2211 C5
2212 C5
2213 C5
2214 C5
2215 C5

B

2216 D9
2217 B13
2218 B13
2219 B13
2220 B13
2221 B13
2222 B13
2223 B14
2224 E12
2225 E12
2226 E13

C

2227 E13
2228 E13
2229 B14
2230 C5
2231 C5
2232 C5
2233 D8
2234 D8
2235 D8
2236 D3
2237 D4
2238 D4

D

2239 D4
2240 D4
2241 D4
2242 D4
2243 D5
2244 D5
2245 D8
2246 D3
2247 E3
2248 C15
2250 F4
2251 F4

E

2252 F4
2253 F4
2254 F4
2255 F4
2256 F4
2257 F4
2258 F4
2259 F4
2260 F4
2261 F4
2262 F16

F

2263 F16
2264 F16
2265 F16
2266 J11
2267 I8
2268 I8
2269 J11
2270 J11
2271 J10
2272 J10
2273 J3
2274 J10

G

2275 J3
2276 J3
2277 J3
2278 K9
2279 A7
2280 A6
2281 L8
2282 A9
2283 K15
2284 A4
2285 K15
2286 B7

H

2287 B9

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

31

250107

2288 B6
2289 B4
2290 B7
2291 B9
2292 C7
2293 C9
2294 K3
2295 E13
2296 E13
2297 E13

I

2298 D8
3201-1 I4
3201-2 I4
3201-3 I4
3201-4 I4
3202-1 I4
3202-2 I4
3202-3 I4
3202-4 I4
3203-1 I4
3203-2 I4
3203-3 I4

J

3203-4 I4
3204-1 J4
3204-2 J4
3204-3 J4
3204-4 J4
3210 C16
3211 D8
3212 D2
3213 C15
3215 D2
3216 C15
3217 C16

K

3219 E1
3220 E2
3221 E1
3222 E2
3223 E16
3224 E16
3225 E16
3226 E16
3227 E16
3228 G2
3229 G2

L

3230 G2
3231 G2
3232 G3
3233 E16
3235 E16
3238 E16
3239 K4
3240 K3

3242 K9
3243 K9
3244 A7
3245 K8
3246 J14
3247 J14
3248 B7
3250 J2
3251 J3
3253 K3
3254 K2
3255 K3
3256 L3
3257 J1
3258 K1
3260-1 B12
3260-2 B12
3260-3 B12
3260-4 B12
3261-1 B12
3261-2 B12
3261-3 B12
3261-4 B12
3262-1 B12
3262-2 B12
3262-3 C12
3262-4 C12
3263-1 E12
3263-2 E12
3263-3 E12
3263-4 E12
3264-1 E12
3264-2 E12
3264-3 E12
3264-4 E12
3265-1 E12
3265-2 E12
3265-3 F12
3265-4 F12
3266 C12
3267 F13
3268-1 F12
3268-2 C12
3268-3 F12
3268-4 C12
3271-1 C12
3271-2 F12
3271-3 C12
3271-4 F12
3272 J9
3273 A2
3274 B2
3275 A3
3276 B3
4203 B14
4204 B15
4205 B15
4206 B15
4207 L9
4208 E2
4209 I2
4210 L6
4211 L7
4212 L7
4213 L8
4214 B16
4215 B16
5210 B4
5211 A16
5212 A14
5213 C9
5214 C4
5215 A16
5216 C3
5217 B16
5218 A6
5219 A4
5220 A8
5221 B6
5222 B8
5223 B4
5224 B7
5225 B8
5226 C7
5227 C8
5228 D13
6201 C17
6202 C15
7202 D4
7203 L9
7204 B11
7205 E11
7206 K9
7207 B16
7208 C15
7210 A15
7211-1 J2
7211-2 K2
7211-3 K2
7211-4 L2
7211-5 L4
7211-6 L5
7213-1 A3
7213-2 B3
7213-3 B3
7213-4 B3
7213-5 C3
7213-6 C3
7214 A2
F210 A17
F211 C9
F212 E16
F213 E16
F214 E16
F215 E16
F217 I17
F218 I15
F219 I15
F220 I15
F221 I15
F222 I15
F223 I15
F224 I15
F225 J15
F226 J15
F227 J15
F228 J15
F229 J15
F230 J15
F231 C5
F232 E4
I210 B5
I211 A16
I213 A13
I214 C5
I215 C16
I216 B15
I217 D8
I218 E8
I220 C15
I224 C15
I225 C16
I230 E4
I231 E4

I233 E4
I236 E15
I238 J4
I239 K4
I240 K8
I241 K9
I242 A6
I243 A7
I244 L8
I245 A4
I246 A9
I247 B7
I248 A6
I249 B9
I250 B4
I251 B7
I252 B9
I253 C9
I254 C7
I255 D2
I256 D2
I257 J4
I258 J4
I259 J10
I260 J10
I261 J10
I262 J10
I263 K8
I264 L3
I265 A3
I266 A2
I267 B3
I268 K6
I269 K7
I270 K7
I271 K8

I232 E4

3241 K9

Circuit Diagrams and PWB Layouts

AP/CH/LT with Side AV

SSB: PNX2015: Audio Processor

48LC7.2E LA 7.

123456789

B04C B04C

A

+5V_SW

B

C

D

E

AUDIO PROCESSOR

+5V_D

RES

4401

4402

+5V_AUD

I429
I430

I432

RES
RES

3402

1R0

RST_AUD

IIC_SCL
IIC_SDA

MOJO_I2S_OUT_SCK
MOJO_I2S_OUT_WS

RES

HDMI_SCK
HDMI_WS

MOJO_I2S_OUT_SD
HDMI_SD

SIF

SC1_AUDIO_IN_R
SC1_AUDIO_IN_L

SC2_AUDIO_IN_R
SC2_AUDIO_IN_L

COMP_AUDIO_IN_R
COMP_AUDIO_IN_L
SIDE_AUDIO_IN_R_CON
SIDE_AUDIO_IN_R
SIDE_AUDIO_IN_L
SIDE_AUDIO_IN_L_CON
HDMI_AUDIO_IN_R
HDMI_AUDIO_IN_L

5401

120R

5402

120R

+12V_DISP

2411

10u

2414

10u

+5V_AUD

+AUDIO_POWER_+12V_DISP

2439

I426

2440

470n 470n

2415

4

3p3

2416

3p3

100n 2419

3410 100R

2446
2447

RES

4409

RES

4410

RES

4412

56p2432

470R3416

22u5403

4403

4406

100R3411

100p
100p

2

1

18M432

3

2433 330p

2436

1411

1V4
1V6

F

3139 123 6261.1

7410

L78L08ACU

16V

10u

2410

7411

2409 1n5

1n5

2442

IN

OUT

RESETQ
STNDBYQ
TESTEN
TP

CL
DA
ADR_SEL

CL
WS

CL3
WS3

IN
OUT
CL
WS

1
2
3
4

DA_OUT

IN1+
IN­IN2+

VREFTOP

R
L

L

R
L

R
L

R
L

I425

F401

DA

SC1_IN

SC2_IN

SC3_IN

SC4_IN

SC5_IN

AGNDC

31

OUTIN

COM

2

+5V_AUD

2441

220p

2412

MSP4450P-VK-E8 000

2V4

I412
I413

330p2434

330p2435

10u
100n2445

4408
4407

4411

XTALIN

XTALOUT

I421I420
I422
I423

I424

2V4

I427
I428

I431

2V6

1V5

2437

10u

67

68

19
80
66
69

2
3
79

4
5

17
18

8
9
10
11

7
16
20
21

6

63
64
65

56

55
54

53
52

51
50

49
48

58
57

+8V

2408 470p

F402 F403

470p

61

62

39

AH

A

SUP

+5V_D

Φ

MULTISTANDARD

SOUND PROCESSOR

XTAL

I2C

I2S

DEL

ANA

VSS VREF

45

2438

100n

AD

59

60

14

43

44

13

DVSUP

15 12

2413

AUD_CL_OUT

DACM

SUB

SR

DACA

CAPL

DCTR_IO

SPDIF_OUT

SC1_OUT

SC2_OUT

SC3_OUT

NC

1R2AH
35

25

SL

220p

R
L

C

R
L

M

A

0
1

R
L

R
L

R
L

2443

1n5

470p

2444

70

0V6

26

0V6

27

28

29

30
31

0V2

23

0V2

24

6V7

40

38

78
77

76
36

37

33
34

41
42

22
32
46
47
71
72
73
74
75

I414

6V3

2423 10u

I415

3V8
3V8

3V8
3V8

1

I416
I417

I418
I419

100p 100p

Item

4403 RST SM 0603 JUMP. 0R05 COL
4406 RST SM 0603 JUMP. 0R05 COL
4407 RST SM 0603 JUMP. 0R05 COL
4408 RST SM 0603 JUMP. 0R05 COL
4411 RST SM 0603 JUMP. 0R05 COL

+8V

16V10u2420

16V

2429

iTV

Description

EU- with Side AV

2417

2418

330p

330p

2421 2422
330p

330p

2424 10u

2430

24312428

100p 100p

HP_AUDIO_OUT_R
HP_AUDIO_OUT_L

10u2425

10u2426
10u2427

3418 100R

3420 100R

100R3417

100R3419

SC1_AUDIO_OUT_R

SC1_AUDIO_OUT_L

SC2_AUDIO_OUT_R

SC2_AUDIO_OUT_L

123456789

AUDIO_LS_R

AUDIO_LS_L

G_16860_010.eps

250107

A

B

C

D

E

F

1411 B3
2408 A4
2409 A4
2410 A4
2411 A2
2412 A4
2413 A6
2414 B2
2415 B3
2416 B3
2417 B7
2418 B7
2419 C3
2420 C6
2421 C7
2422 C7
2423 C6
2424 D7
2425 D7
2426 D7
2427 D7
2428 D6
2429 D7
2430 D7
2431 D7
2432 D2
2433 D3
2434 E3
2435 E3
2436 E3
2437 F4
2438 F4
2439 A3
2440 A3
2441 A4
2442 A4
2443 A6
2444 A6
2445 E3
2446 C3
2447 C3
3402 A1
3410 C3
3411 C3
3416 E2
3417 D8
3418 D8
3419 D8
3420 D8
4401 A2
4402 A2
4403 E3
4406 F3
4407 C3
4408 C3
4409 D3
4410 D3
4411 D3
4412 D3
5401 A1
5402 B1
5403 E2
7410 A4
7411 B4
F401 A4
F402 A4
F403 A5
I412 C3
I413 C3
I414 C6
I415 C6
I416 D6
I417 D6
I418 D6
I419 D6
I420 D3

I421 D4
I422 D4
I423 E4
I424 E4
I425 F4
I426 A3
I427 C4
I428 C4
I429 C2
I430 C2
I431 D4
I432 D2

SSB: YPBPR & Rear IO

Circuit Diagrams and PWB Layouts

49LC7.2E LA 7.

1234567891011

B06A B06A

YPBPR & REAR IO

A

FOR NON SIDE IO / ITV

B

C

D

CVBS

I633

5

6

4601

8

1601-2

7

F604

3613 2601
75R

SVHS

1601-3

1601-1

1612

6615

GND

9

RES
4602

PESD5V0S1BA

RES

F615

F603

1

3

4

2

3609

75R

2617

1u0

F602

1609

1608

F601

RES
6604

PESD5V0S1BA

RES
6606
PESD5V0S1BA

RES
2600

I632

3600

10R

3604

75R

RES
2609

+5V_SW

3623

3624

100K

56K

3602

10R

3625

100R

I615

I631

3622

BC857BW
7601

1K0

FRONT_C

FRONT_Y_CVBS

+5V_SW

1615-1

PR

MSD-246V1-145 NIDIP

Y

PB

MSD-246V1-145 NIDIP

L
R

MSD-246V1-145 NIDIP

1615-2

1615-3

3

5

4

6

8

7

9

2

F614

F608

F605

16061610

F606

1607

F607

16111613

F609

RES
6610

RES
6611

RES

6612

RES
6613

RES
6614

YPbPr

PESD5V0S1BA PESD5V0S1BA

3607
150R

PESD5V0S1BA PESD5V0S1BA

3611
150R

PESD5V0S1BA

RES
2602

RES
2603

RES
2606

3601
75R

3603
75R

3605
75R

I623

I627

3617
100R

3618
100R

3619
100R

2608
3n3

2612
3n3

3608

33K

3612

33K

2607

2610

I610

220n

I611

220n

HD_PR_IN_ITV

HD_PR_IN

HD_Y_IN_ITV

HD_Y_IN

HD_PB_IN_ITV

HD_PB_IN

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

E

F611

3621
150R

RES
6607
PESD5V0S1BA

3616
33K

MSD-242V-01 NIDIP (765A) LF

F616

1603

12

3

L

1618

R

F

F610

3620
150R

1614

RES
6605
PESD5V0S1BA

3615

33K

2616

3n3

2613

3n3

I635

I636

2615

2614

220n

220n

4603

4604

SIDE_AUDIO_IN_L

SIDE_AUDIO_IN_R

1619

1
2
3
4
5
6

8

7

BM06B-SRSS-TBT

ITV Connector D

HD_PR_IN_ITV

HD_Y_IN_ITV

HD_PB_IN_ITV

F612

F613

VGA_H
VGA_V

G

3139 123 6261.1

123456

7891011

G_16860_011.eps

240107

A

B

C

D

E

F

G

1601-1 B2
1601-2 D1
1601-3 B2
1603 E2
1606 B7
1607 C7
1608 D3
1609 C3
1610 C7
1611 D7
1612 D2
1613 D7
1614 F2
1615-1 B7
1615-2 C7
1615-3 D7
1618 F2
1619 E7
2600 B3
2601 E2
2602 B8
2603 B8
2606 C8
2607 C9
2608 D9
2609 D4
2610 D9
2612 D9
2613 F4
2614 F4
2615 E4
2616 F4
2617 D2
3600 B4
3601 B8
3602 C4
3603 B8
3604 B4
3605 C8
3607 D8
3608 D9
3609 C2
3611 D8
3612 D9
3613 E1
3615 F3
3616 F3
3617 B9
3618 B9
3619 C9
3620 F3
3621 E3
3622 D4
3623 D4
3624 E4
3625 D4
4601 C2
4602 D2
4603 E5
4604 F5
6604 C3
6605 G3
6606 D3
6607 F3
6610 B8
6611 C8
6612 C8
6613 D8
6614 D8
6615 E2
7601 D4
F601 B3
F602 C3
F603 D2
F604 D1
F605 B7
F606 B7
F607 C7
F608 D7
F609 D7
F610 F3
F611 E3
F612 F7
F613 F7
F614 C7
F615 C2
F616 F1
I610 C10
I611 D10

I615 B4
I623 D9
I627 D9
I631 C4
I632 D3
I633 B1
I635 E4
I636 F4

Item

non-iTV

Description

Circuit Diagrams and PWB Layouts

50LC7.2E LA 7.

SSB: I/O Scart 1 & 2

12345678910111213

B06B B06B

A

B

C

D

E

F

G

H

I

3139 123 6261.1

ITV-Connector B

1526

1
2
3
4
5
6
7
8

9

IO - SCART 1 & 2

iTV Analog

Audio-R_out

Audio-R_in

Audio-L_out

Audio-L_in

Function_Sw

CVBS_out

iTV-Digital

RST SM 0603 680R PM5 COL

RST SM 0603 680R PM5 COL

RST SM 0603 680R PM5 COL

SCART 2

1506

PPTV/55

F510

1

F512

2

F514

3

F516

4
5

F518

6
7

F532

8
9

1510

10
11

1513

12
13
14
15
16
17
18

F527

19

F529

20
21

1518

1521

F523

6525

RES

6510

RES

1501

1503 1500

1508

1514

1515

2536
220n

3522

68R

RES
2526

PESD5V0S1BA

PESD5V0S1BA

RESRESRES

PESD5V0S1BA

6523 6522

6501

PESD5V0S1BA

RES

6505

PESD5V0S1BA

RES

6524

PESD5V0S1BA PESD5V0S1BA

6509

RES

PESD5V0S1BA

I551

3525
1K0

RES

2530

2525
220n

3500
150R

3502
150R

3506
150R

3512
150R

3550

27K

I530

RES

2524

+5V_SW

5V2

3V

3529

3531

75R

3519

I543

7500

BC847B

2534
220n

2502

2506

2512

2520

3551

15R

I553

I510

I512

330p 330p

3n3

F544

3n3

6K8

3553
75R

3V7

BC857BW

100R

3552

100R

7502

2533
220n

3513 3508

7503

BC847B

33K

33K

I545

3538

4K7

I552

RES

4502

+5V_SW

3524

F543

15R

I548

BC857BW

7504

I549

3540

4K7

RES

4504

I544

3521
1K0

3555

68R

3537
1K0

3554

68R

2509
220n

2518
220n

I517

I520

I557

I528

I556

SC2_CVBS_MON_OUT_ITV

I533

I554

SC2_AUDIO_MUTE_R

SC2_AUDIO_OUT_R

SC2_AUDIO_OUT_L

SC2_AUDIO_MUTE_L

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_STATUS

SC2_C_IN_ITV

SC2_CVBS_MON_OUT

SC2_Y_CVBS_IN_ITV

SC2_Y_CVBS_IN

SC1_RF_OUT_CVBS

SC1_CVBS_RF_OUT

10

Audio-R_out

Audio-L_out

Function_Sw

Terr_CVBS_out

SC1_FBL_IN

SC1_AUDIO_OUT_L

SC1_AUDIO_OUT_R

SCART 1

Audio-R_in

Audio-L_in

RGB-B_in

RGB-G_in

RGB-R_in

RGB-BL_in

Video_in

PPTV/55

SC1_B_IN
SC1_G_IN
SC1_R_IN

1504

ITV-Connector C

1525

1
2
3
4
5

67

F511

1
2

F513

3

F515

4

F517

5
6

F519

7

F520
F521

8
9

1509

10

F522

11

1512

12
13
14
15
16
17
18
19
20
21

F531

F524

F525

F526

F528

SC2_Y_CVBS_IN_ITV

1502

6518

RESRESRESRES

1505

6519

1507

6504
RESRESRES

6507

1516 1511

6514

1517

65206521

6515

RES

1520 1519

6516

RES

1522

1523

6517

1524

6511

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_C_IN_ITV

3503

150R

PESD5V0S1BA

3507

150R

PESD5V0S1BA

3510

150R

PESD5V0S1BA

3514
150R

PESD5V0S1BA

RES

2528

PESD5V0S1BAPESD5V0S1BA

3518

27K

PESD5V0S1BA

RES

2527

RES

2529

PESD5V0S1BA

RES

2531

PESD5V0S1BA

3535 68R

RES

2535

PESD5V0S1BA

RES

3546

2538

75R

PESD5V0S1BA

3517

3520

3530 3526

3533

3545

100R

2508

2514

2517
3n3

2523

3n3

75R

6K8

75R

75R 75R

3536

F534

330p

F535

330p

F537

3516
100R

3523
100R

3528

100R

3532

1K0

I550

1K0

F536

3511

33K

3515

33K

F540

F542

F539

F541

2521
220n

6512

6513

2515
220n

1N4148

1N4148

F530

F538

I540

I541

SC1_AUDIO_MUTE_R

SC1_AUDIO_OUT_R

SC1_AUDIO_OUT_L

SC1_AUDIO_MUTE_L

SC1_AUDIO_IN_R

SC1_AUDIO_IN_L

SC1_B_IN

SC1_STATUS

SC1_G_IN

SC1_R_IN

SC1_FBL_IN

SC1_CVBS_IN

1504 SO C E URO V 21P F BK R-GRND B
1506 SO C E URO V 21P F BK R-GRND B
1525 CON V 5P M 1.00 SM SR R
1526 CON V 8P M 1.00 SM SR R
3516 RST SM 0603 100R PM5 COL

3523 RST SM 0603 100R PM5 COL

3528 RST SM 0603 100R PM5 COL

RGB-R_out/YC-C_in

Video/YC-Y_in

12345678910111213

SC2_C_IN

G_16860_012.eps

250107

1500 C9

6522 C10

1501 C9

6523 C10

1502 C3

6524 E10

1503 D9

6525 G9

1504 C2

7500 G10

1505 C3

7502 G11

1506 D8

7503 I11

1507 D3

7504 I11

1508 E9

F510 D9
1509 D2
1510 E9
1511 D3
1512 E2
1513 E9
1514 E9
1515 F9
1516 E3
1517 E3
1518 G9
1519 F3
1520 G3
1521 H9
1522 G3
1523 H3
1524 H3
1525 A2
1526 A1
2502 C10
2506 C10
2508 B4
2509 D12
2512 D10
2514 C4
2515 C5
2517 D4
2518 D12
2520 E10
2521 D5
2523 D4
2524 F10
2525 G10
2526 G10
2527 F4
2528 E4
2529 F4
2530 H10
2531 G4
2533 I11
2534 I10
2535 H3
2536 G10
2538 H3
3500 B10
3502 C10
3503 B4
3506 D10
3507 C4
3508 D11
3510 C4
3511 D4
3512 D10
3513 E11
3514 D4
3515 D4
3516 E4
3517 E4
3518 E3
3519 G10
3520 E4
3521 G12
3522 G10
3523 F4
3524 I11
3525 G10
3526 F4
3528 F4
3529 H10
3530 G4
3531 H10
3532 G4
3533 G4
3535 H3
3536 H4
3537 I12
3538 G11
3540 I12
3545 H4
3546 H4
3550 E10
3551 E10
3552 F11
3553 F11
3554 I12
3555 H12
4502 G11
4504 I12
6501 D10
6504 D3
6505 E10
6507 D3
6509 F10
6510 H9
6511 H3
6512 G5
6513 G5
6514 E3
6515 F3
6516 G3
6517 H3
6518 C3
6519 C3
6520 E3
6521 G3

F511 C2

F512 D9

F513 C2

F514 D9

F515 C2

F516 D9

F517 C2

F518 D9

F519 D2

F520 D2

F521 D2

F522 D2

F523 F9

F524 E2

F525 E2

F526 F2

F527 F9

F528 F2

F529 F9

F530 H5

F531 E2

F532 E9

F534 B4

F535 C4

F536 C4

F537 D4

F538 E5

F539 E4

F540 F4

F541 F5

F542 G4

F543 D11

F544 D11

I510 B11

I512 C11

I517 D12

I520 D12

I528 G12

I530 G10

I533 H12

I540 C5

I541 D5

I543 G10

I544 G12

I545 E11

I548 I11

I549 I11

I550 G4

I551 G10

I552 G11

I553 I11

I554 I12

I556 H12

I557 F12

A

B

C

D

E

F

G

H

I

Circuit Diagrams and PWB Layouts

51LC7.2E LA 7.

SSB: HDMI

12345678910111213

2021
2223

HDMI

F832

F840
F841

F842
F843

BC847BW

F861

F869
F870

F871
F872

7860

BC847BW

3805

220R

I806

2814

10n

2807
100n

7814

3806
220R

2815

I831

6.3V 47u

I802
I804

I805

10n

3862

3863

I861

3880

3881

2808

2812

1K0

2K2

1K0

2K2

10u2811
10u

I833

I801

RX2+A

RX2-A

RX1+A

RX1-A

RX0+A

RX0-A

RXC+A
RXC-A

3864

100R

I841

RX2+B

RX2-B

RX1+B

RX1-B

RX0+B

RX0-B

RXC+B

RXC-B

3882

I843

6.3V 47u

I803

UDA1334ATS

+5VHDMI_A

HDMI_HOTPLUG_RESET

I840

3877

2K2

7816

BC847BW

+5VHDMI_B

HDMI_HOTPLUG_RESET

I842

100R

7861
BC847BW

AUDIO DAC

+3V3_SW

+3V3_SW

3804

3803

1R0

1R0

2801

2802
100n

12

14
16

9

I863

VDDD

VREF_DAC

VOUTL
VOUTR

DEEM
CLKOUT

7810

F801

4

Φ

DAC

VSSD

5

A

DOC_SCLA
DOC_SDAA

B

DOC_SCLB

DOC_SDAB

3883

2K2

2805

6.3V 47u
2806

100n

13

BCK

VDDA

SYSCLK

PLL1

DATAI

PLL0

0

SFOR

1

WS

MUTE

VSSA

15

DDC_RESET

DDC_RESET

1

F802

6

3
10
11

7

2

8

+5VHDMI_A

DOC_SDAA
DOC_SCLA

+5VHDMI_B

M24C02-WMN6

1
2
3

M24C02-WMN6

1
2
3

DOC_SDAB
DOC_SCLB

HDMI_INT
RST

IIC_SCL
IIC_SDA

+5VHDMI_A

6831

BAT54 COL

7850

(256x8)

EEPROM

0

ADR

1
2 SDA

+5V_SW

6802

BAT54 COL

7811

(256x8)

EEPROM

0

ADR

1
2 SDA

BSN20

+5V_SW

6830

BAT54 COL

8

Φ

WC

SCL

4

6801

BAT54 COL

84

Φ

WC

SCL

3896
3897 100R

2

1

3

7824

+3V3_SW

1

3807-1

45

3807-4
3807-3

36
27

3807-2

100R

F850

3809

F874

7
6
5

F873

7
6
5

F876
F877

2810
10n

10K

+3V3_SW

8

33R
33R
33R
33R

I845

3830

4K7

3810
4K7

RESRES

4805 4804

I844

RES

RES

3831
47K

3801
47K

+5VHDMI_B

48034802

I828

3884

HDMI_SCK

3832
47K

3802

33R

3885

HDMI_WS

+3V3_SW

+3V3_SW

+3V3_SW

+3V3_SW

7825

BSN20

1

I864
I865
I866

33R

3886

HDMI_SD

2804
100n

+3V3_SW

7851
BSN20

I822

+3V3_SW

3834

7852
BSN20

I823

2803
100n47K

+3V3_SW

7812
BSN20

I820

+3V3_SW

3846

7813
BSN20

F851

2

3

+3V3_SW

HDMI_I2S_SCK

HDMI_I2S_WS

HDMI_I2S_SD

33R

4K7

4K7

I821

3833
4K7

3828

4K7

3850

10K

2809

10n

2813

18p

2828

18p

3815

1M0

I846

I848

RX0+A
RX0-A

RX1+A
RX1-A

RX2+A
RX2-A

RXC+A
RXC-A

RX0+B
RX0-B

RX1+B
RX1-B

RX2+B
RX2-B

RXC+B
RXC-B

7817-3

SII9025CTU

3811

4K7

1823

28M322

3819

146
147
148
149
150
151
152

33R

167

168

166

VIA

VIA

VIA

VIA

153

154

155

7817-1

SII9025CTU

44
43

48
47

52
51

40
39

63
62

67
66

71
70

59
58

104
102
32

31
30

29
28

27
107

NC

9

NC

34
33

56

NC

101

I862

103
97

I847

96
88
86
85
84
78

NC

77

169

156

170

VIA

158

157

+

R0X0

-

+

R0X1

-

+

R0X2

-

+

R0XC

-

+

R1X0

-

+

R1X1

-

+

R1X2

-

+

R1XC

-

INT
RESET

DSCL0
DSDA0

DSCL1
DSDA1

CSCL
CSDA

CLK48B

EVNODD

R0

PWR5V

R1

RSVD_A
RSVDL

SCDT
XTALIN

XTALOUT

MCLKOUT
SCK

WS

SD0
SPDIF

MUTEOUT

159
160
161
162
163
164
165

MAIN

NC

Q

HSYNC

VSYNC

ODCK

SII9025CTU

100
144

0

143

1

142

2

141

3

140

4

137

5

136

6

133

7

132

8

131

9

130

10

129

11

126

12

125

13

124

14

123

15

119

16

118

17

117

18

116

19

113

20

112

21

111

22

110

23

DE

121

7817-2

6
7

8
10
11
12
13
14
17
18
19
20
81
82
83
87
93

1

2

3

+3V3_SW

5817

38

41

NC

120R

42

45495360646872

1n0

100n

2817

2816

100n

100n

2830

28292847

1n0

1n0

1n0

1n0

2850

2849

1n0

1n0

1n0

2868

2865

2867

2866 1n0 2848

4650576165

69

AUDPVCC18AVCC

AGND AUDPGND

+1V8S_SW

5810

120R

95 94

2818 100n

222335

21

5811

I852I850 I851

100n

28192833

100n

2851

2869

7992105

74

738091

24

36

5813

100n

100n

2836

2835

1n0

1n0

1n0

2855

2854

2853

1n0

1n0

1n0

2871

2872

2870

516267689

139

4

152575

127

138

33R3835
18
27

33R3851-3

36

45

8

18
27

8

45

8

45

33R3857

33R

33R3860

+3V3_SW

33R
33R

33R1
33R27
33R
33R45

33R3853-1
33R3853-2

33R3853-4 4 5
33R3854-1 1
33R
33R36
33R3854-4

33R3855-1 1
33R27
33R36
33R45
33R18
33R27
33R36

+1V8S_SW

+1V8S_SW

5812

120R

120R

I858

1n0

1n0

2852

1n0

114

128

CVCC18 IOVCC

POWER

CGND IOGND

106

115

3851-1
3851-2

3851-4 33R
3852-1
3852-2
3852-3 3 6
3852-4

3853-3 33R36

3854-2 2 7
3854-3

3855-2
3855-3
3855-4
3856-1
3856-2
3856-3
3856-4 33R

3858 33R
3859

120R

100n

2838

90

+3V3_SW

5814

122

109

108

120

120R

100n

100n

2839

2840

1n0

1n0

2856

2857

1n0

1n0

2873

2874

1343755

01

PVCC

TMDS
PGND

135

HDMI_Cb(0)
HDMI_Cb(1)
HDMI_Cb(2)
HDMI_Cb(3)
HDMI_Cb(4)
HDMI_Cb(5)
HDMI_Cb(6)
HDMI_Cb(7)

HDMI_Y(0)

HDMI_Y(1)
HDMI_Y(2)
HDMI_Y(3)
HDMI_Y(4)
HDMI_Y(5)
HDMI_Y(6)
HDMI_Y(7)

HDMI_Cr(0)

HDMI_Cr(1)
HDMI_Cr(2)
HDMI_Cr(3)
HDMI_Cr(4)
HDMI_Cr(5)
HDMI_Cr(6)
HDMI_Cr(7)

I813
F805
F806

I814

5815

1n0

2858

1n0

1n0

2876

2875

995498

REGVCC

XTALVCC

GND_HS

F875

145

HDMI_Cb(0:7)

HDMI_Y(0:7)

HDMI_Cr(0:7)

HDMI_DE

HDMI_H
HDMI_V

HDMI_VCLK

B06C B06C

A

1810

DC1R019JBAR190

1
2
3
4
5
6
7
8

9
10
11

B

C

D

E

F

G

H

I

12
13
14
15

HDMI CONNECTOR-1

16
17
18
19

2021
2223

1811

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15

HDMI CONNECTOR-2

16
17
18
19

HDMI_AUDIO_IN_R
HDMI_AUDIO_IN_L

3139 123 6261.1

12345678910111213

+3V3_SW

+3V3_SW

5816

120R

120R

5818

I856I857I855I853 I854

100n

100n

2843

2845

2844

1n0 100n

1n0

1n0

2861

2860

2859

G_16860_013.eps

240107

+3V3_SW

120R

A

B

C

D

E

F

G

H

I

1810 A1
1811 D1
1823 H8
2801 G3
2802 H3
2803 C7
2804 A7
2805 G3
2806 H3
2807 H2
2808 H2
2809 H8
2810 H6
2811 H2
2812 I2
2813 H8
2814 I2
2815 I2
2816 B11
2817 B11
2818 C11
2819 B11
2828 H8
2829 B10
2830 B10
2833 B11
2835 B12
2836 B12
2838 B12
2839 B12
2840 B12
2843 B13
2844 B13
2845 B13
2847 C10
2848 C10
2849 C11
2850 C11
2851 C11
2852 C11
2853 C12
2854 C12
2855 C12
2856 C12
2857 C12
2858 C13
2859 C13
2860 C13
2861 C13
2865 C10
2866 C10
2867 C11
2868 C11
2869 C11
2870 C12
2871 C12
2872 C12
2873 C12
2874 C12
2875 C13
2876 C13
3801 C6
3802 C7
3803 G3
3804 G3
3805 I2
3806 I2
3807-1 I5
3807-2 I5
3807-3 I5
3807-4 I5
3809 H5
3810 C6
3811 H8
3815 H8
3819 I8
3828 D7
3830 A6
3831 A6
3832 A7
3833 B7
3834 B7
3835 E11
3846 E7
3850 H7
3851-1 E11
3851-2 E11
3851-3 E11
3851-4 F11
3852-1 F11
3852-2 F11
3852-3 F11
3852-4 F11
3853-1 F11
3853-2 F11
3853-3 G11
3853-4 G11
3854-1 G11
3854-2 G11
3854-3 G11
3854-4 G11
3855-1 H11
3855-2 H11
3855-3 H11
3855-4 H11
3856-1 H11
3856-2 H11
3856-3 H11
3856-4 I11
3857 I11
3858 I11
3859 I11
3860 I11
3862 B2
3863 C2
3864 C2
3877 C3
3880 E2

3881 F2
3882 F2
3883 F3
3884 I6
3885 I7
3886 I7
3896 G5
3897 G5
4802 H6
4803 H6
4804 A6
4805 C6
5810 A11
5811 A11
5812 A11
5813 A12
5814 A12
5815 A13
5816 A13
5817 A10
5818 A13
6801 C5
6802 C5
6830 A5
6831 A5
7810 I3
7811 C5
7812 D7
7813 E7
7814 C2
7816 C3
7817-1 E9
7817-2 D10
7817-3 C9
7824 H5
7825 H7
7850 A5
7851 B7
7852 B7
7860 F2
7861 F3
F801 G3
F802 H4
F805 I12
F806 I12
F832 A1
F840 B1
F841 B1
F842 B1
F843 B1
F850 H6
F851 H7
F861 D1
F869 E1
F870 E1
F871 E1
F872 E1
F873 C6
F874 A6
F875 D13
F876 F6
F877 G6
I801 H2
I802 H2
I803 H3
I804 I2
I805 I2
I806 I2
I813 I12
I814 I12
I820 D7
I821 E7
I822 B7
I823 C7
I828 I6
I831 C2
I833 C2
I840 C3
I841 C3
I842 F3
I843 F3
I844 G6
I845 G6
I846 H8
I847 H9
I848 I8

0

I850 A1
I851 A11
I852 A11
I853 A12
I854 A12
I855 A13
I856 A13
I857 A13
I858 A11
I861 F2
I862 H9
I863 H3
I864 I7
I865 I7
I866 I7

Circuit Diagrams and PWB Layouts

SSB: Headphone Amp & Muting

52LC7.2E LA 7.

1234567

B06D B06D

A

B

C

D

E

F

3139 123 6261.1

HEADPHONE AMP & MUTING

F908

SC2_CVBS_MON_OUT_ITV

HP_AUDIO_OUT_R

MUTING CIRCUIT

ANTI_PLOP

POWER_DOWN

I914

STANDBY

MUTEn

3937

10K

3938

0V

2902

470n

ITV Connector E

1901

6

5

2904

470n

I911

3911

10K

I913

BAT54 COL

I916

10K

0V

7919
BC847BW

6914

I915

1
2
3
4

3V3

F910

F905

3V3

+3V3_STBY

3935

4K7

2940

HPIC_LINHP_AUDIO_OUT_L

HPIC_RIN

+3V3_STBY

BC857BW

3934

4K7

6.3V47u

7902

3901

47K

3906

100K

3905

47K

470n

2907

0V

7917

BC857BW

I917

I901

3907
100K

I912

4901

0V

+3V3_STBY

RES

F901

F904

6916

BAS316

3940

2901

3902 120K

2V6
2

2V6
3

2905

2V6

6

2V6

5

10K

3912

I918

10K

6919

33p

7901-1

4

TS482IDT

1

2V6

8

5V3

33p

120K3908

7901-2
TS482IDT

7

2V6

84

5V3

BAS316

3917

1K0

3918

1K0

3913

1K0

3914

1K0

3915

1K0

3916

1K0

HPIC_LOUT

+5V_SW

2908
220n

I924

2913
220n

HPIC_ROUT

1

1

1

1

1

1

I903

I902

2906

100u

3

7911
BC847BW

2

3

7912
BC847BW

2

3

7913
BC847BW

2

3

7914
BC847BW

2

3

7915
BC847BW

2

3

7916
BC847BW

2

2903

16V

3942

1K0

4902

RES

3903

33R

3904

I904

I923

3943

10K

33R

RES

3909

33R

3910

33R

7922
BC847BW

16V100u

I905

FOR NON SIDE IO

EMC

F902

EMC

F903

EMC

I919

I920

I921

I922

2911

10n

2909

EMC

10n

1900

2

YKB21-5157N

13

2910

10n

2912

10n

4903

SC1_AUDIO_MUTE_R

SC1_AUDIO_MUTE_L

SC2_AUDIO_MUTE_R

SC2_AUDIO_MUTE_L

ENGAGE

1234567

HP_LOUT

HP_ROUT

G_16860_014.eps

250107

A

B

C

D

E

F

1900 B7
1901 B2
2901 A4
2902 A2
2903 B5
2904 C2
2905 B4
2906 C5
2907 C3
2908 B5
2909 A7
2910 C7
2911 A7
2912 C7
2913 B5
2940 E2
3901 A3
3902 A4
3903 A6
3904 B6
3905 C3
3906 B3
3907 C3
3908 B4
3909 B6
3910 C6
3911 D2
3912 D4
3913 D4
3914 E4
3915 E4
3916 F4
3917 C4
3918 D4
3934 E3
3935 E2
3937 E1
3938 E2
3940 F3
3942 F5
3943 F6
4901 D3
4902 A7
4903 C7
6914 E2
6916 E3
6919 F4
7901-1 A4
7901-2 B4
7902 D3
7911 C5
7912 D5
7913 D5
7914 E5
7915 E5
7916 F5
7917 E3
7919 E2
7922 F6
F901 B3
F902 B6
F903 C6
F904 C3
F905 D2
F908 A2
F910 B2
I901 A3
I902 B5
I903 C5
I904 B6
I905 C5
I911 D2
I912 D3
I913 E2
I914 E1

I915 E2
I916 E2
I917 E3
I918 E4
I919 D6
I920 E6
I921 E6
I922 F6
I923 F6
I924 B5

Item Description

1901 CON V 4P M 1.00 SM SR R
2901 CER1 0603 NP0 50V 33P COL
2902 CER2 0603 Y5V 10V 470N COL
2903 ELCAP SM 16V 100U PM20 COL R
2904 CER2 0603 Y5V 10V 470N COL
2905 CER1 0603 NP0 50V 33P COL
2906 ELCAP SM 16V 100U PM20 COL R
2907 CER2 0603 Y5V 10V 470N COL
2909 CER2 0603 X7R 50V 10N COL
2910 CER2 0603 X7R 50V 10N COL
2911 CER2 0603 X7R 50V 10N COL
2912 CER2 0603 X7R 50V 10N COL
3901 RST SM 0603 47K PM5 COL
3902 RST SM 0603 RC21 120K PM5 R
3904 RST SM 0603 33R PM5 COL
3905 RST SM 0603 47K PM5 COL
3906 RST SM 0603 100K PM5 COL
3907 RST SM 0603 100K PM5 COL
3908 RST SM 0603 RC21 120K PM5 R
3910 RST SM 0603 33R PM5 COL
3917 RST SM 0603 1K PM5 COL
3918 RST SM 0603 1K PM5 COL
4902 RST SM 0603 JUMP. 0R05 COL
4903 RST SM 0603 JUMP. 0R05 COL
7901 IC SM TS482ID (ST00) R
7911 TRA SIG SM BC847BW (COL) R
7912 TRA SIG SM BC847BW (COL) R

EU iTV

non-iTV

US iTV

SSB: Audio

Circuit Diagrams and PWB Layouts

53LC7.2E LA 7.

1234567891011

AUDIO_LS_R

ENGAGE

STANDBYn

AUDIO

*

3A03
3A04
3A06
3A07
3A08
3A11

FA05

*

3A03

3A06

FA06

*

3A07 1u0

*

FA09

*

3A11

FA12

LCD PDP

10K 6K8
12K 22K
10K 6K8
10K 6K8
12K 22K
10K 6K8

IA01

2A11 1u0

3A04

2A15 1u0
2A16

2A20

1u0

3A13 39K

2A29

*

3A08

*

2A22

3A26 22K

3A19

10K

IA05

IA10

IA11 IA12

VSSA

VSSA

IA02

100n
100n2A24

GNDSND

100n

GNDSND

IA06

IA09

2A40

IA19

IA21

470n

2A12
220p

2A19

220p

IA13
IA15

IA33

IA22

NC

EMC

2A32

1n0

TDA8932T

2

-2V8
3

-2V8
15

-2V8
14

-2V8
12

-7V6
10

31

11

-8V2
18

4V7

5

3V2

6

-2V6
13

7A01

IN1P

IN1N

IN2P

IN2N

INREF

OSCREF

OSCIO

HVPREF

DREF

ENGAGE

POWERUP

TEST

CGND VSSA

7

GNDSND

VDDA

8

VDDA

Φ

CLASS D

POWER

AMPLIFIER

VSSP

9

26

VSSA

GNDSND

VDD

100n2A09

23

+AUDIO_POWER

+AUDIO_POWER

100n

2A10

GNDSNDGNDSND

29

20

VDDP

BOOT1

BOOT2

STAB1

STAB2

VSSD|HW

1

161732

100n2A33

2A34 100n

GNDSND

OUT1

OUT2

DIAG

HVP1

HVP2

25

24

27

22

4

30

19

28

21

VSSA
VSS

-1V3

2V6

NC

NC
8V9

3V9

IA18

5A07

60R

FA01

IA03

IA07
EMC

FA04

3A12

2A25 15n

IA14

2A27 15n

IA16

3A15

2A30
100n

VSS

2A47 2A46

GNDSND

3A01

2A18
1n0

GNDSND

IA41

1M0

1M0

IA40

RES

4A01

4A02

RES

47n

47n

10R

GNDSND

30R5A05

GNDSND

+AUDIO_POWER_+12V_DISP

IA24

11V9

2A01
100n

IA26

12V2

2A04
220u

25V

IA23

3A09

10R

IA35

2A21

1n0

IA36

2A35

1n0

GNDSND

IA20

3A17

10R

IA38

2A31
1n0

IA39

2A36
1n0

GNDSND

5A03

22u

5A04

22u

VDDA

-AUDIO_POWER

VDD

GNDSND

2A45

1n0

2A14

470n

2A28
470n

FA02

2A17

1n0

2A23

1n0

GNDSND

3A02

5A06 30R

IA34

2A13

220n

IA37

2A26

220n

10R

2A38

220n

IA25

GNDSND

IA27

GNDSND

2A37

220n

2A02

100n

2A08

220u 25V

IA04

IA17

-12V2

+12V2

3A14

22R

3A05

22R

GNDSND

VSSA

VSS

GNDSND

3A27
220K

3A28
220K

IA29

2A41

GNDSND

7A06
BC847BW

GNDSND

1u0

TO SPEAKERS

FA07
FA08

FA10
FA11

VDD

47K

IA31

3A29

IA30

3A30

47K

7A07
BC847BW

BC857BW

FA32

3A31

GNDSND

DC-DETECTION

1735

B4B-PH-K

7A05

DC_PROT

10K

B07 B07

A

B

C

D

E

F

AUDIO_LS_L

G

3139 123 6261.1

123456789

10 11

LEFT +

1

GND

2
3

GND

4

RIGHT -

G_16860_015.eps

240107

A

B

C

D

E

F

G

1735 D11
2A01 B7
2A02 B9
2A04 C7
2A08 B9
2A09 D5
2A10 D5
2A11 D3
2A12 D4
2A13 D8
2A14 D8
2A15 D3
2A16 D3
2A17 D8
2A18 D6
2A19 D4
2A20 E3
2A21 D7
2A22 E3
2A23 E8
2A24 E3
2A25 E6
2A26 E8
2A27 E6
2A28 E8
2A29 E3
2A30 F6
2A31 F7
2A32 F4
2A33 F5
2A34 F5
2A35 E7
2A36 F7
2A37 D8
2A38 E8
2A40 F3
2A41 F9
2A45 E7
2A46 A6
2A47 B6
3A01 B6
3A02 B8
3A03 D2
3A04 D3
3A05 D9
3A06 D2
3A07 D2
3A08 D3
3A09 D7
3A11 E2
3A12 E6
3A13 E3
3A14 E9
3A15 E6
3A17 E7
3A19 F3
3A26 E3
3A27 F9
3A28 F9
3A29 E10
3A30 E10
3A31 F11
4A01 A6
4A02 A6
5A03 C7
5A04 E7
5A05 B6
5A06 B8
5A07 A6
7A01 D4
7A05 E11
7A06 F10
7A07 F10
FA01 C6
FA02 B8
FA04 D6
FA05 D2
FA06 D2
FA07 D11
FA08 D11
FA09 E2
FA10 D11
FA11 D11
FA12 E2
FA32 E11
IA01 D3

IA02 D3
IA03 D6
IA04 D9
IA05 D3
IA06 D4
IA07 D6
IA09 D4
IA10 D3
IA11 E3
IA12 E3
IA13 E4
IA14 E6
IA15 E4
IA16 E6
IA17 E9
IA18 E5
IA19 E4
IA20 E6
IA21 F4
IA22 F4
IA23 D6
IA24 B7
IA25 B9
IA26 B7
IA27 B9
IA29 F10
IA30 E10
IA31 E10
IA33 E4
IA34 C8
IA35 D7
IA36 D7
IA37 E8
IA38 E7
IA39 F7
IA40 A7
IA41 A6

SSB: SRP List

1.1. Introduction

SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains
references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal
names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100%
correct. In addition, in the current crowded schematics there is often none or very little place for these references.
Some of the PW
reference list for a schematic, or there will be printed references in the schematic.

1.2. Non-SRP Schematics

There are several different signals available in a schematic:

1.2.1. Power Supply Lines

All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not
indicated where supplies are coming from or going to.
It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic).

Outgoing Incoming

1.2.2. Normal Signals

For normal signals, a schematic reference (e.g. B14b) is placed next to the signals.

B14b

1.2.3. Grounds

For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

1.3. SRP Schematics

SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used.
A reference is created for all signals indicated with an SRP symbol, these symbols are:

name name

name name

name

name

Remarks:

• When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal
name in the SRP list.

• All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep
it concise.

• Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included
in the SRP reference list, but only with one reference.

Additional Tip:

When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the
schematics. In Adobe PDF reader:

• Select the signal name you want to search for, with the "Select text" tool.

• Copy and paste the signal name in the "Search PDF" tool.

• Search for all occurrences of the signal name.

• Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to
"zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete
schematic.

PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version.

3104 313 6261.1

B schematics will use SRP while others will still use the manual references. Either there will be an SRP

+5V +5V

signal_name

+5V +5V

name name

Bi-directional line (e.g. SDA) into a wire tree.

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets).

Circuit Diagrams and PWB Layouts

Power supply line.

Stand alone signal or switching line (used as less as possible).

Signal line into a wire tree.

Switching line into a wire tree.

54LC7.2E LA 7.

Netname Schematic

+12V_DISP B02 (1x)
+12V_DISP B04A (1x)
+12V_DISP B04B (1x)
+1V2_MOJO B02 (1x)
+1V2_MOJO B03D (2x)
+1V8S_SW B02 (1x)
+1V8S_SW B03B (2x)
+1V8S_SW B03F (1x)
+1V8S_SW B04B (3x)
+1V8S_SW B06C (3x)
+3V3 B03B (3x)
+3V3 B03C (3x)
+3V3 B03D (8x)
+3V3 B03E (2x)
+3V3 B03F (1x)
+3V3_BUF B03C (4x)
+3V3_CORE B03C (2x)
+3V3_MOJO B02 (1x)
+3V3_MOJO B03F (2x)
+3V3_NOR48 B03E (4x)
+3V3_STBY B02 (1x)
+3V3_STBY B04A (30x)
+3V3_STBY B06D (3x)
+3V3_STV B03C (10x)
+3V3_SW B02 (1x)
+3V3_SW B04A (8x)
+3V3_SW B04B (13x)
+3V3_SW B06C (19x)
+3V3_VDDP B03D (3x)
+3V3clean B03D (1x)
+3V3clean B03F (1x)
+3V3FE B03B (5x)
+5V_AUD B04C (3x)
+5V_D B04C (2x)
+5V_IF B03A (4x)
+5V_STANDBY B02 (4x)
+5V_STANDBY B04A (4x)
+5V_STANDBY B04B (2x)
+5V_SW B02 (6x)
+5V_SW B03A (4x)
+5V_SW B03B (9x)
+5V_SW B03C (2x)
+5V_SW B03E (3x)
+5V_SW B04A (1x)
+5V_SW B04B (2x)
+5V_SW B04C (2x)
+5V_SW B06A (2x)
+5V_SW B06B (2x)
+5V_SW B06D (1x)
+5VHDMI_A B06C (3x)
+5VHDMI_B B06C (3x)
+5VS B03A (3x)
+8V B04C (2x)
+AUDIO_POWER B02 (1x)
+AUDIO_POWER B04C (1x)
+AUDIO_POWER B06A (1x)
+AUDIO_POWER B07 (1x)
+IO_POWER B06A (10x)
+IO_POWER B06B (7x)
+VTUN B02 (1x)
+VTUN B03A (1x)
+VTUN B04A (1x)
10046_TDO B03B (1x)
10046_TDO B03D (1x)
4MHZ_CLK B03A (1x)
4MHZ_CLK B03B (1x)
4MHz_MOJO B03B (1x)
4MHz_MOJO B03D (1x)
A(0) B04A (1x)
A(0) B04B (1x)
A(0:7) B04A (1x)
A(0:7) B04B (1x)
A(1) B04A (2x)
A(1) B04B (1x)
A(1:7) B04A (1x)
A(10) B04A (2x)
A(11) B04A (2x)
A(12) B04A (2x)
A(13) B04A (2x)
A(14) B04A (2x)
A(15) B04A (2x)
A(16) B04A (2x)
A(17) B04A (2x)
A(18) B04A (2x)
A(19) B04A (2x)
A(2) B04A (2x)
A(2) B04B (1x)
A(3) B04A (2x)
A(3) B04B (1x)
A(4) B04A (2x)
A(4) B04B (1x)
A(5) B04A (2x)
A(5) B04B (1x)
A(6) B04A (2x)
A(6) B04B (1x)
A(7) B04A (2x)
A(7) B04B (1x)
A(8) B04A (2x)
A(8:19) B04A (2x)
A(9) B04A (2x)
A_MICLK B03C (1x)
A_MISTRT B03C (1x)
A_MIVAL B03C (1x)
A_MOCLK B03C (1x)
A_MOSTRT B03C (1x)
A_MOVAL B03C (1x)
AD(0) B04A (2x)
AD(0) B04B (1x)
AD(0:7) B04A (2x)
AD(0:7) B04B (1x)
AD(1) B04A (2x)
AD(1) B04B (1x)
AD(2) B04A (2x)
AD(2) B04B (1x)
AD(3) B04A (2x)
AD(3) B04B (1x)
AD(4) B04A (2x)
AD(4) B04B (1x)
AD(5) B04A (2x)
AD(5) B04B (1x)
AD(6) B04A (2x)
AD(6) B04B (1x)
AD(7) B04A (2x)
AD(7) B04B (1x)

ALE_EMU B04A (1x)
ALE_EMU B04B (1x)
ANTI_PLOP B04A (1x)
ANTI_PLOP B06D (1x)
AUDIO_LS_L B04C (1x)
AUDIO_LS_L B07 (1x)
AUDIO_LS_R B04C (1x)
AUDIO_LS_R B07 (1x)

-AUDIO_POWER B02 (1x)

-AUDIO_POWER B07 (1x)
BACKLIGHT_BOOST B02 (1x)
BACKLIGHT_BOOST B04A (1x)
BL_ADJUST B02 (1x)
BL_ADJUST B04A (1x)
BL_ADJUST B04B (1x)
BL_ON_OFF B02 (1x)
BL_ON_OFF B04A (1x)
BOLT_ON_SCL B04A (2x)
BOLT_ON_SDA B04A (2x)
CE B04A (1x)
COMP_AUDIO_IN_L B04C (1x)
COMP_AUDIO_IN_L B06A (1x)
COMP_AUDIO_IN_R B04C (1x)
COMP_AUDIO_IN_R B06A (1x)
CPU_RST B04A (1x)
CS B04A (1x)
CS B04B (1x)
CTRL_DISP1 B04B (2x)
CTRL_DISP1_up B04A (1x)
CTRL_DISP1_up B04B (1x)
CTRL_DISP2 B04B (2x)
CTRL_DISP3 B04B (2x)
CTRL_DISP4 B04B (2x)
CTRL_DISP4_up B04A (1x)
CTRL_DISP4_up B04B (1x)
CVBS_RF B03A (1x)
CVBS_RF B04B (1x)
CX_AVDD_ADC1 B04B (2x)
CX_AVDD_ADC2 B04B (2x)
CX_AVDD_ADC3 B04B (2x)
CX_AVDD_ADC4 B04B (2x)
CX_AVDD3_ADC1 B04B (2x)
CX_AVDD3_ADC2 B04B (2x)
CX_AVDD3_BG_ASS B04B (2x)
CX_AVDD3_OUTBUF B04B (2x)
CX_PAVDD B04B (2x)
CX_PAVDD1 B04B (2x)
CX_PAVDD2 B04B (2x)
CX_PDVDD B04B (2x)
DC_PROT B04A (1x)
DC_PROT B07 (1x)
DDC_RESET B04A (1x)
DDC_RESET B06C (2x)
DVB_SW B03A (1x)
DVB_SW B04A (1x)
E_PAGE B04A (1x)
ENGAGE B06D (1x)
ENGAGE B07 (1x)
FE_LOCK B03B (1x)
FE_LOCK B03D (1x)
FRONT_C_IN B04B (1x)
FRONT_C_IN B06A (1x)
FRONT_Y_CVBS_IN B04B (1x)
FRONT_Y_CVBS_IN B06A (1x)
GNDDC B02 (1x)
GNDSND B02 (3x)
GNDSND B07 (21x)
GNDTUN B02 (1x)
HD_PB_IN B04B (1x)
HD_PB_IN B06A (2x)
HD_PR_IN B04B (1x)
HD_PR_IN B06A (2x)
HD_Y_IN B04B (1x)
HD_Y_IN B06A (2x)
HDMI_AUDIO_IN_L B04C (1x)
HDMI_AUDIO_IN_L B06C (1x)
HDMI_AUDIO_IN_R B04C (1x)
HDMI_AUDIO_IN_R B06C (1x)
HDMI_Cb(0) B04B (1x)
HDMI_Cb(0) B06C (1x)
HDMI_Cb(0:7) B04B (1x)
HDMI_Cb(0:7) B06C (1x)
HDMI_Cb(1) B04B (1x)
HDMI_Cb(1) B06C (1x)
HDMI_Cb(2) B04B (1x)
HDMI_Cb(2) B06C (1x)
HDMI_Cb(3) B04B (1x)
HDMI_Cb(3) B06C (1x)
HDMI_Cb(4) B04B (1x)
HDMI_Cb(4) B06C (1x)
HDMI_Cb(5) B04B (1x)
HDMI_Cb(5) B06C (1x)
HDMI_Cb(6) B04B (1x)
HDMI_Cb(6) B06C (1x)
HDMI_Cb(7) B04B (1x)
HDMI_Cb(7) B06C (1x)
HDMI_Cr(0) B04B (1x)
HDMI_Cr(0) B06C (1x)
HDMI_Cr(0:7) B04B (1x)
HDMI_Cr(0:7) B06C (1x)
HDMI_Cr(1) B04B (1x)
HDMI_Cr(1) B06C (1x)
HDMI_Cr(2) B04B (1x)
HDMI_Cr(2) B06C (1x)
HDMI_Cr(3) B04B (1x)
HDMI_Cr(3) B06C (1x)
HDMI_Cr(4) B04B (1x)
HDMI_Cr(4) B06C (1x)
HDMI_Cr(5) B04B (1x)
HDMI_Cr(5) B06C (1x)
HDMI_Cr(6) B04B (1x)
HDMI_Cr(6) B06C (1x)
HDMI_Cr(7) B04B (1x)
HDMI_Cr(7) B06C (1x)
HDMI_DE B04B (1x)
HDMI_DE B06C (1x)
HDMI_H B04B (1x)
HDMI_H B06C (1x)
HDMI_HOTPLUG_RESET B04A (1x)
HDMI_HOTPLUG_RESET B06C (2x)
HDMI_INT B04A (1x)
HDMI_INT B06C (1x)
HDMI_V B04B (1x)
HDMI_V B06C (1x)
HDMI_VCLK B04B (1x)
HDMI_VCLK B06C (1x)

HDMI_Y(0) B04B (1x)
HDMI_Y(0) B06C (1x)
HDMI_Y(0:7) B04B (1x)
HDMI_Y(0:7) B06C (1x)
HDMI_Y(1) B04B (1x)
HDMI_Y(1) B06C (1x)
HDMI_Y(2) B04B (1x)
HDMI_Y(2) B06C (1x)
HDMI_Y(3) B04B (1x)
HDMI_Y(3) B06C (1x)
HDMI_Y(4) B04B (1x)
HDMI_Y(4) B06C (1x)
HDMI_Y(5) B04B (1x)
HDMI_Y(5) B06C (1x)
HDMI_Y(6) B04B (1x)
HDMI_Y(6) B06C (1x)
HDMI_Y(7) B04B (1x)
HDMI_Y(7) B06C (1x)
HP_AUDIO_OUT_L B04C (1x)
HP_AUDIO_OUT_L B06D (1x)
HP_AUDIO_OUT_R B04C (1x)
HP_AUDIO_OUT_R B06D (1x)
I2C_LOCAL_SCL B03B (1x)
I2C_LOCAL_SCL B03C (1x)
I2C_LOCAL_SCL B03D (1x)
I2C_LOCAL_SCL B03E (1x)
I2C_LOCAL_SDA B03B (1x)
I2C_LOCAL_SDA B03C (1x)
I2C_LOCAL_SDA B03D (1x)
I2C_LOCAL_SDA B03E (1x)
I2C_TDA_SCL B03A (1x)
I2C_TDA_SCL B03B (1x)
I2C_TDA_SDA B03A (1x)
I2C_TDA_SDA B03B (1x)
IBO_B_IN B03F (1x)
IBO_B_IN B04B (1x)
IBO_CVBS_IN B03F (1x)
IBO_CVBS_IN B04B (1x)
IBO_G_IN B03F (1x)
IBO_G_IN B04B (1x)
IBO_IRQ B03D (1x)
IBO_IRQ B04A (1x)
IBO_R_IN B03F (1x)
IBO_R_IN B04B (1x)
IF_AGC_IBO B03A (1x)
IF_AGC_IBO B03B (1x)
IF_ATV B03A (2x)
IIC_SCL B03A (2x)
IIC_SCL B03D (1x)
IIC_SCL B04A (1x)
IIC_SCL B04B (2x)
IIC_SCL B04C (1x)
IIC_SCL B06C (1x)
IIC_SCL_up B04A (2x)
IIC_SDA B03A (2x)
IIC_SDA B03D (1x)
IIC_SDA B04A (1x)
IIC_SDA B04B (2x)
IIC_SDA B04C (1x)
IIC_SDA B06C (1x)
IIC_SDA_up B04A (2x)
INT B04A (1x)
INT B04B (1x)
ISP B04A (1x)
ITV_SPI_CLK B04A (2x)
ITV_SPI_DATA_IN B04A (2x)
JTAG_TCK B03B (1x)
JTAG_TCK B03C (1x)
JTAG_TCK B03D (1x)
JTAG_TMS B03B (1x)
JTAG_TMS B03C (1x)
JTAG_TMS B03D (1x)
JTAG_TRST B03B (1x)
JTAG_TRST B03C (1x)
JTAG_TRST B03D (1x)
KEYB B04A (2x)
LCD_PWR_ON B04A (1x)
LCD_PWR_ON B04B (1x)
LED1 B04A (2x)
LED2 B04A (2x)
LIGHT_SENSOR B04A (2x)
MIU_ADDR(0) B03C (1x)
MIU_ADDR(0) B03D (1x)
MIU_ADDR(0:24) B03D (1x)
MIU_ADDR(1) B03C (1x)
MIU_ADDR(1) B03D (1x)
MIU_ADDR(1) B03E (1x)
MIU_ADDR(10) B03C (1x)
MIU_ADDR(10) B03D (1x)
MIU_ADDR(10) B03E (1x)
MIU_ADDR(11) B03C (1x)
MIU_ADDR(11) B03D (1x)
MIU_ADDR(11) B03E (1x)
MIU_ADDR(12) B03C (1x)
MIU_ADDR(12) B03D (1x)
MIU_ADDR(12) B03E (1x)
MIU_ADDR(13) B03C (1x)
MIU_ADDR(13) B03D (1x)
MIU_ADDR(13) B03E (1x)
MIU_ADDR(14) B03C (1x)
MIU_ADDR(14) B03D (1x)
MIU_ADDR(14) B03E (1x)
MIU_ADDR(15) B03C (1x)
MIU_ADDR(15) B03D (1x)
MIU_ADDR(15) B03E (1x)
MIU_ADDR(16) B03C (1x)
MIU_ADDR(16) B03D (1x)
MIU_ADDR(16) B03E (1x)
MIU_ADDR(17) B03C (1x)
MIU_ADDR(17) B03D (1x)
MIU_ADDR(17) B03E (1x)
MIU_ADDR(18) B03C (1x)
MIU_ADDR(18) B03D (1x)
MIU_ADDR(18) B03E (1x)
MIU_ADDR(19) B03C (1x)
MIU_ADDR(19) B03D (1x)
MIU_ADDR(19) B03E (1x)
MIU_ADDR(2) B03C (1x)
MIU_ADDR(2) B03D (1x)
MIU_ADDR(2) B03E (1x)
MIU_ADDR(20) B03C (1x)
MIU_ADDR(20) B03D (1x)
MIU_ADDR(20) B03E (1x)
MIU_ADDR(21) B03C (1x)
MIU_ADDR(21) B03D (1x)
MIU_ADDR(21) B03E (1x)

MIU_ADDR(22) B03C (1x)
MIU_ADDR(22) B03D (1x)
MIU_ADDR(22) B03E (1x)
MIU_ADDR(23) B03C (1x)
MIU_ADDR(23) B03D (1x)
MIU_ADDR(24) B03C (1x)
MIU_ADDR(24) B03D (1x)
MIU_ADDR(3) B03C (1x)
MIU_ADDR(3) B03D (1x)
MIU_ADDR(3) B03E (1x)
MIU_ADDR(4) B03C (1x)
MIU_ADDR(4) B03D (1x)
MIU_ADDR(4) B03E (1x)
MIU_ADDR(5) B03C (1x)
MIU_ADDR(5) B03D (1x)
MIU_ADDR(5) B03E (1x)
MIU_ADDR(6) B03C (1x)
MIU_ADDR(6) B03D (1x)
MIU_ADDR(6) B03E (1x)
MIU_ADDR(7) B03C (1x)
MIU_ADDR(7) B03D (1x)
MIU_ADDR(7) B03E (1x)
MIU_ADDR(8) B03C (1x)
MIU_ADDR(8) B03D (1x)
MIU_ADDR(8) B03E (1x)
MIU_ADDR(9) B03C (1x)
MIU_ADDR(9) B03D (1x)
MIU_ADDR(9) B03E (1x)
MIU_DATA(0) B03C (1x)
MIU_DATA(0) B03D (1x)
MIU_DATA(0) B03E (1x)
MIU_DATA(0:15) B03D (1x)
MIU_DATA(0:15) B03E (1x)
MIU_DATA(1) B03C (1x)
MIU_DATA(1) B03D (1x)
MIU_DATA(1) B03E (1x)
MIU_DATA(10) B03D (1x)
MIU_DATA(10) B03E (1x)
MIU_DATA(11) B03D (1x)
MIU_DATA(11) B03E (1x)
MIU_DATA(12) B03D (1x)
MIU_DATA(12) B03E (1x)
MIU_DATA(13) B03D (1x)
MIU_DATA(13) B03E (1x)
MIU_DATA(14) B03D (1x)
MIU_DATA(14) B03E (1x)
MIU_DATA(15) B03D (1x)
MIU_DATA(15) B03E (1x)
MIU_DATA(2) B03C (1x)
MIU_DATA(2) B03D (1x)
MIU_DATA(2) B03E (1x)
MIU_DATA(3) B03C (1x)
MIU_DATA(3) B03D (1x)
MIU_DATA(3) B03E (1x)
MIU_DATA(4) B03C (1x)
MIU_DATA(4) B03D (1x)
MIU_DATA(4) B03E (1x)
MIU_DATA(5) B03C (1x)
MIU_DATA(5) B03D (1x)
MIU_DATA(5) B03E (1x)
MIU_DATA(6) B03C (1x)
MIU_DATA(6) B03D (1x)
MIU_DATA(6) B03E (1x)
MIU_DATA(7) B03C (1x)
MIU_DATA(7) B03D (1x)
MIU_DATA(7) B03E (1x)
MIU_DATA(8) B03D (1x)
MIU_DATA(8) B03E (1x)
MIU_DATA(9) B03D (1x)
MIU_DATA(9) B03E (1x)
MIU_OEN B03C (1x)
MIU_OEN B03D (1x)
MIU_OEN B03E (1x)
MIU_RDY B03C (1x)
MIU_RDY B03D (1x)
MIU_WEN B03C (1x)
MIU_WEN B03D (1x)
MIU_WEN B03E (1x)
MOJO_I2S_OUT_SCK B03D (1x)
MOJO_I2S_OUT_SCK B04C (1x)
MOJO_I2S_OUT_SD B03D (1x)
MOJO_I2S_OUT_SD B04C (1x)
MOJO_I2S_OUT_WS B03D (1x)
MOJO_I2S_OUT_WS B04C (1x)
MUTEn B04A (1x)
MUTEn B06D (1x)
NOR_CS B03D (1x)
NOR_CS B03E (1x)
NOR_RYBY B03D (1x)
NOR_RYBY B03E (1x)
NOR_WP B03D (1x)
NOR_WP B03E (1x)
PCMCIA_5V B03C (4x)
PCMCIA_AVCC B03C (3x)
PCMCIA_VPP B03C (3x)
POWER_DOWN B02 (1x)
POWER_DOWN B04A (1x)
POWER_DOWN B06D (1x)
RD B04A (1x)
RD B04B (1x)
REMOTE B04A (3x)
RESET_FE_n B03B (1x)
RESET_FE_n B03D (1x)
RESET_n B03D (1x)
RESET_n B03E (1x)
RESET_STV B03C (1x)
RESET_STV B03D (1x)
RF_AGC B03A (2x)
RF_AGC_IBO B03A (1x)
RF_AGC_IBO B03B (1x)
RST B04A (1x)
RST B06C (1x)
RST_AUD B04A (1x)
RST_AUD B04C (1x)
RST_H B04A (1x)
RST_H B04B (1x)
RXD0 B03D (1x)
RXD0 B03F (1x)
SAW_SW B03A (1x)
SAW_SW B04A (1x)
SC1_AUDIO_IN_L B04C (1x)
SC1_AUDIO_IN_L B06B (1x)
SC1_AUDIO_IN_R B04C (1x)
SC1_AUDIO_IN_R B06B (1x)
SC1_AUDIO_MUTE_L B06B (1x)
SC1_AUDIO_MUTE_L B06D (1x)

SC1_AUDIO_MUTE_R B06B (1x)
SC1_AUDIO_MUTE_R B06D (1x)
SC1_AUDIO_OUT_L B04C (1x)
SC1_AUDIO_OUT_L B06B (2x)
SC1_AUDIO_OUT_R B04C (1x)
SC1_AUDIO_OUT_R B06B (2x)
SC1_B_IN B04B (1x)
SC1_B_IN B06B (2x)
SC1_CVBS_IN B04B (1x)
SC1_CVBS_IN B06B (1x)
SC1_CVBS_RF_OUT B04A (1x)
SC1_CVBS_RF_OUT B06B (1x)
SC1_FBL_IN B04B (1x)
SC1_FBL_IN B06B (2x)
SC1_G_IN B04B (1x)
SC1_G_IN B06B (2x)
SC1_R_IN B04B (1x)
SC1_R_IN B06B (2x)
SC1_RF_OUT_CVBS B04B (1x)
SC1_RF_OUT_CVBS B06B (1x)
SC1_STATUS B04A (1x)
SC1_STATUS B06B (1x)
SC2_AUDIO_IN_L B04C (1x)
SC2_AUDIO_IN_L B06B (2x)
SC2_AUDIO_IN_R B04C (1x)
SC2_AUDIO_IN_R B06B (2x)
SC2_AUDIO_MUTE_L B06B (1x)
SC2_AUDIO_MUTE_L B06D (1x)
SC2_AUDIO_MUTE_R B06B (1x)
SC2_AUDIO_MUTE_R B06D (1x)
SC2_AUDIO_OUT_L B04C (1x)
SC2_AUDIO_OUT_L B06B (1x)
SC2_AUDIO_OUT_R B04C (1x)
SC2_AUDIO_OUT_R B06B (1x)
SC2_C_IN B04B (1x)
SC2_C_IN B06B (2x)
SC2_CVBS_MON_OUT B04B (1x)
SC2_CVBS_MON_OUT B06B (1x)
SC2_CVBS_MON_OUT B06D (1x)
SC2_STATUS B04A (1x)
SC2_STATUS B06B (1x)
SC2_Y_CVBS_IN B04B (1x)
SC2_Y_CVBS_IN B06B (2x)
SDRAM_ADDR(0) B03D (1x)
SDRAM_ADDR(0) B03E (1x)
SDRAM_ADDR(0:14) B03D (1x)
SDRAM_ADDR(1) B03D (1x)
SDRAM_ADDR(1) B03E (1x)
SDRAM_ADDR(10) B03D (1x)
SDRAM_ADDR(10) B03E (1x)
SDRAM_ADDR(11) B03D (1x)
SDRAM_ADDR(11) B03E (1x)
SDRAM_ADDR(12) B03D (1x)
SDRAM_ADDR(12) B03E (1x)
SDRAM_ADDR(13) B03D (1x)
SDRAM_ADDR(13) B03E (1x)
SDRAM_ADDR(14) B03D (1x)
SDRAM_ADDR(14) B03E (1x)
SDRAM_ADDR(2) B03D (1x)
SDRAM_ADDR(2) B03E (1x)
SDRAM_ADDR(3) B03D (1x)
SDRAM_ADDR(3) B03E (1x)
SDRAM_ADDR(4) B03D (1x)
SDRAM_ADDR(4) B03E (1x)
SDRAM_ADDR(5) B03D (1x)
SDRAM_ADDR(5) B03E (1x)
SDRAM_ADDR(6) B03D (1x)
SDRAM_ADDR(6) B03E (1x)
SDRAM_ADDR(7) B03D (1x)
SDRAM_ADDR(7) B03E (1x)
SDRAM_ADDR(8) B03D (1x)
SDRAM_ADDR(8) B03E (1x)
SDRAM_ADDR(9) B03D (1x)
SDRAM_ADDR(9) B03E (1x)
SDRAM_CAS B03D (1x)
SDRAM_CAS B03E (1x)
SDRAM_CKE B03D (1x)
SDRAM_CKE B03E (1x)
SDRAM_CLK B03D (1x)
SDRAM_CLK B03E (1x)
SDRAM_DATA(0) B03D (1x)
SDRAM_DATA(0) B03E (1x)
SDRAM_DATA(0:15) B03D (1x)
SDRAM_DATA(1) B03D (1x)
SDRAM_DATA(1) B03E (1x)
SDRAM_DATA(10) B03D (1x)
SDRAM_DATA(10) B03E (1x)
SDRAM_DATA(11) B03D (1x)
SDRAM_DATA(11) B03E (1x)
SDRAM_DATA(12) B03D (1x)
SDRAM_DATA(12) B03E (1x)
SDRAM_DATA(13) B03D (1x)
SDRAM_DATA(13) B03E (1x)
SDRAM_DATA(14) B03D (1x)
SDRAM_DATA(14) B03E (1x)
SDRAM_DATA(15) B03D (1x)
SDRAM_DATA(15) B03E (1x)
SDRAM_DATA(2) B03D (1x)
SDRAM_DATA(2) B03E (1x)
SDRAM_DATA(3) B03D (1x)
SDRAM_DATA(3) B03E (1x)
SDRAM_DATA(4) B03D (1x)
SDRAM_DATA(4) B03E (1x)
SDRAM_DATA(5) B03D (1x)
SDRAM_DATA(5) B03E (1x)
SDRAM_DATA(6) B03D (1x)
SDRAM_DATA(6) B03E (1x)
SDRAM_DATA(7) B03D (1x)
SDRAM_DATA(7) B03E (1x)
SDRAM_DATA(8) B03D (1x)
SDRAM_DATA(8) B03E (1x)
SDRAM_DATA(9) B03D (1x)
SDRAM_DATA(9) B03E (1x)
SDRAM_DQM0 B03D (1x)
SDRAM_DQM0 B03E (1x)
SDRAM_DQM1 B03D (1x)
SDRAM_DQM1 B03E (1x)
SDRAM_RAS B03D (1x)
SDRAM_RAS B03E (1x)
SDRAM_WE B03D (1x)
SDRAM_WE B03E (1x)
SIDE_AUDIO_IN_L B04C (1x)
SIDE_AUDIO_IN_L B06A (1x)
SIDE_AUDIO_IN_R B04C (1x)
SIDE_AUDIO_IN_R B06A (1x)
SIF B03A (1x)

SIF B04C (1x)
SIF1 B03A (2x)
SIF2 B03A (2x)
STANDBY B02 (2x)
STANDBY B04A (2x)
STANDBY B06D (1x)
STANDBYn B04A (1x)
STANDBYn B04B (1x)
STANDBYn B07 (1x)
STV_A25 B03C (1x)
STV_A25 B03D (1x)
STV_CS B03C (1x)
STV_CS B03D (1x)
STV_INT B03C (1x)
STV_INT B03D (1x)
STV_TDO B03B (1x)
STV_TDO B03C (1x)
TDA_CLK B03B (1x)
TDA_CLK B03C (1x)
TDA_DAT(0) B03B (1x)
TDA_DAT(0) B03C (1x)
TDA_DAT(0:7) B03B (1x)
TDA_DAT(1) B03B (1x)
TDA_DAT(1) B03C (1x)
TDA_DAT(2) B03B (1x)
TDA_DAT(2) B03C (1x)
TDA_DAT(3) B03B (1x)
TDA_DAT(3) B03C (1x)
TDA_DAT(4) B03B (1x)
TDA_DAT(4) B03C (1x)
TDA_DAT(5) B03B (1x)
TDA_DAT(5) B03C (1x)
TDA_DAT(6) B03B (1x)
TDA_DAT(6) B03C (1x)
TDA_DAT(7) B03B (1x)
TDA_DAT(7) B03C (1x)
TDA_SYNC B03B (1x)
TDA_SYNC B03C (1x)
TDA_VALID B03B (1x)
TDA_VALID B03C (1x)
TS_CLK B03C (1x)
TS_CLK B03D (1x)
TS_DATA(0) B03C (1x)
TS_DATA(0) B03D (1x)
TS_DATA(0:7) B03D (1x)
TS_DATA(1) B03C (1x)
TS_DATA(1) B03D (1x)
TS_DATA(2) B03C (1x)
TS_DATA(2) B03D (1x)
TS_DATA(3) B03C (1x)
TS_DATA(3) B03D (1x)
TS_DATA(4) B03C (1x)
TS_DATA(4) B03D (1x)
TS_DATA(5) B03C (1x)
TS_DATA(5) B03D (1x)
TS_DATA(6) B03C (1x)
TS_DATA(6) B03D (1x)
TS_DATA(7) B03C (1x)
TS_DATA(7) B03D (1x)
TS_SYNC B03C (1x)
TS_SYNC B03D (1x)
TS_VALID B03C (1x)
TS_VALID B03D (1x)
TXAn B04B (2x)
TXAp B04B (2x)
TXBn B04B (2x)
TXBp B04B (2x)
TXCLKn B04B (2x)
TXCLKp B04B (2x)
TXCn B04B (2x)
TXCp B04B (2x)
TXD0 B03D (1x)
TXD0 B03F (1x)
TXDn B04B (2x)
TXDp B04B (2x)
user_EEPROM_WP B03D (1x)
user_EEPROM_WP B03E (1x)
VCCEN B03C (1x)
VDD B07 (3x)
VDDA B07 (2x)
VDISP B04B (2x)
VGA_H B04B (1x)
VGA_H B06A (1x)
VGA_V B04B (1x)
VGA_V B06A (1x)
VIF1 B03A (2x)
VIF2 B03A (2x)
VIM_IBO B03A (1x)
VIM_IBO B03B (1x)
VIP_IBO B03A (1x)
VIP_IBO B03B (1x)
VSS B07 (3x)
VSSA B07 (5x)
WR B04A (1x)
WR B04B (1x)

G_16860_026.eps

250107

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Overview Top Side)

1101 E3
1102 E6
1103 E6
1104 D6
1201 D7
1210 A7
1211 A7
1212 A7
1213 A7
1214 A7
1301 B6
1304 A9
1305 A8
1306 A8

1307 A8
1308 A8
1309 A8
1310 A8
1311 A5
1312 B5
1500 E10
1501 E10
1502 E9
1503 E10
1504 D9
1505 E9
1506 D10
1507 E9

1508 D10
1509 D9
1510 D10
1511 D9
1512 D9
1513 D10
1514 D10
1515 D10
1516 D9
1517 D9
1518 C10
1519 D9
1520 D9
1521 C10

1522 D9
1523 C9
1524 C9
1525 B10
1526 F10
1601 F6
1603 F6
1606 F10
1607 F10
1608 F6
1609 F6
1610 F9
1611 F9
1612 F6

1613 F9
1614 F6
1615 F9
1618 F6
1619 F10
1735 A10
1810 F7
1811 F8
1823 E8
1900 B9
1901 B10
1B11 A2
1C01 A3
1G03 B1

1G04 B2
1G50 A7
1G51 A7
1K00 E5
1M20 A8
1P11 A5
2110 E6
2111 E6
2114 E6
2117 E6
2127 D6
2128 D6
2129 D6
2130 D6

2134 D6
2135 D6
2138 D6
2142 E5
2143 D6
2144 D6
2151 D5
2208 A6
2209 A6
2211 C6
2212 C6
2214 C6
2215 C6
2242 C6

2243 C6
2246 D7
2247 D7
2250 D7
2251 D7
2252 D7
2253 D7
2254 D7
2255 D7
2256 D7
2257 D7
2259 D7
2260 D7
2261 D7

2262 A7
2263 A7
2264 A7
2265 A7
2267 D7
2268 D6
2273 D6
2277 D7
2283 A7
2285 A7
2311 A8
2314 B6
2315 A6
2316 B6

Part 1

G_16860_016a.eps

3139 123 6261.1

2317 B6
2319 B8
2327 A8
2328 A8
2329 A8
2330 A8
2331 A8
2332 A8
2333 A8
2334 A8
2335 A8
2336 A8
2337 A8
2339 A8

2340 A8
2408 B8
2409 B8
2410 B8
2411 C8
2412 C8
2413 C8
2414 C8
2417 C8
2418 C8
2419 C8
2420 B8
2421 C8
2422 C8

2423 B8
2432 C8
2433 C8
2434 C8
2435 C8
2436 C8
2437 C8
2438 C8
2439 B8
2440 B8
2441 C8
2442 C8
2443 C8
2444 C7

2445 C8
2446 C8
2447 C8
2600 F6
2601 F6
2609 F6
2613 E6
2614 E6
2615 F6
2616 F6
2617 F6
2801 F8
2802 F8
2805 F9

Part 3

G_16860_016c.eps

2806 E9
2807 F9
2808 F9
2809 F7
2810 F7
2811 E9
2812 E9
2813 E8
2814 E9
2815 E9
2828 E8
2901 B9
2902 B9
2903 B9

55LC7.2E LA 7.

2906 B9
2907 B9
2909 B10
2910 B10
2911 B10
2912 B10
2940 B10
2A01 A9
2A02 A9
2A04 B9
2A08 A9
2A09 A9
2A10 B9
2A11 A9

2A12 A9
2A13 A10
2A14 A10
2A15 A8
2A16 B8
2A17 A10
2A18 A9
2A19 B9
2A20 B8
2A22 B9
2A23 A10
2A24 B9
2A26 A10
2A28 A10

2A29 B9
2A30 A9
2A32 B9
2A33 A9
2A34 A9
2A37 A10
2A38 A10
2A40 A9
2A41 A9
2B10 B4
2B11 B4
2B12 B3
2B13 B4
2B14 A3

2B15 A3
2B16 B3
2B18 C5
2B19 B5
2B20 B5
2B21 D5
2B22 A3
2B23 D3
2B24 A2
2B26 C3
2C55 A3
2C56 A3
2C57 A3
2C58 A5

2C59 A4
2C60 A3
2C61 A3
2F10 D3
2F11 D3
2F12 F3
2F13 F3
2F20 D3
2F21 D3
2F22 E3
2G02 C3
2G17 B1
2G18 C1
2G22 D3

2G23 D1
2G24 B1
2G33 B2
2G34 C1
2H06 C3
2H07 D1
2H08 D3
2J01 B1
2J04 D3
2J05 D3
2J06 D3
2K06 F1
2K07 E1
2K11 D3

Part 2

G_16860_016b.eps

G_16860_016d.eps

2K13 D3
2K14 F2
2K16 F3
2K17 F3
2L20 A9
2L21 A8
2L22 A8
2L23 A8
2L24 A9
2L25 A9
2L26 A9
2L27 A9
2L28 A9
2L29 A9

Part 4

2L30 A9
2L31 A9
2L32 A9
2L33 A9
3113 E6
3116 E6
3117 E6
3118 E6
3119 E6
3122 E6
3125 D6
3126 D6
3130 D5
3133 D6

3135 D6
3201 B7
3202 B7
3203 B7
3204 B7
3212 B7
3213 A6
3215 B7
3216 A6
3223 A7
3224 A7
3225 A7
3226 A7
3227 A7

3229 D7
3231 D7
3232 D7
3233 A8
3235 A8
3238 A8
3239 D6
3240 D7
3246 A7
3247 A7
3266 C6
3268 C6
3271 C6
3272 D6

3304 B6
3319 A6
3325 A6
3327 A6
3328 B8
3329 A6
3330 A8
3336 B8
3337 A8
3344 B6
3350 B6
3351 B6
3352 B6
3354 B7

3356 B7
3361 B6
3365 B6
3366 B6
3367 B6
3369 B6
3370 B6
3371 B7
3373 B7
3381 B7
3383 A7
3384 B7
3386 B6
3387 B6

3388 B6
3389 A8
3390 A8
3391 A8
3392 A8
3398 A7
3399 A7
3402 C8
3410 C8
3411 C8
3416 C8
3600 F6
3602 F6
3604 F6

3609 F6
3613 F6
3615 E6
3616 F6
3620 F6
3621 F6
3622 F6
3623 E6
3624 F6
3625 E6
3803 F8
3804 E9
3805 E9
3806 E9

G_16860_016.eps

3807 E8
3809 F7
3811 E8
3815 E8
3819 E8
3828 E7
3833 E7
3834 E7
3835 E7
3846 E7
3850 F7
3851 E7
3852 E7
3853 E7

240107

3854 E8
3855 E8
3856 E8
3857 E8
3858 E8
3859 E8
3860 E7
3862 F7
3863 F7
3880 F8
3881 F8
3896 E7
3897 E7
3901 B9
3902 B9
3903 B9
3904 B9
3907 B9
3909 B10
3910 B10
3942 B10
3943 B10
3A01 A9
3A02 A9
3A03 A8
3A04 A9
3A05 A9
3A06 A8
3A07 B8
3A08 B9
3A11 B8
3A13 B9
3A14 A10
3A19 A9
3A26 A8
3A27 A9
3A28 A9
3A29 A9
3A30 A9
3A31 A9
3B10 B3
3B11 A3
3B12 A3
3B13 B5
3B14 A3
3B15 B5
3B17 A3
3B18 A3
3B19 A3
3G15 B1
3G19 B1
3G48 B1
3G56 D1
3G57 D1
3G58 D1
3G59 D1
3G60 D2
3G61 D2
3G65 B1
3J01 D3
3J02 D3
3J03 D3
3K00 F2
3K01 F2
3K02 E3
3K03 F3
3K05 E3
3K09 F2
3K12 F2
3K15 E1
3K16 E2
3K18 F2
3K21 F2
3K25 E2
3K26 E2
3K27 F1
3K28 E2
3K29 E1
3K30 E2
3K31 E2
3K32 E2
3K33 E1
3K34 F1
3K49 E2
3K50 E2
3K51 E1
3K52 F1
3L06 B6
3L07 B6
3L08 A6
3L09 B6
3L10 A8
3L12 B6
3L13 B6
3L20 A8
3L21 A9
3L22 A9
3L23 A9
3L24 A9
3L25 A9

3L26 B6
4110 E6
4111 E6
4117 E5
4120 E5
4124 D6
4203 A6
4204 A6
4205 A6
4206 A6
4208 D7
4209 D7
4214 A6
4215 A6
4301 B6
4302 A8
4303 A8
4308 B7
4309 A8
4310 A8
4314 B6
4315 B6
4401 A8
4402 A8
4403 B8
4406 C8
4601 F6
4602 F6
4603 C8
4604 C8
4802 E8
4803 F8
4902 B9
4903 B9
4B01 B4
4C01 A5
4C55 A3
4C56 A3
4C57 A4
4C58 A4
4C59 A4
4C60 A4
4C61 A3
4C62 A3
4H01 D2
4H02 D2
4H03 D3
4H04 D2
4H05 D2
4L20 A8
4L21 A9
4L24 A9
4L25 A9
5110 E6
5111 E6
5113 E6
5114 D6
5116 D6
5210 C6
5302 A8
5304 A8
5401 C8
5402 C8
5403 C8
5A03 A10
5A04 B10
5A05 A9
5A06 A9
5B01 B3
5B02 B4
5B03 B3
5B04 B5
5B05 B4
5B06 A5
5B10 A4
5B11 A5
5F10 D3
5F11 D3
5G01 C3
5G02 C3
5G04 D3
5H01 D3
5H02 D1
5K03 F1
5K04 D2
5K05 D3
6103 E6
6301 A6
6302 B8
6303 B8
6304 B8
6308 A8
6309 A8
6310 A8
6311 A8
6312 A8
6313 A8
6604 F6
6605 F6
6606 F6

6607 F6
6615 E6
6B01 B3
6B02 B5
6B03 B5
6J03 D3
7109 E6
7113 D6
7114 D6
7202 C7
7207 A6
7311 B7
7312 A6
7313 A8
7316 B7
7410 B8
7601 F6
7810 E8
7812 E7
7813 E7
7814 F7
7817 E7
7824 F7
7825 F7
7851 E7
7852 E7
7860 F8
7922 B10
7A01 A9
7A05 A9
7A06 A9
7A07 A9
7B01 B3
7B03 B5
7B04 C4
7B05 A3
7G00 C2
7G06 C1
7H00 D2
7H02 C3
7J04 D3
7J05 D3
7K00 F2
7K04 F3

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 1 Top Side)

56LC7.2E LA 7.

Part 1

G_16860_016a.eps

240107

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 2 Top Side)

57LC7.2E LA 7.

Part 2

G_16860_016b.eps

240107

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 3 Top Side)

58LC7.2E LA 7.

Part 3

G_16860_016c.eps

240107

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 4 Top Side)

59LC7.2E LA 7.

Part 4

G_16860_016d.eps

240107

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Overview Bottom Side)

1001 F9
1002 F9
1215 D4
1216 C4
1302 F7
1303 F7
1314 F7
1411 C3
1G01 C10
1J14 F9
2112 F7
2113 E7
2115 F6
2116 F6
2118 E6
2119 E6
2120 E6

2121 F6
2122 E6
2123 D5
2124 D5
2125 D5
2126 D5
2131 E7
2132 E7
2133 D5
2136 D5
2137 D5
2139 D5
2140 D5
2141 D5
2145 D5
2146 F6
2147 E6

2148 E7
2149 F7
2205 D4
2206 D4
2207 A5
2210 A5
2213 B5
2216 C4
2217 D6
2218 C5
2219 D5
2220 C5
2221 D5
2222 D5
2223 D5
2224 C5
2225 C5

2226 C5
2227 C5
2228 C5
2229 D5
2230 C4
2231 C4
2232 C4
2233 C4
2234 C4
2235 C4
2236 C4
2237 C4
2238 C4
2239 B4
2240 C4
2241 B5
2244 D5

2245 B4
2248 A5
2258 D4
2266 C4
2269 D4
2270 C4
2271 C4
2272 D4
2274 C4
2275 D4
2276 D4
2278 C4
2279 D4
2280 D4
2281 C4
2282 D4
2284 D5

2286 C4
2287 D4
2288 D4
2289 D5
2290 C4
2291 D4
2292 C4
2293 D4
2294 D4
2295 C5
2296 C5
2297 C4
2298 B4
2310 A4
2312 B4
2313 B4
2318 A4

2320 B5
2321 B4
2322 B4
2323 B4
2324 B5
2325 B4
2326 B4
2338 A4
2415 D3
2416 D3
2424 B3
2425 B3
2426 B3
2427 B3
2428 B3
2429 B3
2430 B3

2431 B3
2502 E2
2506 E2
2508 E3
2509 E1
2512 E1
2514 E3
2515 E2
2517 E2
2518 D1
2520 D1
2521 E2
2523 E2
2524 D2
2525 C2
2526 C2
2527 D3

2528 D3
2529 D3
2530 C1
2531 D2
2533 D3
2534 D3
2535 C3
2536 C2
2538 C2
2602 F1
2603 F2
2606 F2
2607 F2
2608 F2
2610 F2
2612 F2
2803 F3

Part 1

G_16860_017a.eps

3139 123 6261.1

2804 F4
2816 E3
2817 E3
2818 E4
2819 E4
2829 F3
2830 F3
2833 F3
2835 F4
2836 E4
2838 E4
2839 E3
2840 E3
2843 F3
2844 F3
2845 E3
2847 F3

2848 F3
2849 F3
2850 F4
2851 F3
2852 E4
2853 E3
2854 E3
2855 E3
2856 E4
2857 E4
2858 E3
2859 F4
2860 F4
2861 E3
2865 F4
2866 F4
2867 F4

2868 F4
2869 F4
2870 E4
2871 E4
2872 E3
2873 E3
2874 E3
2875 F3
2876 E4
2904 C2
2905 C2
2908 B2
2913 B2
2A21 A2
2A25 A2
2A27 B2
2A31 B2

Part 3

G_16860_017c.eps

2A35 A2
2A36 B2
2A45 A1
2A46 A2
2A47 A2
2B17 C7
2B25 C7
2F14 E8
2F15 E8
2F16 E8
2F17 E8
2F18 E7
2F19 F8
2F23 F8
2F24 E8
2F25 E8
2F26 F7

2F27 E7
2F28 E7
2F29 E7
2F30 E7
2F31 E7
2F32 E7
2F33 E7
2G03 C9
2G04 D9
2G05 D10
2G06 C9
2G07 C9
2G08 C9
2G09 C10
2G10 C10
2G11 D9
2G12 C9

60LC7.2E LA 7.

2G13 D9
2G14 C9
2G15 C9
2G16 C10
2G19 B9
2G20 B9
2G21 C9
2G31 C9
2G32 C9
2H03 C8
2H04 D9
2H09 C8
2H10 C8
2H11 C8
2H12 C8
2H13 C8
2H14 B9

2H15 B9
2J02 B9
2J14 F9
2J15 F9
2J60 C9
2J62 C9
2J63 C9
2J64 C9
2J66 C9
2J67 C9
2J68 C8
2J69 C8
2J70 C8
2J71 C9
2J72 C9
2J73 C9
2K00 D10

2K01 D9
2K02 E9
2K03 E9
2K04 D9
2K05 E9
2K08 F9
2K09 F9
2K10 E9
2K12 F9
2K15 D10
3110 E7
3111 E7
3115 E7
3120 E6
3121 F6
3123 D5
3124 D5

3127 D5
3128 D5
3129 D5
3131 E6
3132 F6
3134 E7
3136 E6
3137 E7
3210 A5
3211 B5
3217 A5
3219 C4
3220 C4
3221 C4
3222 C4
3228 D4
3230 D4

3241 C4
3242 C4
3243 C4
3244 D4
3245 C4
3248 D4
3250 D4
3251 D4
3253 D4
3254 D4
3255 D5
3256 D5
3257 D4
3258 D4
3260 D6
3261 C6
3262 D6

Part 2

G_16860_017b.eps

3263 C5
3264 C5
3265 C5
3267 C5
3273 D3
3274 D3
3275 D3
3276 D3
3300 B4
3303 A4
3305 A5
3306 B5
3307 B5
3308 A5
3309 A5
3310 A4
3311 A4

3312 A4
3313 A4
3314 A4
3315 A4
3316 B4
3317 A4
3318 B4
3320 A4
3321 B4
3322 A4
3323 B4
3324 A4
3326 B3
3331 A4
3332 A4
3333 A4
3334 A4

3335 A4
3338 A4
3339 A4
3340 A4
3341 A4
3342 A4
3343 F7
3345 F7
3346 B4
3347 B4
3348 B4
3349 B4
3353 B5
3355 B5
3357 B5
3358 B5
3359 B5

Part 4

G_16860_017d.eps

3360 B4
3362 A5
3363 A4
3364 A4
3368 A4
3372 B4
3374 A5
3375 B4
3376 A4
3377 B4
3378 B4
3379 B4
3380 A4
3382 B4
3385 B4
3393 A4
3394 A4

3395 A4
3396 A5
3397 B4
3417 B3
3418 B3
3419 B3
3420 B3
3500 E2
3502 E2
3503 E3
3506 E1
3507 E3
3508 E1
3510 E2
3511 E2
3512 D1
3513 D1

3514 E2
3515 E2
3516 D3
3517 D3
3518 D2
3519 C2
3520 D2
3521 C2
3522 C2
3523 D3
3524 C3
3525 C2
3526 D3
3528 D3
3529 C1
3530 D3
3531 C1

3532 D2
3533 D2
3535 C3
3536 C3
3537 C3
3538 C2
3540 C3
3545 C2
3546 C2
3550 D2
3551 D2
3552 D2
3553 D2
3554 C3
3555 C2
3601 F1
3603 F2

3605 F2
3607 F2
3608 F2
3611 F2
3612 F2
3617 F1
3618 F2
3619 F2
3801 F3
3802 F3
3810 F3
3830 F4
3831 F4
3832 F4
3864 E3
3877 E3
3882 E3

G_16860_017.eps

3883 E3
3884 E3
3885 E3
3886 E3
3905 C2
3906 B2
3908 C2
3911 B1
3912 B1
3913 E1
3914 B1
3915 E1
3916 C1
3917 B1
3918 B1
3934 B1
3935 C1

240107

3937 B1
3938 B1
3940 B1
3A09 A2
3A12 A2
3A15 B2
3A17 B2
3F10 C9
3F11 C8
3F12 C9
3F13 C9
3F14 F7
3F15 F7
3F16 F7
3F17 F7
3F18 F7
3F19 E7
3F20 E7
3F21 F8
3F22 E7
3F23 E7
3F24 E7
3F25 E7
3F26 E7
3F27 E7
3F28 E7
3F29 E7
3F30 F8
3F31 F8
3F32 F8
3F33 F8
3F34 F8
3F40 F7
3F41 E7
3F42 E7
3F44 F7
3F46 E7
3F48 E7
3G11 B10
3G12 D10
3G16 C10
3G17 C10
3G18 C10
3G20 D9
3G28 C9
3G29 C9
3G30 C9
3G31 C9
3G33 B10
3G34 B10
3G35 C10
3G36 C9
3G37 C9
3G38 B10
3G40 C9
3G41 C10
3G43 C10
3G44 C10
3G46 C10
3G47 C10
3G51 C9
3G54 B9
3G55 B9
3G62 D9
3G63 C10
3H00 D9
3H05 D10
3H09 B9
3H10 B9
3H11 B9
3H12 B9
3H13 B9
3H14 C9
3J14 F9
3J15 F9
3J59 C9
3J60 C9
3J61 C9
3J62 C8
3J63 C8
3J64 C8
3J65 C9
3J66 C9
3K04 E9
3K06 E9
3K07 E8
3K08 D8
3K10 E9
3K11 F9
3K13 F9
3K17 E8
3K19 E9
3K20 E9
3K22 F9
3K23 D10
3K24 D10
3K38 E9
3K39 E8
3K40 E8
3K41 E8
3K42 E8
3K43 E8
3K44 E10
3K45 E10

3K46 E9
3K47 E9
3K48 E9
3L01 B4
3L02 B4
3L04 A4
3L05 A4
3L11 A5
3L14 B5
3L15 B4
4112 E7
4113 E6
4114 F6
4115 F6
4116 E6
4118 E6
4119 E6
4121 E6
4122 F6
4123 F6
4125 F7
4207 C4
4210 C4
4211 D4
4212 D4
4213 C4
4306 A5
4307 A5
4313 B4
4316 B5
4323 B4
4324 D3
4325 D3
4407 D4
4408 D4
4409 D3
4410 D3
4411 D3
4412 D3
4502 C2
4504 C3
4804 F4
4805 F3
4901 B1
4A01 A2
4A02 A2
4F11 E7
4F12 E7
4G01 C10
4G02 C10
4G03 C10
4G04 C10
4G05 C10
4G09 D9
4G10 C10
4G31 C9
4H00 D9
4H12 B9
4H15 D10
4J14 F9
4J15 F9
5112 E6
5115 E7
5117 D5
5118 D6
5120 E6
5121 F6
5211 A5
5212 D5
5213 C4
5214 C4
5215 A5
5216 C4
5217 A5
5218 D4
5219 D4
5220 C4
5221 C4
5222 C4
5223 D5
5224 C4
5225 C4
5226 C4
5227 C4
5228 C4
5301 B4
5810 E3
5811 F4
5812 E4
5813 E4
5814 E3
5815 F3
5816 E3
5817 E3
5818 E3
5A07 A2
5G03 B9
5H03 C9
5J01 B9
5J52 C9
5J53 C9
5J54 C8
5J55 C9
5K01 E9

5K02 E9
6110 E7
6201 A5
6202 A5
6305 B5
6306 F7
6307 F6
6317 A4
6318 A4
6501 E1
6504 E2
6505 D1
6507 E2
6509 D2
6510 C1
6511 C2
6512 D2
6513 D2
6514 D3
6515 D3
6516 D3
6517 D3
6518 E3
6519 D3
6520 D2
6521 D2
6522 E1
6523 E2
6524 D2
6525 C2
6610 F1
6611 F2
6612 F2
6613 F2
6614 F2
6801 F4
6802 F3
6830 F4
6831 F4
6914 C1
6916 B1
6919 B1
6J14 F9
6J15 F9
6J60 C9
6J61 C8
6J62 C8
6J63 C9
7111 F7
7131 E6
7132 F6
7133 D6
7203 C4
7204 D5
7205 C5
7206 C4
7208 A5
7210 A5
7211 D4
7213 D3
7214 D3
7308 A4
7310 B3
7314 B5
7315 B5
7317 A4
7320 A5
7321 A5
7322 A5
7323 B4
7411 C3
7500 C2
7502 C2
7503 C3
7504 C3
7811 F3
7816 E3
7850 F4
7861 E3
7901 B2
7902 B1
7911 B1
7912 B1
7913 E2
7914 B1
7915 E1
7916 C1
7917 B1
7919 B1
7B02 C6
7B06 D7
7B08 C7
7F01 F8
7F02 C8
7F03 F7
7F04 E7
7H03 B10
7K01 D9
7K02 D9
7K03 D10
7K05 F9

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 1 Bottom Side)

Part 1

61LC7.2E LA 7.

G_16860_017a.eps

050307

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 2 Bottom Side)

62LC7.2E LA 7.

Part 2

G_16860_017b.eps

050307

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 3 Bottom Side)

63LC7.2E LA 7.

Part 3

G_16860_017c.eps

050307

Circuit Diagrams and PWB Layouts

Layout Small Signal Board (Part 4 Bottom Side)

64LC7.2E LA 7.

Part 4

G_16860_017d.eps

050307

Side A/V Panel

Circuit Diagrams and PWB Layouts

65LC7.2E LA 7.

D D

A

B

C

D

E

F

3139 123 6229.1

123456789

SIDE FACING SIDE AV

1301
YKF51-5564

SVHS

5

CVBS

R

YELLOW

2

1

1302-1

WHITE

L

5
6
4

1302-2

RED

8
9
7

1302-3

1303

YKB21-5101A

HEADPHONE

123456789

1

Y_CVBS

3

4

C

2

S302

3301

I306

S303

I308

4302

4301

S304

I309

S305

5
4
2

3
7
8
1

S306

S301

75R

S307

2311
22p

I311

S308

I312

2303
22p

I303

3302

47p

75R

3

DF3A6.8

6301

12

3

DF3A6.8

6303

3

DF3A6.8

6304

1212

3

DF3A6.8

6305

12

3

DF3A6.8

6306

12

3

DF3A6.8

6302

12

3308

2308
22n

**

3310

**

4308

4309

2313 3314

**

**

2314 3315

**

**

2307
22n

3

6307

DF3A6.8

12

3303

10R

3305

10R

**

**

2309
10n

23022301
47p

2304
47p

2310

23053309

**

23063311

**

3304

100R

4304

3306

100R

4306

3307

100R

4307

10K 10K10n

1301 A1
1302-1 C1
1302-2 D1
1302-3 E1
1303 E1

S307 F2
S308 F2
S310 E8
S311 E8

S312 E8
1304 B9
1308 D9
1309 D7
1310 D9
2301 A4
2302 A4
2303 A2
2304 B4

A

2305 D4
2306 E4
2307 F4
2308 F4
2309 F4
2310 F4
2311 C2
2312 D8

B

2313 D3
2314 E3
3301 B2
3302 A4
3303 A4
3304 A5
3305 B4
3306 B5
3307 C5
3308 D4
3309 D4
3310 E4
3311 E4

I314

I315

I316

I317

I318

I319
I320

FRONT_Y_CVBS_IN

FRONT_C_IN

L_FRONT_IN
FRONT_DETECT
R_FRONT_IN

HEAD_PH_L
HEAD_PH_R

TO 1M36 OF BJ/EBJ SSB

1304

I321

1
2
3
4
5
6
7
8

9
10
11

3312 F5
3313 F5

C

3314 D4
3315 E4
4301 D2
4302 D2

TO 1H01 OF BJ SSB /
TO 1M60 OF EBJ SSB

1309

1

I330

2

I331

3

I332

4
5

B5B-PH-K

5300 220R
4310

4311

S310

S311

2312 100u

I325
I326
I327
I328

S312

4303

16V

1310

B3B-PH-K

1308

56

292303-4

1
2
3

1
2
3
4

USB

D

E

4303 E8
4304 A5
4306 B5
4307 C5
4308 F4
4309 F4
4310 E7
4311 E7
5300 D7
6301 B3
6302 B3
6303 C3
6304 D3
6305 E3
6306 F3
6307 F3
I303 A3
I306 C2
I308 D2
I309 E2
I311 F2
I312 F2
I314 B7
I315 B7
I316 B7
I317 B7
I318 C7
I319 C7

F

I320 C7
I321 B9
I325 D8
I326 D8
I327 E8
I328 E8
I330 D7
I331 D7
I332 E7
S301 A2
S302 A2

33133312

**

2305
2306
2313
2314
3314
3315
3308
3310
3309
3311

DIVERSITY TABLE

EBJ 2K7 BJ 2K7

100p 100p
100p 100p
NA 680p
NA 680p
NA 33K

NA 33K
100R 1K
100R 1K
100K NA
100K NA

LC07

1n
1n
1n
1n

NA

NA
150R
150R

33K
33K

S303 C2

G_16850_023.eps

110107

S304 D2
S305 E2
S306 F2

Circuit Diagrams and PWB Layouts

66LC7.2E LA 7.

Layout Side A/V Panel (Top Side)

1301 A1 1302 A2 1303 A3 1304 A2 1308 A4 1309 A3 1310 A3

3139 123 6229.1

Layout Side A/V Panel (Bottom Side)

2301 A4
2302 A4
2303 A4
2304 A3
2305 A3
2306 A3

2307 A2
2308 A2
2309 A2
2310 A2
2311 A4
2312 A1

2313 A3
2314 A3
3301 A4
3302 A4
3303 A4
3304 A4

3305 A3
3306 A3
3307 A3
3308 A3
3309 A3
3310 A3

3311 A3
3312 A2
3313 A2
3314 A3
3315 A3
4301 A3

4302 A3
4303 A1
4304 A4
4306 A3
4307 A3
4308 A2

4309 A2
4310 A1
4311 A1
5300 A2
6301 A4
6302 A4

G_16850_026.eps

120107

6303 A4
6304 A3
6305 A2
6306 A2
6307 A2

3139 123 6229.1

G_16850_027.eps

020207

Keyboard Control Panel

Circuit Diagrams and PWB Layouts

67LC7.2E LA 7.

A

B

C

D

1234

E E

6014 BZX384-C5V6

KEYBOARD CONTROL

560R

0R

BZX384-C5V66017

I118I116 I117

1004

3014

820R

3017

1014

SKQNAB

VOLUME-

1001

3013

150R

1011

BZX384-C5V66015

SKQNAB

CHANNEL+

Diversity Resistor

F310 F311

1002

3010

390R

0R

3015

1012

SKQNAB

CHANNEL-

3099

RES

3011

3016

1013

MENU

6016 BZX384-C5V6

1003

SKQNAB

I115I114I112 I113I111

0R

6018 BZX384-C5V6

1005

KEYBOARD

1K8

3012

1015

SKQNAB

VOLUME+

I110

1016

ON / OFF

6011

6012

SKQNAB

F002

2001

6013

BZX384-C3V9

BZX384-C3V9

BZX384-C3V9

*

3010

3011

3012

3013

3014

6011

6012

6013

LC06

390R

560R

1K8

150R

820R

YES

YES

NO

470p

F001

RES

5001

Jaguar

390R

560R

1K8

150R

820R

NO

NO

YES

270R

4001

1M01
1
2
3

S3B-PH-K

A

B

C

D

Personal Notes:

1001 C1
1002 C1
1003 C1
1004 C2
1005 C2
1011 C1
1012 C1
1013 C2
1014 C2
1015 C2
1016 C3
1M01 A4
2001 B3
3010 B1
3011 B2
3012 B2
3013 B1
3014 B2
3015 B1
3016 B2
3017 B2
3099 D1
4001 B4
5001 B4
6011 B3
6012 C3
6013 B3
6014 C1
6015 C1
6016 C1
6017 C2
6018 C2
F001 B4
F002 B3
F310 D1
F311 D1
I110 B3
I111 B1
I112 B1
I113 B2
I114 B2
I115 B2
I116 C1
I117 C2
I118 C2

3139 123 6219.1

1234

G_16850_024.eps

110107

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

Layout Keyboard Control Panel (Top Side)

1011 A5 1012 A6 1013 A3 1014 A2 1015 A1 1016 A7 1M01 A8

3139 123 6219.1

68LC7.2E LA 7.

G_16850_028.eps

120107

Layout Keyboard Control Panel (Bottom Side)

2001 A1
3010 A4

3011 A6
3012 A8

3013 A5
3014 A7

3139 123 6219.1

3015 A3
3016 A6

3017 A7
3099 A8

4001 A1
5001 A1

6011 A2
6012 A3

6013 A1
6014 A4

6015 A3
6016 A5

6017 A6
6018 A8

G_16850_029.eps

020207

1080P Panel: On Chip uController

12345678

OCM ON CHIP MICROCONTROLLER

F1 F1

F2

A

B

Circuit Diagrams and PWB Layouts

7101-4

GM1601

69LC7.2E LA 7.

OCM-ADR

OCMADDR(0)
OCMADDR(1) OCMADDR(11)
OCMADDR(2)
OCMADDR(3)
OCMADDR(4)
OCMADDR(5)
OCMADDR(6)
OCMADDR(7)
OCMADDR(8)
OCMADDR(9)

AA1

OCMADDR0

AA2

OCMADDR1

AA3

OCMADDR2

Y1

OCMADDR3

Y2

OCMADDR4

Y3

OCMADDR5

W1

OCMADDR6

W2

OCMADDR7|GPIO_18

W3

OCMADDR8|GPIO_G11_B0

V1

OCMADDR9|GPIO_G11_B1

OCMADDR10|GPIO_G11_B2
OCMADDR11|GPIO_G11_B3
OCMADDR12|GPIO_G11_B4
OCMADDR13|GPIO_G11_B5
OCMADDR14|GPIO_G11_B6
OCMADDR15|GPIO_G11_B7

OCMADDR16|GPIO_19
OCMADDR17|GPIO_20
OCMADDR18|GPIO_21
OCMADDR19|GPIO_22

V2
V3
V4
U1
U2
U3
U4

T1
T2
T3

OCMADDR(10)

OCMADDR(12)
OCMADDR(13)
OCMADDR(14)
OCMADDR(15)
OCMADDR(16)
OCMADDR(17)
OCMADDR(18)
OCMADDR(19)

A

B

1101 D8
3110 C7
3111 C7
3112 D6
3113 D6
3114 D5
3115 D5
3116 E5
3117 E5
3118 E5
3119 D5
6101 D7
6102 D7
7101-4 A3
7101-5 C3
F110 D7
F111 D7
F112 D7
I110 D5
I111 D5
I112 D5
I113 D5
I114 E5
I115 E5
I116 E5
I117 D5

C

D

E

F2

OCMDATA(0)
OCMDATA(1)
OCMDATA(2)
OCMDATA(3)
OCMDATA(4)
OCMDATA(5)
OCMDATA(6)
OCMDATA(7)
OCMDATA(8)
OCMDATA(9)
OCMDATA(10)
OCMDATA(11)
OCMDATA(12)
OCMDATA(13)
OCMDATA(14)
OCMDATA(15)

AD4

OCMDATA0

AF3

OCMDATA1

AE3

OCMDATA2

AD3

OCMDATA3

AF2

OCMDATA4

AE2

OCMDATA5

AD2

OCMDATA6

AF1

OCMDATA7

AE1

OCMDATA8|GPIO_G10_B0

AD1

OCMDATA9|GPIO_G10_B1

AC1

OCMDATA10|GPIO_G10_B2

AC2

OCMDATA11|GPIO_G10_B3

AC3

OCMDATA12|GPIO_G10_B4

AB1

OCMDATA13|GPIO_G10_B5

AB2

OCMDATA14|GPIO_G10_B6

AB3

OCMDATA15|GPIO_G10_B7

7101-5

GM1601

OCM_DATA

OCM_TIMER1|PWM3|GPIO_13

OCM_UDI|GPIO_27

OCM_UDO|GPIO_26

OCM_INT1|GPIO_30

OCM_INT2|GPI_10

OCM_CS0_|GPIO_23
OCM_CS1_|GPIO_24
OCM_CS2_|GPIO_25

ROM_CS_|GPI_9

OCM_WE_

OCM_RE_

D25

M2

M1

R3

R2

P1
P2

R1

+3V3_SW

C

3110
10K

I117

I110

I111

L2

L1

T4

I112

I113

I114
I115
I116

3119

10K

3114 10K

3115 10K

#OCM_WE

#OCM_RE

3117 10K

10K3116

10K3118

#ROM_CS

F2

F2

+3V3_SW

+3V3_SW

3112 100R

100R3113

UART_RX

UART_TX

6101

3111
10K

6102

BZX384-C6V8

BZX384-C6V8

GPROBE UART

1101

F110
F111
F112

45

3
2
1

B3B-PH-SM4-TBT(LF)

D

E

3139 123 6225.1

1234567

G_16860_019.eps

240107

8

Circuit Diagrams and PWB Layouts

70LC7.2E LA 7.

1080P Panel: Flash & NVM

1

23456789

10 11 12

FLASH & NVM

F2 F2

A

+3V3_IO

B

C

D

G

+3V3_IO

2210

F1

OCMADDR(1)
OCMADDR(2)
OCMADDR(3)
OCMADDR(4)
OCMADDR(5)
OCMADDR(6)
OCMADDR(7)
OCMADDR(8)
OCMADDR(9)
OCMADDR(10)
OCMADDR(11)
OCMADDR(12)
OCMADDR(13)
OCMADDR(14)
OCMADDR(15)
OCMADDR(16)
OCMADDR(17)
OCMADDR(18)

#OCM_WE
#OCM_RE
#ROM_CS

+3V3_IO

3232 1K0

220K3217

2212
10n 10n

2213

F238
F239
F242
F245
F247

M29W400DT-55N6

512Kx8/256Kx16

25

0

24

1

23

2

22

3

21

4

20

5

19

6

18

7

8

8

7

A

9

6

10

5

11

4

12

3

13

2

14

1

15

48

16

17

17

15

RB

12

RP

11

WE

28

OE

26

CE

47

BYTE

7201

EPROM

4M-1

37

0

27

46

100n
2211

16V10u

29

0
1
2
3
4
5
6
7

D

8

9
10
11
12
13
14
15

A-1

NC

F212

31

F214

33

F216

35

F218

38

F219

40

F220

42

F222

44

F224
30
32
34
36
39
41
43
45

9
10
13
14
16

E

+3V3_SW

3229

RES

10K

F5

F

F6

F6

NVM_WP_SCALER

SCL_IO

SDA_IO

F250

F251

F254

+3V3_SW

7202
RES

8

M24C32-WMN6

Φ

(4Kx8)

7

WC

EEPROM

6

SCL

5

0

ADR

1
2SDA

4

100n

RES

2214

1
2
3

OCMDATA(0)
OCMDATA(1)
OCMDATA(2)
OCMDATA(3)
OCMDATA(4)
OCMDATA(5)
OCMDATA(6)
OCMDATA(7)

OCMADDR(0)

2
4

F1

OCMADDR(0)
OCMADDR(1)
OCMADDR(2)
OCMADDR(3)

OCMADDR(4)
OCMADDR(5)
OCMADDR(6)
OCMADDR(7)

OCMADDR(8)
OCMADDR(9)
OCMADDR(10)
OCMADDR(11)

OCMADDR(12)
OCMADDR(19)
OCMADDR(17)
OCMADDR(18)

OCMADDR(16)
OCMADDR(14)
OCMADDR(13)
OCMADDR(15)

1201

SKQR

For Software
Development
only - (RES)

1
3

F211
F213
F215
F217

F221
F223
F225
F226

F227
F229
F231
F232

F234
F235
F236
F237

F240
F243
F246
F248

2215
100n

F253

1

6211

BZX384-C6V8

18

3205-1 10K
3205-2 10K27

3205-4

183204-1 10K

3204-2 10K27

36

3204-3 10K
3204-4 10K4

3202-1 10K18
3202-3 10K36
3202-4 10K
3202-2 10K2

+3V3_SW

MR

2

3231 10K

45

3V2

5

7203
PST596J

VCC

VOUT

GND

SUB

3

5

10K3230

10K3226
10K3227

7

4

10K3205-3 3 6
10K45

F252

2V3V0

10K3210

10K3211

3222
1K0

3223
10K

RES

10K

3212

10K3213

1SS356

6210

+3V3_IO

3214

1u0

3225

F241

RES

10K

2216

3215

I215

RES

F233

RES

10K

10K

3216

3224

330R

10K

F230

RES

322832193218

MAIN_RESET

#RESET

F6
F3

A

B

C

D

E

F

G

1201 F8
2210 B6
2211 B6
2212 D4
2213 D5
2214 F7
2215 F8
2216 F10
3202-1 D9
3202-2 D9
3202-3 D9
3202-4 D9
3204-1 C9
3204-2 C9
3204-3 C9
3204-4 D9
3205-1 C9
3205-2 C9
3205-3 C9
3205-4 C9
3210 B9
3211 B9
3212 B9
3213 B10
3214 C10
3215 C10
3216 C10
3217 D4
3218 D10
3219 D10
3222 F9
3223 F9
3224 F10
3225 G10
3226 D9
3227 D9
3228 D10
3229 F5
3230 D9
3231 D9
3232 D4
6210 F10
6211 F8
7201 B6
7202 E6
7203 F9
F211 C8
F212 C7
F213 C8
F214 C7
F215 C8
F216 C7
F217 C8
F218 C7
F219 C7
F220 C7
F221 C8
F222 C7
F223 C8
F224 C7
F225 C8
F226 C8
F227 C8
F229 C8
F230 C10
F231 C8
F232 D8
F233 D10
F234 D8
F235 D8
F236 D8
F237 D8
F238 D5
F239 D5
F240 D8
F241 D10
F242 D5
F243 D8
F245 D5
F246 D8
F247 D5
F248 D8
F250 F5
F251 F5
F252 F9
F253 F8
F254 F5
I215 F10

H

3139 123 6225.1

PCB MB 1080 BOLT-ON 12NC : 3139_123_62241_02
PCB SB 1080 BOLT-ON 12NC : 3139_123_62251_02

12345

6 7 8 9 10 11 12

G_16860_020.eps

240107

H

Circuit Diagrams and PWB Layouts

71LC7.2E LA 7.

1080P Panel: LVDS In

123456789101112

F3 F3

A

B

C

D

E

F

G

H

3139 123 6225.1

LVDS IN

7101-6

GM1601

VIDEO

VCLAMP|GPIO_31

VDV|VSOG|GPIO07

VODD|HSOUT|GPIO_06

VVS|GPIO_05

VHS_CSYNC|GPIO_04

VGRN0|GPIO_G02_B0
VGRN1|GPIO_G02_B1
VGRN2|GPIO_G02_B2
VGRN3|GPIO_G02_B3
VGRN4|GPIO_G02_B4
VGRN5|GPIO_G02_B5
VGRN6|GPIO_G02_B6
VGRN7|GPIO_G02_B7

VRED0|GPIO_G01_B0
VRED1|GPIO_G01_B1
VRED2|GPIO_G01_B2
VRED3|GPIO_G01_B3
VRED4|GPIO_G01_B4
VRED5|GPIO_G01_B5
VRED6|GPIO_G01_B6
VRED7|GPIO_G01_B7

VBLU0|GPIO_G03_B0
VBLU1|GPIO_G03_B1
VBLU2|GPIO_G03_B2
VBLU3|GPIO_G03_B3
VBLU4|GPIO_G03_B4
VBLU5|GPIO_G03_B5
VBLU6|GPIO_G03_B6
VBLU7|GPIO_G03_B7

RES

I310

D16

SVCLK|GPI_0

I311

10K3315

10K3318

10K3320

10K3323

10K3325

10K3327

3331

I312

I314

I315
I316
I317
I318
I319
I320
I321
I322
I323

F333

270R

C14

B14

A14

A17
D14
A15
B15
C15
D15
A16
B16
C16

A20

SVHSYNC|GPIO_02

SVVSYNC|GPIO_01

SVODD|GPIO_00

SVDV|VCOAST|GPIO_03
SVDATA7|GPIO_G00_B7
SVDATA6|GPIO_G00_B6
SVDATA5|GPIO_G00_B5
SVDATA4|GPIO_G00_B4
SVDATA3|GPIO_G00_B3
SVDATA2|GPIO_G00_B2
SVDATA1|GPIO_G00_B1
SVDATA0|GPIO_G00_B0

VCLK|GPI_01

3314 10K

3316 10K

3319 10K

3321 10K

3324 10K

3326 10K

3329 10K

VCLK

PCB MB 1080 BOLT-ON 12NC : 3139_123_62241_02
PCB SB 1080 BOLT-ON 12NC : 3139_123_62251_02

123

B4B-PH-SM4-TBT(LF)

56

4
3
2
1

1302

RES

CON_STND_MAL_N40_M2

4315

4316

4317

DF13-40DP-1.25V

RES

B17

D20

B20

C20

D19

A23
C22
B22
A22
D21
C21
B21
A21

C19
B19
A19
D18
C18
B18
A18
C17

B25
A25
D24
C24
B24
A24
C23
B23

270R

3333

270R

3334

F310

F311

F312

F313

270R

3335

270R

3336

3337 270R

3338 270R

3357
10K

270R

3339

3340 270R

4310

RES

4311

3341 270R

270R

3342

270R3343

270R

3344

270R

3345

3346 270R

RES

3310 270R

3312

VHS_CSYNC

270R

270R

3349

3348

3347 270R

I313

270R

3350

F316
F318
F319
F321
F322
F324
F325
F327

F329
F330
F332
F334
F335
F336
F338
F339

270R3351

VDV

VVS

270R

3352

270R3311
270R

3353 270R

270R3354

270R

3355

270R

3356

F341
F342
F343
F345
F346
F348
F349
F351

VFF

VGRN(0)
VGRN(1)
VGRN(2)
VGRN(3)
VGRN(4)
VGRN(5)
VGRN(6)
VGRN(7)

VRED(0)
VRED(1)
VRED(2)
VRED(3)
VRED(4)
VRED(5)
VRED(6)
VRED(7)

VBLU(0)
VBLU(1)
VBLU(2)
VBLU(3)
VBLU(4)
VBLU(5)
VBLU(6)
VBLU(7)

VRED(2)
VRED(3)
VRED(4)
VRED(5)
VRED(6)
VRED(7)
VGRN(2)

VGRN(3)
VGRN(4)
VGRN(5)
VGRN(6)
VGRN(7)
VBLU(2)
VBLU(3)

VBLU(4)
VBLU(5)
VBLU(6)
VBLU(7)
VHS_CSYNC
VVS
VDV

VRED(0)
VRED(1)
VGRN(0)
VGRN(1)
VBLU(0)
VBLU(1)
VFF

2316

+3V3_LVDSVCC+3V3_LVDSA

1u0

2315

100n

PLLVCC

27

0

29

1

30

2

32

RA

3

33

4

35

5

37 12

6

0

39

1

43

2

45

RB

3

46

4

47

5

51

6

53

0

54

1

55

2

1

3

RC

3

4

5

5

6

6

7

0

34

1

41

2

42

RD

3

49

4

50

5

2

6

2314

100n

LVDSVCC

Φ

LCD PANEL
INTERFACE

RECEIVER

GND LVDSGNDPLLGND

22

24 23

52

13

+3V3_LVDSD

2312

100n

100n

2313

7301
THC63LVDF84B

314048

56

VCC

4

283644

RA+

RA-

RB+

RB-

RC+

RC-

RD+

RD-

RCLK+

RCLK-

PDWN

CLKOUT

14

21

10

9

1138

16

15

20

19

18

17

25

26

VCLK

8

I324

100n

100R

3317

3322

3328

3330

2311

100n

3313

100R

100R

100R

100R

3332

2310

RA+

F5

F2

RA-

RB+

RD+

RD-

RB-

RCLK+

RC+

RCLK-

RC-

RC+

RC-

RD+

RB+

RD-

RB-

RCLK+

RA+

RA-

RCLK-

4K7

+3V3_LVDSD

+VDISP

F314

2317

100n

MAIN_SCL

MAIN_SDA

MAIN_RESET

4312

4313

F326

F328

F331

F337

F340

F344

F354

F350

F352

F353

4314

F315

F317

F320

F323

"300" ~ "399"

456789101112

1G51

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

42

41

G_16860_021.eps

240107

A

B

C

D

E

F

G

H

1302 B12
1G51 C12
2310 B10
2311 B10
2312 B9
2313 B9
2314 B8
2315 B8
2316 B7
2317 F10
3310 B6
3311 B6
3312 B6
3313 C10
3314 B2
3315 C2
3316 C2
3317 C9
3318 C2
3319 C2
3320 C2
3321 C2
3322 D9
3323 C2
3324 C2
3325 C2
3326 C2
3327 D2
3328 D9
3329 D2
3330 E9
3331 D2
3332 E10
3333 F4
3334 F5
3335 F5
3336 F5
3337 F5
3338 F5
3339 F5
3340 F5
3341 F5
3342 F5
3343 F5
3344 F5
3345 F5
3346 F5
3347 F6
3348 F6
3349 F6
3350 F6
3351 F6
3352 F6
3353 F6
3354 F6
3355 F6
3356 F6
3357 B5
4310 B5
4311 C5
4312 B11
4313 B11
4314 B11
4315 C12
4316 C12
4317 C12
7101-6 B3
7301 C9
F310 B5
F311 B5
F312 B5
F313 C5
F314 E10
F315 C11
F316 C6
F317 C11
F318 C6
F319 C6
F320 C11
F321 C6
F322 C6
F323 C11
F324 C6
F325 C6
F326 C11
F327 C6
F328 D11
F329 C6
F330 D6
F331 D11
F332 D6
F333 D2
F334 D6
F335 D6
F336 D6
F337 D11
F338 D6
F339 D6
F340 D11
F341 D6
F342 D6
F343 D6
F344 D11
F345 D6

F346 D6
F348 D6
F349 E6
F350 E11
F351 E6
F352 E11
F353 F11
F354 D11
I310 B2
I311 C2
I312 C2
I313 C6
I314 C2
I315 C2
I316 C2
I317 C2
I318 C2
I319 C2
I320 C2
I321 C2
I322 C2
I323 D2
I324 E9

Circuit Diagrams and PWB Layouts

72LC7.2E LA 7.

1080P Panel: LVDS Out

12345678910

F4 F4

A

B

C

D

E

F

LDVS OUT

AC16

I415

3413

3K3

C26

C25

AF17

AD16

AD7

OEXTR

PWM0|GPIO_10

PWM1|GPIO_11

DHS|GPIO_14

DVS|GPIO_15

DEN|GPIO_16

7101-7

GM1601

CTRL

PPWR|GPIO_08

PBIAS|GPIO_09

DCLK|GPIO_17

PWM2|GPIO_12

A26

B26

AC7

D26

F410

F3

I411

3410

10K

3411
15K

I413

7412
PDTC114ET

AC+|GPIO_G06_B6

AC-|GPIO_G06_B7

A3+|GPIO_G06_B4

A3-|GPIO_G06_B5

A2+|GPIO_G05_B1

A2-|GPIO_G05_B2

A1+|GPIO_G05_B4

A1-|GPIO_G05_B5

A0+|GPIO_G05_B6

A0-|GPIO_G05_B7

SHIELD5
SHIELD4
SHIELD3
SHIELD2
SHIELD1
SHIELD0

BC+

BC-

B3+

B2+

B1+

B0+

LVDS

GM1601

7101-8

+VDISP

B3-

B2-

B1-

B0-

2410

AE20
AF20

AE19
AF19

AE21
AF21

AE22
AF22

AE23
AF23

AD14
AE13
AE11
AD11
AC11
AF10

AE12
AF13

AF11
AF12

AF14
AE14

AF15
AE15

AF16
AE16

5410

4u7

I412

7411

2

1

I410

3

SI2301BDS-T1-E3

3412

100R

I414

2414

1u0

16V

RES

5411

120R

4401

TXACp
TXACn

TXA3p
TXA3n

TXA2p
TXA2n

TXA1p
TXA1n

TXA0p
TXA0n

TXBCp
TXBCn

TXB3p
TXB3n

TXB2p
TXB2n

TXB1p
TXB1n

TXB0p
TXB0n

TXA0n

TXA0p
TXA1n

TXA1p
TXA2n

TXA2p
TXACn

TXACp
TXA3n

TXA3p

TXB0n

TXB0p
TXB1n

TXB1p
TXB2n

TXB2p
TXBCn

TXBCp
TXB3n

TXB3p

1411

1412

1413

1414

1415

1416

1417

1418

1419

1420

DLW21S

DLW21S

DLW21S

DLW21S

DLW21S

DLW21S

DLW21S

DLW21S

DLW21S

DLW21S

2412
2413 10p

2415 10p
2416 10p

2417 10p
2418 10p

2419 10p
2420 10p

2422 10p

2423 10p
2424 10p

2425 10p
2426 10p

2427 10p
2428 10p

2429 10p
2430 10p

2432 10p

RES

2411

100n

2434

10p

10p2421

10p2431

16V47u

+VPANEL

F411

F412
F413
F414
F415
F416
F417

F418
F419

F420
F421

F422
F423
F424
F425
F426
F427

F428
F429

F430
F431

11 12

1G52
50

48 49
46 47
44 45
425143

41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5

FI-RE41S-HF

4
3
2
1

F432

G

A

B

C

D

E

F

G

1411 B8
1412 C8
1413 C8
1414 D8
1415 D8
1416 E8
1417 E8
1418 F8
1419 F8
1420 G8
1G52 B11
2410 B4
2411 B10
2412 B9
2413 B9
2414 C4
2415 C9
2416 C9
2417 C9
2418 C9
2419 D9
2420 D9
2421 D9
2422 D9
2423 E9
2424 E9
2425 E9
2426 E9
2427 F9
2428 F9
2429 F9
2430 F9
2431 G9
2432 G9
2434 B10
3410 B4
3411 B4
3412 B4
3413 C1
4401 A6
5410 A4
5411 A5
7101-7 B2
7101-8 F4
7411 B4
7412 C4
F410 C3
F411 C10
F412 C10
F413 C10
F414 C10
F415 C10
F416 C10
F417 C10
F418 D10
F419 D10
F420 D10
F421 D10
F422 D10
F423 D10
F424 D10
F425 D10
F426 D10
F427 E10
F428 E10
F429 E10
F430 E10
F431 E10
F432 E11
I410 B5
I411 B4
I412 B4
I413 B4
I414 B4
I415 B1

H

3139 123 6225.1

PCB MB 1080 BOLT-ON 12NC : 3139_123_62241_02
PCB SB 1080 BOLT-ON 12NC : 3139_123_62251_02

"400" ~ "499"

1234567

H

G_16860_022.eps

240107

8

91011

12

Circuit Diagrams and PWB Layouts

73LC7.2E LA 7.

1080P Panel: Supply In

123 11 12

F5 F5

SUPPLY IN

+3V3_IO

A

2535
100u
16V

2511100n

100n 2512

100n 2513

2514100n

2515100n

2517100n

100n 2516

2518100n

100n 2519

2520100n

100n 2521

B

C

+3V3_PLL

K14

K13

K12

B13

A13

D

22u

2540

16V

100n

100n

100n

+3V3_PLL

2543

2542

2541

E

7101-14
GM1601

NC

A1

C5

D5

AC17

K3

NCNC

F1

2547

F

7101-10
GM1601

G

AD19

LVDSA_GND_1

AC19

LVDSA_GND_2

AC20

LVDSA_GND_3

AC13

LVDSB_GND_1

AC14

LVDSB_GND_2

AC15

LVDSB_GND_3

AD17

VSSD33_LVDS

DISPLAY PWR

VDDD33_LVDS

LVDSA_3.3_3

LVDSA_3.3_2

LVDSA_3.3_1

LVDSB_3.3_3

LVDSB_3.3_2

LVDSB_3.3_1

AE17

AC22

AC21

AD20

AC12

AD13

AD12

+3V3_LVDSA

2578

H

3139 123 6225.1

1234

45678910

7101-9

GM1601

GPIO

GPIO_G08_B0|ICD_JTAG_CLK

GPIO_G08_B1|ICD_JTAG_MODE

GPIO_G08_B2|ICD_JTAG_TDI

GPIO_G08_B4|ICD_JTAG_TDO

GPIO_G08_B5|ICD_JTAG_RESET

RES

RES

1n0 2557

100n

10K3525

10K3529

10K3531

10K3534

10K3535

100n

2567

2568

100n

I522

I523
I524

I525

I526

100n

2569

3542
3543

3516 10K

3518 10K

3521 10K

3522 10K

GPIO_G08_B3|DVS

GPIO_G09_B0
GPIO_G09_B1
GPIO_G09_B2
GPIO_G09_B3
GPIO_G09_B4
GPIO_G09_B5

22u6.3V

2565

10K3515

100R
100R

10K3517

10K3519

10K3520

10K3523

+1V8_DVI

D6D8D9

DVI_1.8 DVI_3.3

N4

DVI_SCL

N3

DVI_SDA

A6

RXC+

B6

RXC-

A8

RX0+

B8

RX0-

A9

RX1+

B9

RX1-

A10

RX2+

B10

RX2-

B11

REXT

2563

D10

GM1601

DVI_GND

A7

A11B5B7C7D7

AD6
AE6
AF6
AE7

AF7

AD8

AE4
AF4
AC5
AD5
AE5
AF5

100n

I513

I514

I515
I516

I517
I518

I519
I520

+3V3_DVI

7101-2

DVI

2564

22p

100u
16V

K15

2548

22u 6.3V

AC10

L10

F514

AC8

L12

G3

AC6

D_GND

L13

2544
100n

F512

2549
100n

2550
100n

AC4

L14

TCLK

AB4
IO_3.3

L15

2551
100n

Y4

W4

D23

AA4

M10

M11

M12

L17

J3

H3

VDDA33_SDDS

VDDA33_DDDS

VSSA33_DDDS

VSSA33_SDDS

J2

H2

2552
100n

D22

D17

M13

M14

M15

M16

F4

G1

CLK-SYN

VDDA33_FPLL

VDDA33_RPLL

VSSA33_FPLL

VSSA33_RPLL

H4

F3

2553
100n

N11

M17

N10

7101-11

GM1601

1510

14M31818

+3V3_LVDSD

2554
100n

2523100n

100n 2522

7101-13
GM1601

SUPPLY

D_GND

N12

N13

N14

N15

H1

VDDD33_SDDS

VSSD33_DDDS

VSSD33_SDDS

K4

J4

2555
100n

2524100n

100n 2525

N16

N17

P10

P11

J1

F2

VDDD33_DDDS

ACS_RSET_HD

VSSD33_PLL

G2

2526100n

100n 2527

U17

P13

P14

P15

P16

P17

P12

2537
100n

VDDD33_PLL

G4

XTAL

K2

F513

3536 10K

3539 10K

+1V8_CORE

AD23

GPIO_G04_B0

AD24

GPIO_G04_B1

AE24

2533100n

2532100n

U16

R10

U11

R11

U10

R12

I521

3526

T16

T17

CORE_1.8

R13

R14

2538
100n

3K3

L16

T11

R15

R16

+3V3_PLL

2546

L11

R17

2539
100n

K17

D_GND

T10

22p

2530100n

100n 2528

100n 2529

100n 2531

K16

K10

K11

U13

U14

U15

T12

T13

T14

AD15

T15

U12

100n 2534

2536

100u

16V

F3

MAIN_SCL
MAIN_SDA

+3V3_LBADC

C13

LBADC_33

D13

100n

2577

7101-3

GM1601

ADC

C12

I527

I528

LBADC_IN1

B12

LBADC_IN2

A12

LBADC_IN3

D12

LBADC_RETURN

LBADC_GND

10K3537

10K3538

GPIO_G04_B2

AF24

GPIO_G04_B3

AF25

GPIO_G04_B4

AF26

GPIO_G04_B5

AE25

GPIO_G04_B6

AE26

GPIO_G04_B7

AD21

GPIO_G05_B0

AD22

GPIO_G05_B3

AC18

GPIO_G06_B0

AD18

GPIO_G06_B1

AE18

GPIO_G06_B2

AF18

GPIO_G06_B3

AE8

GPIO_G07_B0

AF8

GPIO_G07_B1

AC9

GPIO_G07_B2

AD9

GPIO_G07_B3

AE9

GPIO_G07_B4

AF9

GPIO_G07_B5

AD10

GPIO_G07_B6

AE10

GPIO_G07_B7

+3V3_SW

354110K

RES

10K 3540

RES

25561n0

6.3V22u

2566

2575

3524 10K

3527 10K
3528 10K

3530 10K

3532 10K

3533 10K

"500" ~ "599"

56

7

8 9 10 11 12

NVM_WP_SCALER

F2

+1V8_ADC

100n

A4

ADC_1.8

L3

AVSYNC

L4

AHSYNC

N2

VGA_SCL

N1

VGA_SDA

C3

SOG

D2

RED+

D1

RED-

C2

GREEN+

C1

GREEN-

B2

BLUE+

B1

BLUE-

ADC_AGND ADC_DGND

C4D4E1E2E4

C6C8C9

C10

C11

D11

I510

10K 3512

A3

ANA-IN

3510

10K

JTAG_CLK_SCL

JTAG_CLK_SDA

I512

I511

351310K

10K 3514

+3V3_ADC

B3

7101-1

GM1601

ADC_3.3

A5

100n

100n

100n

2570

2572

2571

3511
10K

F510
F511

B3B-PH-SM4-TBT(LF)

6.3V22u

2558

2559

A2D3E3

B4

100n

100n

22u6.3V

2573

2574

2576

100n

RES

1502

100n

2560

1
2
3

45

100n

100n

2561

2562

G_16860_023.eps

240107

A

B

C

D

E

F

G

H

1502 B12
1510 F5
2511 A2
2512 A2
2513 A2
2514 A2
2515 A3
2516 A3
2517 A3
2518 A3
2519 A3
2520 A3
2521 A3
2522 A5
2523 A5
2524 A5
2525 A5
2526 A5
2527 A6
2528 A7
2529 A7
2530 A7
2531 A7
2532 A7
2533 A8
2534 A8
2535 A2
2536 A8
2537 D6
2538 D6
2539 D6
2540 D3
2541 D3
2542 D3
2543 D4
2544 D4
2546 E6
2547 E3
2548 G4
2549 G4
2550 G4
2551 G4
2552 G4
2553 G5
2554 G5
2555 G5
2556 D9
2557 D9
2558 C11
2559 C12
2560 C12
2561 C12
2562 C12
2563 C10
2564 C10
2565 C10
2566 F9
2567 F9
2568 F9
2569 F9
2570 F11
2571 F11
2572 F11
2573 F11
2574 F11
2575 F9
2576 F12
2577 G7
2578 H3
3510 A11
3511 A11
3512 B11
3513 B11
3514 B11
3515 D9
3516 D9
3517 D9
3518 D9
3519 D9
3520 D9
3521 E9
3522 E9
3523 E9
3524 F9
3525 F9
3526 F6
3527 F9
3528 F9
3529 F9
3530 F9
3531 F9
3532 G9
3533 G9
3534 G9
3535 G9
3536 G5
3537 G5
3538 G5
3539 G5
3540 D9
3541 D9
3542 D9
3543 D9
7101-1 C11

7101-10 F2
7101-11 E5
7101-13 B5
7101-14 E2
7101-2 F10
7101-3 G7
7101-9 A9
F510 A12
F511 A12
F512 F4
F513 F6
F514 G4
I510 B11
I511 B11
I512 B11
I513 D10
I514 D10
I515 D10
I516 D10
I517 D10
I518 D10
I519 E10
I520 E10
I521 E6
I522 F9
I523 F9
I524 F9
I525 F9
I526 G9
I527 G6
I528 G6

Circuit Diagrams and PWB Layouts

74LC7.2E LA 7.

1080P Panel: DDR SDRAM

123456

F6 F6

DDR SDRAM

+2V5_DDR_MAL

A

2614100n

2612100n

3610

10K

1%

B

C

D

FSVREF

FSRAS
FSCAS
FSWE

FSCLK+
FSCLK­FSCKE

FSDQM(0)
FSDQM(1)
FSDQM(2)
FSDQM(3)

FSBKSEL(0)
FSBKSEL(1)

FSADDR(0)
FSADDR(1)
FSADDR(2)
FSADDR(3)
FSADDR(4)
FSADDR(5)
FSADDR(6)
FSADDR(7)
FSADDR(8)
FSADDR(9)
FSADDR(10)
FSADDR(11)

F611
F612
F613

F614
F615
F616

2643

100n 2611

100n

F610

2644

100n 2613

3611

10K
1%

22u 16V

1%

150R3614

E

2616100n

100n 2615

5816

1535659629581422

VREF

28

CS
RAS

26

CAS

25

WE

55

CK

54

CK

53

CKE

23

0

56

1

DM

24

2

57

3

29

0

30

BA

1

31

0

32

1

33

2

34

3

47

4

48

5

A

49

6

50

7

51

8

45

9

36

10

37

11

38
39
40

NC

41
42
43

93

RFU

52

MCL

VSS VSSQ

466685

100n 2617

K4D263238I-UC50

2620100n

2618100n

100n 2619

7601

Φ

SDRAM

1M X 32 X 4

5

11196270768292

5967737986

VDDQVDD

2641
47u

6.3V

D

D

99

F

DQS

2623100n

2621100n

100n 2622

44
87
8827

NC

89
90
91

97

0

98

1

100

2

1

3

3

4

4

5

6

6

7

7

60

8

61

9

63

10

64

11

68

12

69

13

71

14

72

15

9

16

10

17

12

18

13

19

17

20

18

21

20

22

21

23

74

24

75

25

77

26

78

27

80

28

81

29

83

30

84

31

94

100n 2624

1u0

2610

FSDATA(0)

FSDATA(1)

FSDATA(2)

FSDATA(3)

FSDATA(4)

FSDATA(5)

FSDATA(6)

FSDATA(7)

FSDATA(8)

FSDATA(9)

FSDATA(10)

FSDATA(11)

FSDATA(12)

FSDATA(13)

FSDATA(14)

FSDATA(15)

FSDATA(16)

FSDATA(17)

FSDATA(18)

FSDATA(19)

FSDATA(20)

FSDATA(21)

FSDATA(22)

FSDATA(23)

FSDATA(24)

FSDATA(25)

FSDATA(26)

FSDATA(27)

FSDATA(28)

FSDATA(29)

FSDATA(30)

FSDATA(31)

FSDQS

FSVREF

FSVREF

FSDATA(20)
FSDATA(21)
FSDATA(22)

FSDATA(23)

FSDATA(16)
FSDATA(17)
FSDATA(18)

FSDATA(19)

FSDATA(4)
FSDATA(5)
FSDATA(6)

FSDATA(7)

FSDATA(0)
FSDATA(1)
FSDATA(2)

FSDATA(3)

FSDATA(28)

FSDATA(29)

FSDATA(30)
FSDATA(31)

FSDATA(27)
FSDATA(26)

FSDATA(25)
FSDATA(24)

FSDATA(12)
FSDATA(13)
FSDATA(14)

FSDATA(15)

FSDATA(9)
FSDATA(10)

FSDATA(11)

3636-4
3636-3
3636-2
3636-1

3635-1 22R

3632-4
3632-3
3632-2
3632-1

3631-4
3631-3
3631-2
3631-1

3626 22R
3627
3628 22R

22R
22R
22R
22R

22R
22R
22R
22R

22R
22R
22R
22R

F2

47u

6.3V

3637-4
3637-3
3637-2
3637-1

3634-1
3634-2
3634-3
3634-4

3633-1
3633-2
3633-3
3633-4

2642

3612
3613

22R
22R
22R
22R

22R3635-4
22R3635-3
22R3635-2

22R
22R
22R
22R

22R
22R
22R
22R

22R3625

22R

G

H

"600" ~ "699"

3139 123 6225.1

123

456

7 8 9 10 11

2637100n

100n 2638

J23

L23

F23

H23

M23

FS_2.5FS_2.5

MSTR_SCL|GPI_03
MSTR_SDA|GPI_04

+1V8_CORE

2639100n

K23

E23

VDDA18_DLL

FSADDR0
FSADDR1
FSADDR2
FSADDR3
FSADDR4
FSADDR5
FSADDR6
FSADDR7
FSADDR8

FSADDR9
FSADDR10
FSADDR11

FSBKSEL0
FSBKSEL1

FSDQM0
FSDQM1
FSDQM2
FSDQM3

FSCKE

FSWE

FSCAS

FSRAS

FSCLKn

FSCLKp

FSDQS

AD25
AD26
AC24
AC25

AB26
AA24
AA25
AA26

AB25

AC26

AB24

W26

Y24

Y25
Y26

U25
U26

V26

V25

V24

U23

U24

100n 2640

3639-1 22R

ADDR(0)
ADDR(1)

3639-3 22R

ADDR(2)

3639-4 22R

ADDR(3)

ADDR(0)
ADDR(1)
ADDR(2)
ADDR(3)
ADDR(4)
ADDR(5)
ADDR(6)
ADDR(7)
ADDR(8)

ADDR(9)
ADDR(10)
ADDR(11)

BKSEL(0)
BKSEL(1)

T25

DQM(0)
DQM(1)
DQM(2)

T24

DQM(3)

CKE

WE

CAS

RAS
CLK­CLK+

L26

DQS

P4
P3

ADDR(4)
ADDR(5)
ADDR(6)
ADDR(7)

ADDR(11)
ADDR(10)
ADDR(9)
ADDR(8)

CKE
RAS
CAS
WE

DQM(0)
DQM(1)
DQM(2)
DQM(3)

BKSEL(0)

F617

F618

RES
RES

3640-1 22R
3640-2 22R
3640-3 22R

3641-2 22R

3641-3
3641-4 22R

3643-4 22R
3643-3
3643-2 22R
3643-1 22R

22R

3645 22R

3618

3619

3620

3642-122R
3642-3
3642-422R
3642-222R

22R3639-2

22R3640-4

22R3641-1
22R

22R

22R3646

22R

22R

22R

100R3621
100R3622

FSADDR(0)
FSADDR(1)
FSADDR(2)
FSADDR(3)

FSADDR(4)
FSADDR(5)
FSADDR(6)
FSADDR(7)

FSADDR(11)
FSADDR(10)

FSADDR(9)
FSADDR(8)

FSCKE
FSRAS
FSCAS

FSWE

FSDQM(0)
FSDQM(1)
FSDQM(2)
FSDQM(3)

FSBKSEL(0)
FSBKSEL(1)BKSEL(1)

FSCLK-

FSCLK+

FSDQS

+3V3_SW

RES

10K 3616

26451n0

RES

361710K

1n0 2646

RES

SCL_IO
SDA_IO

RES

#RESET

3615

10K

DATA(20)
DATA(21)
DATA(22)

DATA(23)

DATA(16)
DATA(17)
DATA(18)

DATA(19)

DATA(4)
DATA(5)
DATA(6)

DATA(7)

DATA(0)
DATA(1)
DATA(2)

DATA(3)

DATA(28)
DATA(29)
DATA(30)
DATA(31)

DATA(27)
DATA(26)

DATA(25)
DATA(24)

DATA(12)
DATA(13)
DATA(14)

DATA(15)

DATA(9)

DATA(10)

DATA(11)

100n 2625

10K
10K

)8(ATAD)8(ATADSF

2626100n

DATA(0)
DATA(1)
DATA(2)

DATA(3)

DATA(4)
DATA(5)
DATA(6)

DATA(7)

DATA(8)
DATA(9)
DATA(10)

DATA(11)

DATA(12)
DATA(13)
DATA(14)

DATA(15)

DATA(16)
DATA(17)
DATA(18)

DATA(19)

DATA(20)
DATA(21)
DATA(22)

DATA(23)

DATA(24)
DATA(25)

DATA(26)
DATA(27)
DATA(28)

DATA(29)

DATA(30)
DATA(31)

100n 2627

I610
I611

I614

2628100n

2629100n

K1

RESET_

M3

IR0|GPIO_28

M4

IR1|GPIO_29

R4

EXTCLK|GPI_02

J24

FSVREF1

K26

FSVREFVSS1

W25

FSVREF2

W24

FSVREFVSS2

E24

FSDATA0

E25

FSDATA1

E26

FSDATA2

G26

FSDATA3

G24

FSDATA4

H26

FSDATA5

H24

FSDATA6

J25

FSDATA7

T26

FSDATA8

R25

FSDATA9

P24

FSDATA10

P26

FSDATA11

N24

FSDATA12

N26

FSDATA13

M25

FSDATA14

L24

FSDATA15

L25

FSDATA16

M26

FSDATA17

M24

FSDATA18

N25

FSDATA19

N23

FSDATA20

P25

FSDATA21

R26

FSDATA22

R24

FSDATA23

K24

FSDATA24

J26

FSDATA25

H25

FSDATA26

G23

FSDATA27

G25

FSDATA28

F24

FSDATA29

F25

FSDATA30

F26

FSDATA31

100n 2630

AC23

AB23

2631100n

AA23

Y23

+2V5_DDR_MAL

100n 2632

T23

V23

R23

W23

2633100n

100n 2634

7101-12
GM1601

SYSTEM

VSSA18_DLL

K25

2635100n

100n 2636

P23

7 8 9 101112

12

F2

G_16860_024.eps

240107

A

B

C

D

E

F

G

H

2610 A4
2611 A2
2612 A2
2613 A2
2614 A2
2615 A2
2616 A3
2617 A3
2618 A3
2619 A3
2620 A3
2621 A4
2622 A4
2623 A4
2624 A4
2625 B7
2626 B7
2627 B7
2628 B7
2629 B7
2630 B8
2631 B8
2632 B8
2633 B8
2634 B8
2635 B8
2636 B9
2637 B9
2638 B9
2639 B9
2640 B10
2641 A4
2642 B6
2643 B2
2644 B2
2645 F11
2646 F12
3610 A2
3611 B2
3612 C7
3613 C7
3614 C2
3615 C7
3616 E11
3617 E12
3618 E11
3619 E11
3620 E11
3621 E11
3622 F11
3625 E6
3626 E6
3627 E6
3628 E6
3631-1 E6
3631-2 E6
3631-3 E6
3631-4 E6
3632-1 E6
3632-2 D6
3632-3 D6
3632-4 D6
3633-1 F6
3633-2 F6
3633-3 F6
3633-4 F6
3634-1 F6
3634-2 F6
3634-3 F6
3634-4 F6
3635-1 D6
3635-2 D6
3635-3 D6
3635-4 D6
3636-1 D6
3636-2 D6
3636-3 D6
3636-4 D6
3637-1 F6
3637-2 F6
3637-3 F6
3637-4 E6
3639-1 C11
3639-2 C11
3639-3 C11
3639-4 C11
3640-1 C11
3640-2 C11
3640-3 C11
3640-4 C11
3641-1 D11
3641-2 C11
3641-3 D11
3641-4 D11
3642-1 D11
3642-2 D11
3642-3 D11
3642-4 D11
3643-1 D11
3643-2 D11
3643-3 D11
3643-4 D11
3645 E11
3646 E11

7101-12 B8
7601 B3
F610 B2
F611 C2
F612 C2
F613 C2
F614 C2
F615 C2
F616 C2
F617 E10
F618 E10
I610 C7
I611 C7
I614 C7

Circuit Diagrams and PWB Layouts

75LC7.2E LA 7.

1080P Panel: DC Power Supply

12345678

F7 F7

DC POWER SUPPLY

9

10

A

7714

B

C

D

2730

330u 16V

1710

1
2
3
4

SUPPLY

B4B-PH-SM4-TBT(LF)

CONNECTOR (PSU)

E

100n2713

100K3712

2715 100n

F

F714

F717

2717 100n

F715

F718

I714

I715

I717

5710

10u

7710

L6910

1

4

2

8

VREF

SS

OSC

EAREF

F716

+12V

10K

3711

I712

9

15

VCC

PGOOD

Monitor

Protection & Ref

OSC

I721

I710

3

OCSET

COMP
5

2720

+12V

3710 510R

1n02711

NC

16

I723

15n

1n52721

+12V

BOOT

HGATE

PHASE

LGATE

PGND

GND

VFB

3714

2K7

2710

2712

12

11

10

14

13

I720

7

6

100n

100u

16V

I713

I716

I718

I719

6701

BAS316

2714 100n

3716

3717
1K8

4K73715

1K0

+12V

2723
330u
16V

I711

+12V

7

8

7701-1
SI4936ADY

2

1

4

3

I722

3713

10R

47n2722

100n2718

4u72719

5

6

7701-2
SI4936ADY

+12V

5711

10u

+3V3

22u2716

LD1117DT18

32

OUTIN

COM

2729

100n

1

7713

LD1117DT25

32

OUTIN

COM
2724
100n

1

F722F721

5716

30R

+3V3_IO

F2, F5

F723

30R5717

+3V3_LVDSA

F3, F5

30R5718

5719 30R

30R

5720

5721 30R

30R5722

30R5723

5724

30R

F724

F725

F726

F727

F728

F729

F730

+3V3_LVDSD

F3, F5

+3V3_LBADC

F5

+3V3_ADC

F5

+3V3_SW

F1, F2, F5, F6

+3V3_DVI

F5

+3V3_PLL

F5

+3V3_LVDSVCC

F3

F710

F719

2727

10u

2728
100n

+1V8

+2V5

30R5712

5713 30R

30R

5714

F711

+1V8_CORE

F5, F6

F712

+1V8_ADC

F5

F713

+1V8_DVI

F5

F720

30R5715

+2V5_DDR_MAL

F6

G

1211

1710 C2
2710 D5
2711 D4
2712 D5
2713 F2
2714 E5
2715 F2
2716 E6
2717 F3
2718 F5
2719 F5

A

2720 F4
2721 F4
2722 F6
2723 D8
2724 D8
2727 B9
2728 B9
2729 B8
2730 B8
3710 D4
3711 D4
3712 F2

B

3713 E6
3714 F5
3715 F5
3716 F5
3717 G5
5710 C3
5711 E6
5712 B10
5713 B10
5714 C10
5715 C10
5716 E8

C

5717 E8
5718 E8
5719 F8
5720 F8
5721 F8
5722 F8
5723 F8
5724 G8
6701 D5
7701-1 E6
7701-2 E6

D

7710 D3
7713 C8
7714 B8
F710 B9
F711 B10
F712 B10
F713 C10
F714 C3
F715 C3
F716 C4
F717 C3
F718 C3

E

F719 C9
F720 C10
F721 E7
F722 E8
F723 E8
F724 E8
F725 F8
F726 F8
F727 F8
F728 F8
F729 F8
F730 G8

F

I710 D4
I711 D6
I712 D4
I713 D5
I714 E3
I715 E3
I716 E5
I717 E3
I718 E5
I719 E5
I720 F5

G

I721 F4
I722 F5
I723 F4

H

3139 123 6225.1

H

"700" ~ "799"

G_16860_025.eps

240107

1

2

3

4

5

6 7 8 9 10 11 12

Circuit Diagrams and PWB Layouts

76LC7.2E LA 7.

Layout 1080P Panel (Top Side)

1101 F6
1201 E5
1302 F5
1411 A3
1412 A3
1413 A3
1414 A3
1415 A3
1416 A3

1417 A4
1418 A4
1419 A4
1420 A4
1510 D4
1710 A6
1G51 F3
2210 B5
2211 B5

2214 B4
2215 E5
2216 E5
2317 E3
2410 D2
2411 A2
2412 A3
2414 E2
2434 A3

2535 B5
2536 D5
2540 D5
2548 A2
2558 E5
2565 E4
2575 E4
2576 E4
2578 A2

2610 D2
2612 B2
2613 C1
2614 D2
2615 D1
2620 C1
2621 C1
2622 C1
2623 D2

2624 C1
2641 D1
2642 B2
2643 C1
2644 B1
2710 B6
2712 B6
2716 B6
2723 E6

2730 D6
3110 E6
3111 E5
3112 E5
3113 E6
3204 C5
3205 C5
3210 B5
3211 B5

3212 C5
3213 C5
3215 C5
3216 C5
3219 C5
3222 E5
3223 E5
3224 E5
3225 E5

3228 C5
3229 B4
3313 F3
3317 F3
3322 F3
3328 F3
3330 F3
3410 D2
3411 D2

3412 E2
3610 B2
3611 C1
3627 D2
3628 D2
3631 D2
3632 C2
3635 C2
3636 C2

3639 B2
3640 B1
3641 B2
3645 B2
3646 B3
4312 E5
4313 E5
4314 E5
4315 E4

4316 E4
4317 E4
4401 E2
5410 E2
5411 D2
5710 A6
5711 B6
5715 D2
5716 B6

5721 E5
5723 D5
6101 E6
6102 E5
6210 E5
6211 E5
7101 C4
7201 C5
7202 B4

7203 E5
7301 E3
7411 D2
7412 D2
7601 C2

Layout 1080P Panel (Bottom Side)

2212 C2
2213 C2
2310 E3
2311 E4
2312 E4
2313 E4
2314 E4
2315 E4
2316 E4
2413 A4
2415 A4
2416 A4
2417 A4
2418 A4
2419 A4
2420 A4
2421 A4

2422 A4
2423 A4
2424 A4
2425 A4
2426 A3
2427 A3
2428 A3
2429 A3
2430 A3
2431 A3
2432 A3
2511 B3
2512 B3
2513 B3
2514 B3
2515 B3
2516 C3

2517 C3
2518 C3
2519 D4
2520 D4
2521 D4
2522 C4
2523 C4
2524 C3
2525 C3
2526 C4
2527 C4
2528 C3
2529 C4
2530 C3
2531 C4
2532 C4
2533 C3

2534 C3
2537 C2
2538 C2
2539 D3
2541 C3
2542 C3
2543 C3
2544 C2
2546 D3
2547 D3
2549 B4
2550 B4
2551 B4
2552 B4
2553 B3
2554 B3
2555 B3

2556 C2
2557 C2
2559 D3
2560 C3
2561 D3
2562 D3
2563 D3
2564 D3
2566 D3
2567 C3
2568 D3
2569 D3
2570 D3
2571 D3
2572 D3
2573 D3
2574 D3

2577 D3
2611 C5
2616 C5
2617 C5
2618 C5
2619 C5
2625 B4
2626 C4
2627 C4
2628 C4
2629 C4
2630 C4
2631 C4
2632 C4
2633 C4
2634 C4
2635 C4

2636 C4
2637 C4
2638 C4
2639 D4
2640 C4
2645 C3
2646 C3
2711 B1
2713 B1
2714 A1
2715 B1
2717 B2
2718 A1
2719 A1
2720 B1
2721 B1
2722 B1

2724 D1
2727 D1
2728 D1
2729 C1
3114 C2
3115 C2
3116 C3
3117 C2
3118 C3
3119 D4
3202 C2
3214 C2
3217 C2
3218 C2
3226 B2
3227 C2
3230 C3

3231 C3
3232 C2
3310 E4
3311 D4
3312 D4
3314 C4
3315 D3
3316 D3
3318 D3
3319 D3
3320 C3
3321 D3
3323 D3
3324 D3
3325 C3
3326 D3
3327 D4

3329 C4
3331 D4
3332 E3
3333 D4
3334 E4
3335 E4
3336 E4
3337 E4
3338 E4
3339 D4
3340 D4
3341 E4
3342 D4
3343 D4
3344 D4
3345 D3
3346 D4

3347 D4
3348 D3
3349 D4
3350 D4
3351 D4
3352 D4
3353 D4
3354 D4
3355 D4
3356 D4
3357 D4
3413 B3
3510 A2
3511 A2
3512 B3
3513 B3
3514 B3

3515 C3
3516 C3
3517 D3
3518 D3
3519 D2
3520 D2
3521 D2
3522 D3
3523 D2
3524 C3
3525 C3
3526 C2
3527 D3
3528 D3
3529 D3
3530 D3
3531 D3

3532 D3
3533 D3
3534 D3
3535 D3
3536 D3
3537 D3
3538 D3
3539 C3
3540 C2
3541 C2
3542 C2
3543 C2
3612 C3
3613 C3
3614 C6
3615 C3
3616 C3

3617 C3
3618 C6
3619 C6
3620 C5
3621 C3
3622 C3
3625 C6
3626 D6
3633 C6
3634 C5
3637 C6
3642 C5
3643 C5
3710 B1
3711 A2
3712 B1
3713 A1

3714 B1
3715 B1
3716 B1
3717 B2
4310 E4
4311 E4
5712 D1
5713 E2
5714 E3
5717 E3
5718 E3
5719 D3
5720 D2
5722 D3
5724 E3
6701 A1
7701 B1

7710 A1
7713 D1
7714 C1

3139 123 6225.1

G_16860_082.eps

120307

3139 123 6225.1

G_16860_083.eps

120307

Front IR / LED Panel

Circuit Diagrams and PWB Layouts

77LC7.2E LA 7.

A

B

C

D

E

F

12345

IR/LED/LIGHT-SENSOR

J J

7010

GP1UE260RKVF

VS

OUT

GND

4

1M21

1
2
3
4
5
6

S6B-PH-K

1
2
3

S3B-PH-K

5

1M20

S7B-PH-K

1M01

2

1

3

F010

1
2
3
4
5
6

7

+5V_STANDBY

3010

330R

3011

10K 6K8

3014

+5V_STANDBY+5V_STANDBY

3015

0R

7014

BC847B

4016

3017
10K

LIGHT_SENSOR

6014

F011
F012
F013
F014
F015
F016

2002

1u0

RESERVED

BZX384-C5V6

FOR LIGHT SENSOR ONLY

RC

LED2

+5V_STANDBY

LED1

RES

KEYBOARD

22u

2001

RC

6012

LS

7013

BPW34

6015

RES

BZX384-C4V7

BZX384-C4V7

3016
2M2

3018
4M7

3019 150R

6016

BZX384-C4V7

150R3020

+5V_STANDBY +5V_STANDBY

MFD

IR Tx

RES

6013

L-934F3BT

1

10K

RES

3021

4012

MFD

ITV

6010

1

2

L-174A2PBC-A

4017 4010

3012

RES

4013

32

GREEN

6001-2

BLUE

MFD

6K8

3

7011

BC847B

2

ITV

SPR-325MVW

ITV

6002

Bi- LED

ITV

RES

MFD ITVREF

3012

3K3 82R
820R 180R3013

YN4010
NY4011
YN4012
NY4013
NY4014
YN4015
YN4017

YN4019
N Bi-GR/RD6001

NIR ED6002

BLUE LED N6010

RED LED N6011

1

2

L-174A2F3BT

ITV

4018

YN4018

6011

L-174A2IT

1

2

4019

3013

RES

4014

12

RED

6001-1

RES

RED

MFD

820R

7012

BC847B

ITV

SPR-325MVW

4011

RES

4015

ITV

3022

10K

MFD

A

B

C

D

E

F

1M01 E1
1M20 E1
1M21 E1
2001 A2
2002 D2
3010 A2
3011 A2
3012 B4
3013 B4
3014 B2
3015 C2
3016 C3
3017 D2
3018 D3
3019 E3
3020 E3
3021 C3
3022 C5
4010 A4
4011 B5
4012 D3
4013 D4
4014 D5
4015 D5
4016 D2
4017 B4
4018 B4
4019 B5
6001-1 D5
6001-2 D4
6002 B4
6010 B3
6011 B4
6012 B2
6013 B3
6014 D2
6015 E2
6016 E2
7010 B1
7011 C4
7012 B5
7013 C2
7014 C2
F010 E2
F011 E2
F012 E2
F013 E2
F014 E2
F015 E2
F016 E2

Personal Notes:

3139 123 6210.1

12345

G_16850_025.eps

110107

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

78LC7.2E LA 7.

Layout Front IR / LED Panel (Top Side)

1M01 D4
1M20 D2
1M21 D2

6001 B2
6002 B1
6010 B2

6011 B1
6013 A1
7010 A3

7013 B4

Layout Front IR / LED Panel (Bottom Side)

2001 C2
2002 B1
3010 C2
3011 C3
3012 B4
3013 B4

3014 B2
3015 B1
3016 A2
3017 C1
3018 B1
3019 C3

3020 C3
3021 C3
3022 C3
4001 D3
4002 C3
4004 C2

4005 C2
4010 A3
4011 B4
4012 B3
4013 B3
4014 B4

4015 C4
4016 C1
4017 A4
4018 A3
4019 B4
6012 D3

6014 D4
6015 C3
6016 C2
7011 B3
7012 C4
7014 C1

3139 123 6210.1

G_16850_030.eps

020207

3139 123 6210.1

G_16850_031.eps

020207

8. Alignments

Alignments

EN 79LC7.2E LA 8.

Index of this chapter:

8.1 General Alignment Conditions

8.2 Hardware Alignments

8.3 Software Alignments

8.4 Option Settings

Note: Figures below can deviate slightly from the actual
situation, due to the different set executions.

General: The Service Default Mode (SDM) and Service
Alignment Mode (SAM) are described in chapter 5. Menu
navigation is done with the CURSOR UP, DOWN, LEFT or
RIGHT keys of the remote control transmitter.

8.1 General Alignm e n t Co nd it io n s

Perform all electrical adjustments under the following
conditions:

• Power supply voltage (depends on region):
– AP-NTSC: 120 V
– AP-PAL-multi: 120 - 230 V
– EU: 230 V

AC

– LATAM-NTSC: 120 - 230 V
– US: 120 V

AC

or 230 VAC / 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

AC

/ 50 Hz (± 10%).

/ 50 Hz (± 10%).

AC

/ 60 Hz (± 10%).

• Connect the set to the mains via an isolation transformer
with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct
ground (e.g. measure audio signals in relation to
AUDIO_GND).
Caution: It is not allowed to use heatsinks as ground.

• Test probe: Ri > 10 Mohm, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform
alignments.

8.2 Hardware Alignments

There are no hardware alignments foreseen for this chassis,
but below find an overview of the most important DC voltages
on the SSB. These can be used for checking proper functioning
of the DC/DC converters.

Description Test Point Specifications (V) Diagram

Min. Typ. Max.

+AUDIO_POWER FB21 11.40 12.00 12.60 B02_DC-DC

-AUDIO_POWER FB23 -11.40 -12.00 -12.60 B02_DC-DC
+12V_DISP FB34 11.40 12.00 12.60 B02_DC-DC
+8V F401 7.60 8.00 8.40 B04C_Audio Proc.
+5V_STANDBY FB27 4.94 5.20 5.46 B02_DC-DC
+5V_SW FB16 4.93 5.19 5.45 B02_DC-DC
+5V_D I411 4.75 5.00 5.25 B04C_Audio Proc.
+5V_AUD I410 4.75 5.00 5.25 B04C_Audio Proc.
+5V_TUN I115 4.75 5.00 5.25 B03_Tuner IF
+3V3_STBY FB13 3.10 3.30 3.50 B02_DC-DC
+3V3_SW FB17 3.1 3.3 3.5 B02_DC-DC
+3V3_MOJO FB19 3.1 3.3 3.5 B02_DC-DC
+3V3 FJ01 3.2 3.27 3.4 B03F_DVB-MOJO
+3V3FE FF14 3.2 3.27 3.4 B03B_DVB-Demod
+1V8S_SW FB11 1.70 1.80 1.90 B02_DC-DC
+1V2_MOJO FB20 1.18 1.25 1.31 B02_DC-DC
+1V2_CORE FG39 1.14 1.24 1.34 B03D_DVB-MOJO
VDISP F210 11.40 12.00 12.60 B04B_Video proc.

8.3.1 Tuner Adjustment (RF AGC Take Over Point)

Purpose: To keep the tuner output signal constant as the input

signal amplitude varies.

The LC7.xx chassis comes with two tuner types: the UV1318S
for the analogue sets (LC7.1x) and the TD1316AF for the
hybrid sets (LC7.2x).

For the digital tuner TD1316AF, no alignment is necessary, as
the AGC alignment is done automatically (standard value:
“15”), even during analogue reception.

The analogue tuner UV1318S can also use the default value of
“15”, however in case of problems use the following method
(use multimeter and RF generator):

• Apply a vision IF carrier of 38.9 MHz (105 dBuV = 178
mVrms) to test point F111 (input via 50 ohm coaxial cable
terminated with an RC network of series 10nF with 120
ohm to ground).

• Measure voltage on pin 1 of the tuner.

• Adjust AGC (via SAM menu: TUNER -> AGC), until voltage
on pin 1 is 3.3 +0.5/-1.0 V.

• Store settings and exit SAM.

8.3.2 RGB Alignment

Before alignment, choose “TV MENU” -> “Picture” and set:

• “Brightness” to “50”.

• “Colour” to “50”.

• “Contrast” to “100”.

White Tone Alignment:

• Activate SAM.

• Select “RGB Align.” -> “White Tone” and choose a colour
temperature.

• Use a 100% white screen as input signal and set the
following values:
– All “White point” values initial to “256”.
– All “BlackL Offset” values to “0”.

In case you have a colour analyser:

• Measure with a calibrated (phosphor- independent) colour
analyser (e.g. Minolta CA-210) in the centre of the screen.
Consequently, the measurement needs to be done in a
dark environment.

• Adjust the correct x,y coordinates (while holding one of the
White point registers R, G or B on “256”) by means of
decreasing the value of one or two other white points to the
correct x,y coordinates (see table “White D alignment
values”). Tolerance: dx: ± 0.004, dy: ± 0.004.

• Repeat this step for the other colour Temperatures that
need to be aligned.

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Table 8-1 White D alignment values

Value Cool (11000 K) Normal (9000 K) Warm (6500 K)
x 0.278 0.289 0.314
y 0.278 0.291 0.319

8.3 Software Alignments

With the software alignments of the Service Alignment Mode
(SAM) the Tuner and RGB settings can be aligned.
To store the data: Use the RC button “Menu” to switch to the
main menu and next, switch to “Stand-by” mode.

If you do not have a colour analyser, you can use the default
values. This is the next best solution. The default values are
average values coming from production (statistics).

• Set the RED, GREEN and BLUE default values per
temperature according to the values in the “Tint settings”
table.

EN 80 LC7.2E LA8.

Alignments

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Table 8-2 Tint settings

Alignment 26” (*) 32” 37” (*) 42”
COOL_RED t.b.d. 250 t.b.d. 249
COOL_GREEN t.b.d. 251 t.b.d. 241
COOL_BLUE t.b.d. 246 t.b.d. 246

NORMAL_RED t.b.d. 252 t.b.d. 251
NORMAL_GREEN t.b.d. 246 t.b.d. 238
NORMAL_BLUE t.b.d. 228 t.b.d. 229

WARM_RED t.b.d. 252 t.b.d. 246
WARM_GREEN t.b.d. 232 t.b.d. 222
WARM_BLUE t.b.d. 197 t.b.d. 199

(*) This data was not available at the time of writing, but for
default settings use the column on the right.

Black Level Offset Alignment

• Activate SAM.

• Select “RGB Align.” -> “BlackL Offset” and choose a colour.

• Set all “BlackL Offset” values to “0”.

• When finished return to the SAM root menu and press
STANDBY on the RC to store the aligned values to the
NVM.

Note: For models with “Pixel Plus”, the “Black Offset” (black
level offset) should NOT be changed in SAM. These offset
values of RGB should be set to “0”, and should NOT be
adjusted. Any adjustment of these values will affect the low
light white balance.

ADC YPbPr Gray Scale Alignment

When the grey scale is not correct, use this alignment:

• Activate SAM.

• Select “NVM Editor”.

• Enter address “26(dec)” (ADR).

• Set value (VAL) to “197(dec) ± 25”.

• Store (STORE) the value.

8.4 Option Settings

8.4.1 Introduction

The microprocessor communicates with a large number of I
ICs in the set. To ensure good communication and to make
digital diagnosis possible, the microprocessor has to know
which ICs to address. The presence/absence of these specific
ICs (or functions) is made known by the option codes.

Notes:

• After changing the option(s), save them with the STORE
command.

• The new option setting becomes active after the TV is
switched "off" and "on" again with the mains switch (the
EAROM is then read again).

8.4.2 How To Set Option Codes

When the NVM is replaced, all options will require resetting. To
be certain that the factory settings are reproduced exactly, you
must set all option numbers. You can find the correct option
numbers in table “Option Codes OP1...OP7“ below.

How to Change Options Codes

An option code (or “option byte”) represents eight different
options (bits). When you change these numbers directly, you
can set all options very quickly. All options are controlled via
seven option bytes (OP1... OP7).
Activate SAM and select “Options”. Now you can select the
option byte (OP1.. OP7) with the CURSOR UP/ DOWN keys,
and enter the new 3 digit (decimal) value. For the correct
factory default settings, see the next table “Option codes
OP1...OP7“. For more detailed information, see the second
table “Option codes at bit level“. If an option is set (value “1”), it
represents a certain decimal value.
When all the correct options (bits) are set, the sum of the
decimal values of each Option Byte (OP) will give the option
code.

2

C

Alignments

EN 81LC7.2E LA 8.

Sets 12NC Sets Type Panel Type

LC07_EU_DTV_LCD_UK (/05) Group 1 Group 2

LPL : LC260WX2-SLB2 045

867000025135 26PFL5522D/05

867000025134 32PFL5522D/05

867000025148 37PFL5522D/05

867000025147 42PFL5522D/05

867000025293 47PFL5522D/05 LPL : LC470WU4-SLA2 081

LC07_EU_DTV Pan Europe (/12)

867000026844 26PFL5522D/12

CMO : V260B1-L03 068

AUO : T260XW03 V1 067

LPL : LC320W01-SL06 046

AUO : T315XW02 VD 091

CMO : V315B1-L05 069

LPL : LC370WX1-SLB1 071

AUO : T370XW02 V5 072

LPL : LC420WX3-SLA1 073

AUO : T420XW01 V8 076

LPL : LC420WX5-SLD1 107

LPL : LC260WX2-SLB2 045

CMO : V260B1-L03 068

AUO : T260XW03 V1 067

Panel
Code
(Dec)

Option Byte

1 2 3 4 5 6 7

019 023 010 223 009 002

000

001

002

000

LPL : LC320W01-SL06 046

867000026848 32PFL5522D/12

867000026866 37PFL5522D/12

867000026966 42PFL5522D/12

- 47PFL7632D/12 LPL : LC470WU4-SLA2 081

LC07_EU_DTV_LCD_Entry +_UK (/05)

867000025145 26PFL7532D/05

LC07_EU_DTV_LCD_Entry +_Pan Europe (/12)

867000026846 26PFL7532D/12

LC07_EU_DTV_PDP_UK (/05)
867000025288 42PFP5532D/05

867000025289 50PFP5532D/05
LC07_EU_DTV_PDP_Pan Europe

(/12)
867000026881 42PFP5532D/12

867000026885 50PFP5532D/12

AUO : T315XW02 VD 091

CMO : V315B1-L05 069

LPL : LC370WX1-SLB1 071

AUO : T370XW02 V5 072

LPL : LC420WX3-SLA1 073

AUO : T420XW01 V8 076

LPL : LC420WX5-SLD1 107

LPL : LC260WX2-SLB2 045

CMO : V260B1-L03 068

AUO : T260XW03 V1 067

LPL : LC260WX2-SLB2 045

CMO : V260B1-L03 068

AUO : T260XW03 V1 067

SDI : 42 HD W2 083

LG : 42 HD X4 084

SDI : 50 HD W2 085

LG : 50 HD X4 086

SDI : 42 HD W2 083

LG : 42 HD X4 084

SDI : 50 HD W2 085

LG : 50 HD X4 086

001

019 023 010 223 009 002

002

019 023 010 223 009 002 000

019 023 010 223 009 002 000

019 007 011 223 009 002 003

019 007 011 223 009 002 003

G_16860_079.eps

020207

Figure 8-1 Option codes OP1...OP7 (for all LC7.2E models)

EN 82 LC7.2E LA8.

Alignments

Option Bit Overview

Below find an overview of the Option Codes on bit level.

Table 8-3 Option codes at bit level (OP1-OP4)

Option Byte & Bit Dec. Value Option Name Description
Byte OP1

Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 CHINA ON = SW is for CHINA only

Bit 5 32 DTV_CHINA ON = DTV_CHINA will be ava ilable (Reserved)

Bit 4 16 DTV_EU ON = DTV will be available

Bit 3 8 UK_PNP ON = UK PNP is available

Bit 2 4 VIRGIN_MODE ON = Virgin Mode (PNP) is available

Bit 1 2 ACI ON = ACI is available

Bit 0 (LSB) 1 ATS ON = ATS is available

Total DEC Value

Byte OP2

Bit 7 (MSB) 128 1080P ON = 1080p is available

Bit 6 64 LIGHT_SENSOR ON = Light Sensor is available

Bit 5 32 AMBILIGHT ON = Ambilight Feature will be available

Bit 4 16 BACKLIGHT_DIMMING ON = Backlight Dimming is available

Bit 3 8 HUE ON = Hue is available

Bit 2 4 2D3DCF ON = 3D Comb Filter is available

Bit 1 2 WSSB ON = WSS is available

Bit 0 (LSB) 1 WIDE_SCREEN ON = TV is 16x9 set

Total DEC Value

Byte OP3

Bit 7 (MSB) 128 CVI2 ON=CVI1 (YPbPr)

Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 VCHIP ON = VChip is available

Bit 3 8 VIDEO_TEXT ON = Video-TXT is available

Bit 2 4 STEREO_DBX ON = Stereo DBX detection is available (LATAM)

Bit 1 2 STEREO_NICAM_2CS ON = Stereo NICAM 2CS detection is available (EU/AP/China)

Bit 0 (LSB) 1 LIP_SY NC ON = Lip Sync is available

Total DEC Value

Byte OP4

Bit 7 (MSB) 128 HDMI2 ON = HDMI2 is available

Bit 6 64 HDMI1 ON = HDMI1 is available

Bit 5 32 VGA ON = VGA is available

Bit 4 16 SVHS3 ON = SVHS3 is available

Bit 3 8 AV3 ON = AV3 is available

Bit 2 4 CVI ON = CVI is available

Bit 1 2 SVHS2 ON = SVHS2 is available

Bit 0 (LSB) 1 AV2 ON = AV2 is available

Total DEC Value

OFF = SW is for Non-China AP cluster

OFF = DTV_CHINA will not be available

OFF = DTV will not be available

OFF = UK PNP is not available

OFF = Virgin Mode (PNP) is not available

OFF = ACI is not available

OFF = ATS is not available

OFF = 1080p is not available

OFF = Light Sensor is not available

OFF = Ambilight Feature will not be available

OFF = Backlight Dimming is not available

OFF = Hue is not available

OFF = 2D Comb Filter is available

OFF = WSS is not available

OFF = TV is 4x3 set

(For ROW)

OFF = VChip is not available

OFF = Video-TXT is not available

OFF = Stereo DBX detection is not available

OFF = Stereo NICAM 2CS detection is not available

OFF = Lip Sync is not available

OFF = HDMI2 is not available

OFF = HDMI1 is not available

OFF = VGA is not available

OFF = SVHS3 is not available

OFF = AV3 is not available

OFF = CVI is not available

OFF = SVHS2 is not available

OFF = AV2 is not available

Alignments

Table 8-4 Option codes at bit level (OP5-OP7)

Option Byte & Bit Dec. Value Option Name Description
Byte OP5

Bit 7 (MSB) 128 NVM_CHECK ON = NVM (range) checking is available

Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 MP_ALIGN ON = Using multi-point alignment for Gamma & White Point

Bit 3 8 SYS_RECVRY ON = System Recovery is available

Bit 2 4 SL_WIRED ON = BDS Smart Loader Wired is available

Bit 1 2 HOTEL ON = Hotel/BDS is available

Bit 0 (LSB) 1 SS_DEMO ON = Split Screen Demo is available

Total DEC Value

Byte OP6

Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 Reserved Not Used (Reserved)
Bit 3 8 TUNER PROFILE 0 = ATV_EU_PHILIPS UV1318S/AIH-3
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1

Total DEC Value

Byte OP7

Bit 7 (MSB) 128 Reserved Not Used (Reserved)
Bit 6 64 Reserved Not Used (Reserved)
Bit 5 32 Reserved Not Used (Reserved)
Bit 4 16 CABINET PROFILE 0 = Cabinet_Profile_26_LCD_ME7
Bit 3 8
Bit 2 4
Bit 1 2
Bit 0 (LSB) 1
Total DEC Value

OFF = NVM (range) checking is not available

OFF = Using old way for Gamma (pre-defined) & WP alignment

OFF = System Recovery is not available

OFF = BDS Smart Loader Wired is not available

OFF = Hotel/BDS is not available

OFF = Split Screen is not available

1 = ATV_EU_Panasonic EN57K28G3F
2 = DTV_EU_PHILIPS TD1316AF/IHP-2
4 = ATV_AP_PHILIPS UV1316E/AIH-4
5 = ATV_AP_Tuner2 (Reserved)
6 = ATV_CHINA_ALPS TEDE9-286B
7 = ATV_CHINA_Tuner2 (Reserved)
8 = ATV_LATAM_PHILIPS UV1338/AIH-4
9 = ATV_LATAM_Tuner2 (Reserved)
10 = DTV_CHINA_Tuner1 (Reserved)
11 = DTV_CHINA_Tuner2 (Reserved)
12 = Not Used (Reserved)
13 = Not Used (Reserved)
14 = Not Used (Reserved)
15 = Not Used (Reserved)

1 = Cabinet_Profile_32_LCD_ME7
2 = Cabinet_Profile_37_42_47_LCD_ME7
3 = Cabinet_Profile_42_50_PDP_ME7
4 = Cabinet_Profile_26_LCD_ME5P
5 - 32 = Reserved

EN 83LC7.2E LA 8.

EN 84 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

Index of this chapter:

9.1 Introduction

9.2 LCD Power Supply

9.3 DC/DC converters

9.4 Front-End

9.5 DVB-T Signal Processing

9.6 Video Processing

9.7 Memory addressing

9.9 Audio Processing

9.10 HDMI

9.11 Abbreviation List

9.12 IC Data Sheets

Notes:

•Only new circuits (circuits that are not published recently)
are described.

• Figures can deviate slightly from the actual situation, due
to different set executions.

• For a good understanding of the following circuit
descriptions, please use the Wiring, Block (chapter 6) and
Circuit Diagrams (chapter 7). Where necessary, you will
find a separate drawing for clarification.

9.1.1 SSB Cell Layout

Description of the functional blocks (top side):

• In the middle, there is the Trident video processor.

• Above it, there is the Reneas micro processor.

• At the right hand top, there is the audio class D amplifier.

• The left part of the SSB contains the digital reception
circuit. In the LC4.x, this was a separate module, here it is
integrated on the SSB (same MOJO chipset).

• Between the digital reception part and the Trident part,
there is the DC/DC conversion circuit.

9.1 Introduction

The LC7.x (development name “LC07”) is a new global chassis
for the year 2007 (LC7.1 is the analogue range, LC7.2 is the
digital range). It is the successor of the LC4.x chassis, and
covers a screen size of 26 to 47 inch for LCD and 42 to 50 inch
for Plasma sets with a new styling called “ME7”. Some key
components are:

• Audio: Sound processing is performed by a multi-standard
sound processor MSP4450 (item 7411)

• Video: Video processing is performed by the Trident video
processor SVP CV32-LF (item 7202).

For analogue reception, a standard IF demodulator is used,
whereas digital input signals (DVB-T) are processed through a
COFDM channel decoder together with an MPEG decoder
(integrated on the SSB). A so-called “Reneas” microprocessor
performs the control functionality.

Important features of this chassis are:

• AmbiLight: LED AmbiLight (where applicable) is
introduced as the successor of glass-tube AmbiLight

• 1080p Full HD (where applicable).

MOJO

FLASH

MEM

COMMON INTERFACE

PCMCIA

CONTROLLER

DC-DC CONVERSION

SDRAM

HYBRID TUNER

IF DEM

VIF SAW
SIF SAW

RENEAS

uP

TRIDENT

VIDEO
PROC.

HDMI

AUDIO CLASS D

G_16860_048.eps

310107

Figure 9-1 SSB top view

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 85LC7.2E LA 9.

Description of the functional blocks (bottom side):

• The “Flash Mem” chip contains the software of the TV.

• The “Micronas” is the audio demodulator/processor.

• The two SDRAM’s are used for the video processing.

• The right part of the SSB contains the digital reception
circuit. This side contains the channel decoder.

• There are two connectors for ComPair:
– One on the other side of the tuner for I2C

communication with the Reneas micro processor.

– The other one at the digital reception part, for UART

communication with the MOJO.

AUDIO CLASS D

MEM

FLASH

MICRONAS

AUDIO PROC.

SDRAM

DC-DC CONVERSION

SDRAM

9.2 LCD Power Supply

The Power Supply Unit (PSU) in this chassis is a buy-in and is
a black-box for Service. When defective, a new panel must be
ordered and the defective panel must be returned for repair,
unless the main fuse of the unit is broken. Always replace the
fuse with one of the correct specifications! This part is
commonly available in the regular market.

Three different PSU can be used in this chassis:

• 26 and 32” sets use a “Delta” PSU

• 37 and 42” sets use a “PPS” (Philips Power Solutions) PSU

• 47” sets use a “Delta” PSU.

Figure “Overview of PSU connectivity” shows the connectivity
of the Power Supply Unit with the other panels in the set.

Figure 9-2 SSB bottom view

All Power Supply Units deliver the following voltages to the
chassis:

• +24 V to the inverters

• +12 V to SSB

• +12 V and -12 V to Audio Supply

• 12 V to Bolt-on Supply (where applicable)

• +5.2 V Standby voltage.

COMMON INTERFACE

CHANNEL

DECODER

G_16860_049.eps

310107

Figure 9-3 Overview of PSU connectivity

G_16860_051.eps

310107

EN 86 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.3 DC/DC converters

A switch generates the +5.2 V (+5V_SW) from the +5.2 V
(+5V_STANDBY) supply voltage. For LCD sets, this switch is
mounted on-board the SSB. For PDP sets, this switch is
mounted on the Power Supply Panel. This results in the
+5V_STANDBY (and +5V_SW for PDP sets) voltage(s),
coming from the Power Supply Unit, is (are) used as input for
the on-board DC/DC converters.
They deliver the following voltages to the board:

• +3.3 V (+3V3_STBY)

• +5.2 V (+5V_SW) (only for LCD sets)

• +1.8 V (+1V8S_SW)

• +34 V (+VTUN)

• +3.3 V (+3V3_SW)

• +3.3 V (+3V3_MOJO)

• +1.2 V (+1V2_MOJO)

An overview can be found in figure “DC-DC converter block
diagram”.

Video

4MHz

Tuner

Supply
+5V/+33V

IF AGC

Digital IF

36.16MHz

SAW filter

Audio

SAW filter

RFAGC

I2C

IF Demodulator

Switch IC

Figure 9-5 Tuner IF diagram

While receiving analogue signals, the signal coming from the
tuner is fed to the IF demodulator (through the SAW filters) and
then passed to the Trident Video Processor.
While receiving digital signals, the signal coming from the tuner
is fed to the channel decoder, to the MPEG decoder and then
to the Trident Video Processor.

9.4.1 Video IF Amplifier

The IF-filter is integrated in a SAW (Surface Acoustic Wave)
filter. One for filtering IF-video (item 1102) and one for IF-audio
(item 1103). The type of these filters depends on the standard
to be received (region-dependency). Some filters can be
switched to another standard, what makes them suitable for
applications in multi-standard platforms. An overview of the
SAW filter diversity can be found in table “SAW filter diversity”.

RF AGC_analogue

CVBS

2ndSIF

RF AGC_digital

I2C_analogue

I2C_digital

G_16860_054.eps

020207

Figure 9-4 DC-DC converter block diagram

The +5 V switch, needed for the switch voltages, is for LCD
sets physically mounted on the SSB, whereas for the PDP sets
it is physically mounted on the PSU board.

9.4 Front-End

This chassis uses different tuners depending on the region. An
overview of region-dependency can be found in table “Tuner
diversity”.

Table 9-1 Tuner diversity

Region Tuner Type

Europe TD1316AF Hybrid

UV1318S analogue
AP UV1316E analogue
China TEDE9 analogue
Latam UV1338 analogue

The TD1316AF hybrid tuner used, is capable of receiving both
analogue and digital (DVB-T) signals. For the application in this
chassis see figure “Tuner IF diagram”.

G_16860_063.eps

310107

Table 9-2 SAW filter diversity

SAW filter Switching Y/N Region Video/Audio

OFWK3953M No Europe Video
OFWK9656M Yes Europe Audio
OFWK7265L Yes AP Video
OFWK9361L No AP Sound
OFWK3956L No China Video
OFWK3955L No China Video
OFWK9352L No China Audio
OFWM1967L No LATAM Video/Audio

Switching is done by the microcontroller via SAW_SW. In table
“SAW filter switching” is explained how to address the different
system standards.

Table 9-3 SAW filter switching

Region SAW_SW System

Europe 1 L’

0 other systems

AP 1 B/G, D/K, I

0M/N

China 1 B/G, D/K, I

0M/N

LATAM n.a. M/N

The hybrid tuner TDA1316AF, used in Europe sets, needs to
be switched between digital and analogue mode. This is done
by the microcontroller via DVB_SW. Refer to table “Hybrid
tuner digital/analogue switching” for details.

Table 9-4 Hybrid tuner digital/analogue switching

Region DVB_SW Mode

Europe 1 analogue reception

0 Digital reception

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 87LC7.2E LA 9.

The pin assignment of all analogue tuners is equal and can be
found in table “Pin assignment analogue tuners”.

Table 9-5 Pin assignment analogue tuners

Pin number Description DC voltage (V)

1 RF AGC voltage 3.3 - 4.5 (weak or no signal)

< 3.3 (strong signal)
2n.c.
3I

2

C-bus address select 0
4 SCL 0 to 3.3
5 SDA 0 to 3.3
6n.c.
7 supply voltage 5 ±0.25
8n.c.
9 tuning supply voltage 33
10 n.c.
11 TV IF output

The pin assignment of the hybrid tuner can be found in table
“Pin assignment hybrid tuner”.

Table 9-6 Pin assignment hybrid tuner

Pin number Description DC voltage (V)

1n.c.
2 RF AGC voltage 3.3 - 4.5 (weak or no signal)

2

3I

C-bus address select 0
4 SCL 0 to 3.3
5 SDA 0 to 3.3
6 4 MHz reference output
7 supply voltage 5 ±0.25
8 broadband IF output
9 IF AGC voltage 0 to 3
10 narrowband IF output
11 narrowband IF output

< 3.3 (strong signal)

9.5 DVB-T Signal Processing

The DVB-T cell on the SSB is built around the “MOJO” MPEG
decoder PNX8314HS (item 7G00) and receives the signal from
the COFDM Channel Decoder TDA10046 (item 7F01). The
(hybrid) tuner TD1316AF (item 1101) supports digital (DVB-T)
reception and transports the signal via the VIM_IBO and
VIP_IBO lines. The digital data stream exits the DVB-T cell
when it is fed to the Trident SVP CX32 Video Processor (item

7202). A Common Interface (CI) slot allows reception of
encoded signals when used with a Conditional Access Module
(CAM) in combination with a smart card. See figure “Block
diagram DVB-T reception” for details.

1V2_MOJO
1V8S_SW
3V3_MOJO

4MHz CLK

CI SLOT

(STV0700)

TXD0
RXD0

UART

RF_AGC_IBO

IF_AGC_IBO

TDA10046

VIP_IBO

Channel
Decoder

VIM_IBO

TDA_SDA
TDA_SCL

C_LOCAL SCL

C_LOCAL SDA

RESET_STV

RESET_FE_n

MOJO

2

2

I

I

IBO_R,G,B

LPF

IBO_CVBS

IBO_I2C_SD

IBO_I2C_SCL

IBO_IRQ
RESET_n

FLASH

SDRAM

I2S (SD, WS, SCLK)

LC07 EU DVB Cell

HYBRID

TUNER

Processor

Multi

Sound

SDA

SCL

MUX

TRIDENT/uP

DVB_SW

I2C_SDA

I2C_SCL

SCART 2

G_16860_057.eps

310107

9.4.2 Automatic Gain Control

During analogue reception, the hybrid tuner receives an
external AGC voltage, coming from the demodulator to perform
automatic gain control. During digital reception, no external
AGC voltage is used but the tuners internal AGC loop is used.

Figure 9-6 Block diagram DVB-T reception

9.5.1 Common Interface (CI)

Introduction

The digital sets of this chassis are provided with a special slot
called Common Interface (CI). Together with a Conditional
Access Module (CAM) and a smart card, it is possible to
receive scrambled TV programs. This means that it is not
necessary to have a separate Set Top Box to receive digital
cable SDTV and HDTV programs (however this still is
possible).
The removable smart card, distributed by cable companies,
allows you to tune digital and high definition scrambled or
encrypted cable channels through the cable antenna. The
smart card is also required to receive premium digital TV
channels and services (where available) through the cable. A
smart card functionality includes conditional access and copy
protection.

Implementation

1. The receiver receives the digital data stream.

2. The data flows into the Conditional Access Module, which
contains the content provider's unscrambling algorithms.

3. This module verifies the existence of a smart card that
contains the subscriber's authorization code.

4. If the authorization code is accepted, the CAM
unscrambles the data and returns the data to the receiver
(if the code is not accepted, the data remains scrambled,
restricting access).

5. The receiver then decodes the data and outputs it for
viewing.

EN 88 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.5.2 Supply

The internal voltages that are used are:

• 5 V (+5V_SW)

• 3.3 V (+3V3_MOJO)

• 1.2 V (+1V2_MOJO)

• 1.8 V (+1V8S_SW).

During start-up, it is important that the +1V8S_SW line comes
up earlier than the +3V3_MOJO line. In order to implement this,
a delay circuit is added which is shown in figure “Delay
circuitry”.

Figure 9-7 Delay circuitry

Item 7J05 switches the MOSFET “on” and “off” (item 7J04).
The diode (item 6J03) performs a short-circuit protection for the
+3V3 output stage.

9.6 Video Processing

The video processing is completely handled by the Trident SVP
CX32 video processor which features:

• CVBS-input for analogue signals.

• RGB-input for digital (DVB-T) signals.

• Motion and “edge-adaptive” de-interlacing.

• Integrated ADC.

• Built-in 8-bit LVDS transmitter.

• Colour stretch.

• Skin colour enhancement.

• 3D Digital Comb Video Decoder.

• Interlaced and Progressive Scan refresh.

• TeleText decoding.

• OSD and VBI/Closed Caption.

9.6.1 Video Application

Analo g u e

CVBS_R F

SC2_C_IN

HD_Y_IN

IBO _ R _ IN
IBO _ G _ IN
IBO _ B _I N

IBO _ C V B S _IN

CVBS1
PR_R2

Y_G2
PB_B2
PB_B3
FB1

CVBS_O UT1

PR_R3
FS2

Y_G3

C

Trident

Video Processor

SVP CX32

Y_G1
PB_B1

CVBS_O UT2

PR_R1
PC_R

PC_G
PC_B
FS1

G_16860_060.eps

SCART1

SCART2

SIDE AV

On bo a rd E X T 3

EXT4

HDMI2

HDMI1

Front End

SC1_R_IN
SC1_G_IN
SC1_B_IN

SC1_CVBS_IN

SC1_FBL_IN

SC2_Y_C VBS _IN

FRONT_Y_CVB S_IN_T

FRONT_C_IN_T

HD_PB_IN

HD_PR_IN

DigDŽ Front End

(DVB-T
demodu la to r
and decoder)

HDMI

Decoder

HDMI_Y(0:7)
HDMI_Cb(0 :7 )
HDMI_Cr(0:7)

CVBS

CVBS

150307

G_16860_058.eps

310107

SCART 1 Mon. out

SCART 2 Mon. out

“Block diagram video processing” shows the input and output
signals to and from the Trident Video Processor in EU
applications.

During analogue reception, a CVBS signal coming from the
analogue front-end is fed to the video processor via pin
CVBS1. During digital reception, the video signal coming from
the MPEG decoder (MOJO) is fed to the video processor via
pins FS1, PC_B, PC_G and PC_R.

The video processor also interfaces the SCART1 & 2 input,
side AV, EXT4 (HD where applicable) and HDMI1 & 2 input.
Through the SCART1 & 2 connectors, a monitor output is
foreseen.

9.7 Memory addressing

Figure “Memory block diagram” shows the interconnection
between the microprocessor, the FLASH memory, the Trident
Video Processor and the SDRAM.

7311

Reneas

micro-

processor

CS/WR/RD

7202

Trident C X

Control signals CPU_RST, WR, RD and CE, address lines
A[0:19] and data lines D[0:7] are used for transferring data
between the microprocessor (item 7311) and the flash memory
(item 7310). Control signals CS, WR and RD, address lines
A[0:7] and data lines D[0:7] are used for transferring data
between the Trident Video Processor (item 7202) and the
microprocessor (item 7311). Control signals CX_BA0,
CX_BA1, CX_MCLK, CX_CLKE, CX_CS0, CX_RAS, CX_CAS
and CX_WE, address lines CX_MA[0:11] and data lines
DQ[0:15] are used for transferring data between the Trident
Video Processor and the SDRAM ICs (items 7204 and 7205).

CPU_RST/WR/RD/CE

A[0:19]

D[0:7]

A[0:7]

D[0:7]

CX_BA0/BA1/MCLK/

CLKE/CS0/RAS/CAS/WE

CX_MA[0:11]

DQ[0:15]

CX_BA0/BA1/MCLK/

CLKE/CS0/RAS/CAS/WE

CX_MA[0:11]

DQ[16:31]

Figure 9-9 Memory block diagram

7310

1MB

Flash Memory

7204

8MB

SDRAM

7205

8MB

SDRAM

G_16860_062
220207

Figure 9-8 Block diagram video processing

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 89LC7.2E LA 9.

9.8 1080p Panel (if present)

In the LC7.x chassis with 1080p full-HD LCD panel (e.g. the
42PFL7662D), an extra module called “1080p panel” is
needed, because the main video processor supports only
“single LVDS”, while the full HD LCD panel requires “dual
LVDS”.
On this panel, a “Genesis” scaler IC performs the processing.
The input is a “single LVDS” signal from the Trident video
processor, while the output is a “dual LVDS” signal for the HD
display.
Communication is done via I2C, and controlled by the Reneas
microprocessor on the SSB.

PSU

TRIDENT

CX32

Some features of the board are:

• Single LBVDS input, dual LVDS output.

• LVDS output enable/disable.

• Hue, saturation, and flesh tone adjustment (= skin tone).

• Brightness and contrast adjustment.

• Motion adaptive de-interlacer (in 1080i).

• Supported SD formats:
– HDMI and YPbPr: 480i&p, 576i&p (50 and 60 Hz).

• Supported HD 720p formats:
– HDMI and YPbPr: 720p (50 and 60 Hz).

• Supported HD 1080i formats:
– HDMI: 1080i (50 and 60 Hz).
– YPbPr: 1080i (50, 59.94, and 60 Hz).

• Supported HD 1080p formats:
– HDMI and YPbPr: 1080p (25 and 30 Hz).

• Upgradable software (via UART). Please refer to chapter 5
and/or ComPair.

12V BOLT-ON

DC-DC

8

RENESIS

M16C

SINGLE LVDS

2

C

I

RESET

REGU

LATOR

THINE

LVDS RX

32kb
NVM

LCD_PWR_ON; BL ON/OFF

BL DIMMING (PWM)

4x32Mb

RBG 24BIT

Figure 9-10 1080p block diagram

DDR

GENESIS

512kB
FLASH

1601

GM

DUAL LVDS

1080p

LCD PANEL

G_16860_093.eps

160307

9.9 Audio Processing

The audio decoding is done entirely via the Multistandard
Sound Processor (MSP) 4450P (item 7411).
This processor covers the processing of both analogue and
(NICAM) digital input signals by processing the (analogue) IF
signal-in to processed (analogue) AF-out (baseband audio). An
internal 40 ms (stereo) audio delay line (LIP SYNC) is foreseen
and therefore no external delay line is necessary.

All internal clock signals are derived from an external

18.432 MHz oscillator, which, in NICAM or I
turn is locked to the corresponding source.

The following functionality is included:

• Automatic Standard Detection (ASD) automatically detects
the actual broadcasted TV standard

• Automatic Sound Select (ASS) automatically switches
(without any I

2

C-bus action) between mono/stereo/

bilingual mode when the broadcast mode changes.

9.9.1 Audio Application

DAC

MSP 4450P

ANA_IN1+

I2S_DA_IN1
I2

S_WS

I2S_CL

SC1-IN
SC2-IN
SC3-IN

SC4-IN
SC5-IN

DACM

DACA

SC1-OUT

SC2-OUT

ANALOGUE
FRONT END

DVB / MOJO
(if present)

SCART 1 IN
SCART 2 IN

COMP IN
SIDE IN

HDMI IN

HDMI

2nd SIF

I2S1

AUDIO

IC

Figure 9-11 Block diagram audio processing - EU application

In EU applications, the MSP features:

• Sound IF input for signals coming from the analogue
front-end

2

• Three I

S-inputs for signals (“DATA”, “CLK” and “WS”)

coming from the MOJO in case of digital reception

• Five analogue inputs: for EXT1 to EXT4 and HDMI

• Loudspeaker output path

• Headphone output path

• SCART-1 output path (RF)

• SCART-2 output path (WYSIWYG = monitor).

Digital audio signals coming from HDMI sources are fed to a
digital-to-analogue converter and then fed to the MSP.
In case of reception of digital TV signals, digital audio signals
coming from the MOJO are directly fed to the MSP via the
I2S_DA_IN1, I2S_WS1 and I2S_CL1 lines. This ensures a
“true digital path”.

2

S-mode, on its

CLASS D
AMPLIFIER

LOUDSPEAKER

HP AMPLIFIER

SCART 1 OUT

SCART 2 OUT

G_16860_055.eps

090307

The microprocessor (item 7311) controls the audio part with the
following control lines:

• MUTEn: used to mute the Class D amplifiers

• ANTI_PLOP: used to detect any DC failure in the Class D
amplifiers

• DC_PROT: used to detect any DC failure in the Class D
amplifiers.

9.9.2 Audio Amplifier

The audio amplifier is an integrated class-D amplifier
(TDA8932T, item 7A01). It combines a good performance with
a high efficiency, resulting in a big reduction in heat generation.

EN 90 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

Principle

+V

-V

G_16860_080.eps

020207

Figure 9-12 Principle Class-D Amplifier

The Class D amplifier works by varying the duty cycle of a
Pulse Width Modulated (PWM) signal.
By comparing the input voltage to a triangle wave, the amplifier
increases duty cycle to increase output voltage, and decreases
duty cycle to decrease output voltage.
The output transistors of a Class D amplifier switch from 'full off'
to 'full on' (saturated) and then back again, spending very little
time in the linear region in between. Therefore, very little power
is lost to heat. If the transistors have a low 'on' resistance
(RDS(ON)), little voltage is dropped across them, further
reducing losses.
A Low Pass Filter at the output passes only the average of the
output wave, which is an amplified version of the input signal.
In order to keep the distortion low, negative feedback is
applied.

The advantage of Class D is increased efficiency (= less heat
dissipation). Class D amplifiers can drive the same output
power as a Class AB amplifier using less supply current.
The disadvantage is the large output filter. The main reason
for this filter is that the switching waveform results in maximum
current flow. This causes more loss in the load, which causes
lower efficiency. An LC filter with a cut-off frequency less than
the Class D switching frequency, allows the switching current
to flow through the filter instead of the load, thus reducing the
overall loss and increasing the efficiency.

9.10 HDMI

9.10.1 Introduction

Note: Text below is an excerpt from the ”HDMI Specification”

that is issued by the HDMI founders (see http://www.hdmi.org).

The High-Definition Multimedia Interface is developed for
transmitting digital signals from audiovisual sources to
television sets, projectors and other video displays.
HDMI can carry high quality multi-channel audio data and can
carry all standard and high-definition consumer electronics
video formats. Content protection technology is available.
HDMI can also carry control and status information in both
directions.

HDMI is backward compatible with DVI (1.0). Compared with
DVI, HDMI offers extra:

• YUV 4:4:4 (3 x 8-bit) or 4:2:2 (up to 2 x 12-bit), where DVI
offers only RGB 4:4:4 (3 x 8 bit).

• Digital audio in CD quality (16-bit, 32/44.1/48 kHz), higher
quality available (8 channels, 192 kHz).

• Remote control via CEC bus (Consumer Electronics
Control): allows user to control all HDMI devices with the
TV's remote control and menus.

• Smaller connector (SCART successor).

• Less cables: e.g. from 10 audio/9 video cables to 3 HDMI
cables.

9.10.2 Implementation

The IC used is the Sil 9025 (Silicon Image) third generation
HDMI receiver (item 7817 on the SSB) with following features:

• Dual HDMI input connector.

• Two EEPROMS to support EDID.

• HDMI audio.

2

S output to DACs which operating freq. of 32 to 192 kHz.

•I

• Integrated HDCP decryption engine.

• Built-in pre-programmed HDCP keys for copy protection.

• Colour space conversion RGB to YCbCr.

• “Hot Plug Reset” signal.

DC-protection

A DC-detection circuit is foreseen to protect the speakers. It is
built around three transistors (items 7A05 to 7A07) and
generates a protection signal (DC_PROT) to the
microprocessor in case of a DC failure in the Class D
amplifiers.

Hot plug

HDMI_HOTPLUG_RESET

Reset

HDMI 1

HDMI 2

COMP_AUDIO LR
for DVI audio input
only

EDID

EDID

DDC Reset

(Port 1)

HDMI
Receiver
Sil9025

(Port 2)

DDC_RESET

RST

I2C

Data Enable
HDMI CLK

24 bits YCbCr 4:4:4

H and V Sync

I2S

I2S DAC

Microprocessor

Trident

CX32

HDMI_Audio LR

Audio Processor

Micronas MSP4450P

G_16860_078.eps

010207

Figure 9-13 HDMI implementation

HDMI connectors 1 and 2 are connected to resp. ports 1 and 2
of the HDMI receiver. The ports cannot be activated at the
same moment. Switching is controlled by software.
“Hot Plug Reset” and “DDC Reset” are controlled by the
microprocessor.

The HDMI receiver will convert all RGB or YCbCr 4:2:2 signals
to 24-bit YCbCr 4:4:4. When it receives a YCbCr 4:4:4 signal it
will just pass the signal directly to the Trident Video Processor.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 91LC7.2E LA 9.

9.11 Abbreviation List

1080i 1080 visible lines, interlaced
1080p 1080 visible lines, progressive scan
2CS 2 Carrier Sound
2DNR Spatial (2D) Noise Reduction
3DNR Temporal (3D) Noise Reduction
480i 480 visible lines, interlaced
480p 480 visible lines, progressive scan
AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to
remove horizontal black bars; keeping
up the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels
directly from a cable network by

means of a predefined TXT page
ADC analogue to Digital Converter
AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency
AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box
AM Amplitude Modulation
AUO Acer Unipack Optronics
AP Asia Pacific
AR Aspect Ratio: 4 by 3 or 16 by 9
ASD Automatic Standard Detection
AV Audio Video
B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz
BTSC Broadcast Television System

Committee
CAM Conditional Access Module
CBA Circuit Board Assembly (or PWB)
CEC Consumer Electronics Control bus;

remote control bus on HDMI

connections
CI Common Interface; E.g PCMCIA slot

for a CAM in a set top box
CL Constant Level: audio output to

connect with an external amplifier
CLUT Colour Look Up Table
ComPair Computer aided rePair
COFDM Coded Orthogonal Frequency Division

Multiplexing; A multiplexing technique

that distributes the data to be

transmitted over many carriers
CSM Customer Service Mode
CVBS Composite Video Blanking and

Synchronisation
CVBS-MON CVBS monitor signal
CVBS-TER-OUT CVBS terrestrial out
CVI Component Video Input
DAC Digital to analogue Converter
DBE Dynamic Bass Enhancement: extra

low frequency amplification
DDC Display Data Channel; is a part of the

"Plug and Play" feature
DFU Directions For Use: owner's manual
DNR Dynamic Noise Reduction
DRAM Dynamic RAM
DSP Digital Signal Processing
DST Dealer Service Tool: special

(European) remote control designed

for service technicians
DTS Digital Theatre Sound
DVB(T) Digital Video Broadcast; An MPEG2

based standard for transmitting digital

audio and video. T= Terrestrial
DVD Digital Versatile Disc
DVI Digital Visual Interface
DW Double Window

ED Enhanced Definition: 480p, 576p
EDID Extended Display Identification Data

EEPROM Electrically Erasable and

EU EUrope
EXT EXTernal (source), entering the set by

FBL Fast Blanking: DC signal

FBL-TXT Fast Blanking Teletext
FLASH FLASH memory
FM Field Memory / Frequency Modulation
FMR FM Radio
FRC Frame Rate Converter
FTV Flat TeleVision
H H_sync to the module
HD High Definition: 720p, 1080i, 1080p
HDCP High-bandwidth Digital Content

HDMI High Definition Multimedia Interface,

HP Head Phone
I Monochrome TV system. Sound

I2C Integrated IC bus
I2S Integrated IC Sound bus
IBO(Z) Intelligent Bolt On module. Z= Zapper;

IC Integrated Circuit
IF Intermediate Frequency
IR Infra Red
IRQ Interrupt ReQuest
Last Status The settings last chosen by the

LATAM
LC07 Philips chassis name for LCD TV 2007

LCD Liquid Crystal Display
LED Light Emitting Diode
L/L' Monochrome TV system. Sound

LPL LG Philips LCD
LS Loud Speaker
LVDS Low Voltage Differential Signalling,

M/N Monochrome TV system. Sound

MOSFET Metal Oxide Semiconductor Field

MPEG Motion Pictures Experts Group
MSP Multi-standard Sound Processor: ITT

MUTE MUTE Line
NAFTA North American Free Trade

NC Not Connected

(VESA standard)

Programmable Read Only Memory

SCART or by cinches (jacks)

accompanying RGB signals

Protection; A "key" encoded into the
HDMI/DVI signal that prevents video
data piracy. If a source is HDCP coded
and connected via HDMI/DVI without
the proper HDCP decoding, the
picture is put into a "snow vision"
mode or changed to a low resolution.
For normal content distribution, the
source and the display device must be
enabled for HDCP "software key"
decoding

digital audio and video interface

carrier distance is 6.0 MHz

module for DVB reception.

customer and read and stored in RAM
or in the NVM. They are called at start­up of the set to configure it according
the customers wishes
LATin AMerica

project

carrier distance is 6.5 MHz. L' is Band
I, L is all bands except for Band I

data transmission system for high
speed and low EMI communication.

carrier distance is 4.5 MHz

Effect Transistor

sound decoder

Association: Trade agreement
between Canada, USA and Mexico

EN 92 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

NICAM Near Instantaneous Compounded

Audio Multiplexing. This is a digital
sound system, used mainly in Europe.

NTSC National Television Standard

Committee. Colour system used
mainly in North America and Japan.
Colour carrier NTSC M/N = 3.579545
MHz, NTSC 4.43 = 4.433619 MHz
(this is a VCR norm, it is not
transmitted off-air)

NVM Non Volatile Memory: IC containing

TV related data (for example, options)
O/C Open Circuit
ON/OFF LED On/Off control signal for the LED
OAD Over the Air Download
OSD On Screen Display
PAL Phase Alternating Line. Colour system

used mainly in Western Europe

(colour carrier = 4.433619 MHz) and

South America (colour carrier PAL M =

3.575612 MHz and PAL N = 3.582056

MHz)
PC Personal Computer
PCB Printed Circuit Board (or PWB)
PDP Plasma Display Panel
PIG Picture In Graphic
PIP Picture In Picture
PLL Phase Locked Loop. Used, for

example, in FST tuning systems. The

customer can directly provide the

desired frequency
PSU Power Supply Unit
PWB Printed Wiring Board (or PCB)
RAM Random Access Memory
RC Remote Control transmitter
RC5 (6) Remote Control system 5 (6), the

signal from the remote control receiver
RF Radio Frequency
RGB Red, Green, and Blue. The primary

colour signals for TV. By mixing levels

of R, G, and B, all colours (Y/C) are

reproduced.
RGBHV Red, Green, Blue, Horizontal sync,

and Vertical sync
ROM Read Only Memory
SAM Service Alignment Mode
SC SandCastle: two-level pulse derived

from sync signals
SC1-OUT SCART output of the MSP audio IC
SC2-OUT SCART output of the MSP audio IC
S/C Short Circuit
SCL Clock signal on I2C bus
SD Standard Definition: 480i, 576i
SDA Data signal on I2C bus
SDI Samsung Display Industry
SDM Service Default Mode
SDRAM Synchronous DRAM
SECAM SEequence Couleur Avec Memoire.

Colour system used mainly in France

and Eastern Europe. Colour carriers =

4.406250 MHz and 4.250000 MHz
SIF Sound Intermediate Frequency
SMPS Switch Mode Power Supply
SND SouND
SOPS Self Oscillating Power Supply
S/PDIF Sony Philips Digital InterFace
SRAM Static RAM
SSB Small Signal Board
STBY Stand-by
SVHS Super Video Home System
SW Sub Woofer / SoftWare / Switch
THD Total Harmonic Distortion
TXT TeleteXT
uP Microprocessor

VL Variable Level out: processed audio

output toward external amplifier
VCR Video Cassette Recorder
VGA Video Graphics Array
WD Watch Dog
WYSIWYR What You See Is What You Record:

record selection that follows main

picture and sound
XTAL Quartz crystal
YPbPr Component video (Y= Luminance, Pb/

Pr= Colour difference signals B-Y and

R-Y, other amplitudes w.r.t. to YUV)
Y/C Video related signals: Y consists of

luminance signal, blanking level and

sync; C consists of colour signal.
Y-OUT Luminance-signal
YUV Baseband component video (Y=

Luminance, U/V= Colour difference

signals)

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.12 IC Data Sheets

This section shows the internal block diagrams and pin layouts
of ICs that are drawn as "black boxes" in the electrical diagrams
(with the exception of "memory" and "logic" ICs).

9.12.1 Diagram B03B, Type TDA10046AHT(IC7F01), COFDM Channel Decoder

EN 93LC7.2E LA 9.

Block Diagram

ANALOG

VIM

VIP

SACLK

XIN

O

XOUT

SCL_TUN
SDA_TUN

SCL
SDA

SADDR(1:0)

GPIO(3:0)

S
C

A
D
C

Fsamp

PLL

spare inputs

Interface

ΔΣ

ΔΣ

I2C

AGC_TUN

Time

Recovery

ΔΣ

ΔΣ

Dual AGC

10

Carrier

Recovery

ACI

Filtering

DSP CORE

AGC_IF

DIGITAL FRONT-END

DEMODULATION

Digital

AGC

AND OFDM

FFT

2K/8K

Coarse

Time

Estimator

Dynamic

TimeShift

CHANNEL ESTIMATION

AND CORRECTION

OFDM Spectrum

CPE

calculation

Partial

Channel

Estimation

Time

Interpolation

Frequency

Interpolation

SYNCHRONISATION

ΔΣ

ΔΣ

Frequency, Time, Frame Recovery

FFT Window positioning

TPS decoding

Confidence
Calculation

Channel

Correction

MPEG-TS

(parallel)

MPEG-TS

(serial)

MPEG2

Output

Interface

Pin Configuration

Outer

Descrambler RS decoder Demapper

Forney

Deinterleaver

CPT_UNCOR

VBER

Viterbi

Decoder

CBER

Bit

Deinterleaver

CHANNEL DECODER

VDDI18

VSS

SACLK

XIN

VSSA_OSC

XOUT

VDDA18_PLL

VSS

GPIO[2]

GPIO[3]

2725232119 29

S_UNCOR

VDDA18_OSC

5155 53575961

VSS

S_DEN

S_PSYNC

49

S_OCLK

DO[7]

S_DO

DO[6]
VDDE33
DO[5]
VSS
DO[4]
DO[3]
VDDI18
DO[2]
VSS
DO[1]
DO[0]
OCLK
DEN
PSYNC

35 37 39 41 43 45

VDDE33

UNCOR

33 48

AGC_TUN

AGC_IF

SCL_TUN

SDA_TUN

VDDI18

CLR#
SADDR[1]
SADDR[0]

TEST

ENSERI

TRST

VDD18_PLL_ADC

VSSA_ADC

VDD33_ADC

64

1 16

31311975

SCL
VSS
SDA

VSS_PLL_ADC

VIM

VDDA33_ADC

VIP

TDA10046

TQFP 64

VSS 0 V

VSS
TMS

17 32

TDI

VDD 1.8 V
VDD 3.3 V

TCK

TDO

VDDI18

VDDE33

GPIO[0]

GPIO[1]

Confidence

Inner

Frequency

Deinterleaver

G_16860_044.eps

(I,Q)

300107

Figure 9-14 Internal block diagram and pin configuration

EN 94 LC7.2E LA9.

9.12.2 Diagram B03C, Type STV0700 (IC7K00), PCMCIA Controller

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

Block Diagram

Pin Configuration

H_16861_001.eps

060307

Figure 9-15 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.12.3 Diagram B03D, Type PNX8314HS (IC7G00), DVB-MOJO

EN 95LC7.2E LA 9.

Block Diagram

EJTAG, DSU

Priority int ctrl

Clock, Reset
Power down

I2C-unit1

I2C-unit2

GPIO

Infrared

Boot

USB host

RS232-UART0

RS232-UART1

ISO7816-UART

CPU PR1910

Fast PI-Bus@120 MHz

PI Bridge DMA

Slow PI-Bus (60 MHz)

MPEG system processor

Video decoder

Audio decoder

Background color

Display

Graphics (OSD)

Cursor

Mixer unit

DENC

Analog video
RGB, Y,C,CVBS

MIU

CCIR

CCIR-656

G_16860_043b.eps

16 bit@133 MHz

SDRAM interface

DVP L3DVP L2Bus

Central Data Unit

300107

Bus

Pin Configuration

TDI

208

TMS

1

TRST

2

TCK

3

RESETN

4

SYS_RESETN

5

SCL0

6

SDA0

7

SCL1

8

SDA1

9

VDDP

10

VSSP

11

PIO11 / CTS0

12

PIO12 / RTS0

13

PIO13 / RX0

14

PIO14 / TX0

PIO17 / RX1
PIO18 / TX1
TS_DATA[0]
TS_DATA[1]
TS_DATA[2]
TS_DATA[3]
TS_DATA[4]
TS_DATA[5]
TS_DATA[6]
TS_DATA[7]

TS_VAL

TS_STROBE

TS_SYNC

PIO0 / IR_IN

PIO1 / IR_OUT

PIO3 / VPP

PIO4 / C4
PIO5 / C8

SC0_DA

SC0_CMDVCC

SC0_RST
SC0_OFF

SC0_CCK

VDDC

VSSC
VDDP

VSSP

PIO6 / SC1_DA

MIU_BAA
MIU_CLK

MIU_DATA[15]

15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52

535455

MIU_DATA[7]

PIO15 / DCD0 / PLL_OUT

PIO16 / DTR0 / VCXO_CLOCK

PIO7 / SC1_CMDVCC

PIO8 / SC1_RST
PIO9 / SC1_OFF

PIO10 / SC1_CCK

TDO / DSU_TPC0

SCK_OUT

WS_OUT

SD_OUT

FSCLK

SPDIF

203

206

205

204

202

207

USB_DM

USB_DP

201

200

USB_OVRCUR

USB_PWR

PCST1[0]

198

199

197

PCST0[0]

PCST1[2]

PCST1[1]

196

195

194

RGB, Y,C,CVBS

PCST0[1]

VDDC

VDDP

VSSC

VSSP

193

192

191

190

189

DSU_TPC1

PCST0[2]

188

187

DSU_CLK

186

PIO27 / ITU_CLOCK

PIO2 / PWM / VS

185

184

PIO20 / ITU_OUT[1] / BOOT[1]

PIO21 / ITU_OUT[2] / BOOT[2]

PIO22 / ITU_OUT[3] / BOOT[3]

PIO25 / ITU_OUT[6]

PIO26 / ITU_OUT[7]

PIO23 / ITU_OUT[4]

PIO24 / ITU_OUT[5]

183

179

178

177

182

181

180

PIO19 / ITU_OUT[0] / BOOT[0]

176

AVDD_0

RSET

175

174

VREF

173

IDUMP_1

C / CVBS

Y / CVBS

172

171

pnx831x

(SQFP208 top view)

56

575859

606162

63

66

676869

707172

73

76

777879

808182

MIU_DATA[14]

64

65

MIU_DATA[9]

MIU_DATA[2]

MIU_DATA[10]

MIU_DATA[3]

MIU_DATA[11]

VSSP

VDDP

MIU_DATA[4]

MIU_DATA[12]

MIU_DATA[5]

MIU_DATA[13]

MIU_DATA[6]

MIU_DATA[1]

MIU_DATA[0]

MIU_DATA[8]

MIU_CS_N[2]

MIU_CS_N[3]

MIU_OE_N

74

75

MIU_ADDR[0]

MIU_CS_N[0]

MIU_CS_N[1]

VDDP

VSSP

VDDC

MIU_ADDR[3]

MIU_ADDR[2]

MIU_ADDR[1]

VSSC

MIU_ADDR[4]

83

8485868788899091929394

MIU_ADDR[11]

MIU_ADDR[10]

MIU_ADDR[9]

MIU_ADDR[8]

MIU_ADDR[7]

MIU_ADDR[6]

MIU_ADDR[5]

IDUMP_2

CVBS / Y

AVDD_1

R / C

166

167

168

169

170

95

VSSP

VDDP

MIU_ADDR[14]

MIU_ADDR[13]

MIU_ADDR[12]

AVDD_2

VDDP

VSSP

G / Y

B

161

162

163

164

165

100

96

979899

MIU_ADDR[19]

MIU_ADDR[18]

MIU_ADDR[17]

MIU_ADDR[16]

MIU_ADDR[15]

AVDD_PLL

XTAL_OUT

AVSS_PLL

XTAL_IN

157

158

159

160

156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
135
134
133
132
131
130
129
128
127
126
125
124
123
122
121
120
119
118
117
116
115
114
113
112
111
110
109
108
107
106
105

102

103

104

101

MIU_ADDR[23]

MIU_ADDR[22]

MIU_ADDR[21]

MIU_ADDR[20]

SDRAM_ADDR[3]
SDRAM_ADDR[2]
SDRAM_ADDR[1]
SDRAM_ADDR[0]
SDRAM_ADDR[10]
SDRAM_ADDR[14]
SDRAM_ADDR[13]
SDRAM_ADDR[4]
SDRAM_ADDR[5]
SDRAM_ADDR[6]
SDRAM_ADDR[7]
SDRAM_ADDR[8]
SDRAM_ADDR[9]
SDRAM_ADDR[11]
SDRAM_ADDR[12]
RAS
CAS
WE
DQM[0]
CKE
HSCKB
VSSC
VDDC
DQM[1]
SDRAM_DATA[8]
VSSP
VDDP
SDRAM_DATA[9]
SDRAM_DATA[10]
SDRAM_DATA[11]
SDRAM_DATA[12]
SDRAM_DATA[13]
SDRAM_DATA[14]
SDRAM_DATA[15]
SDRAM_DATA[7]
SDRAM_DATA[6]
VSSC
VDDC
SDRAM_DATA[5]
SDRAM_DATA[4]
SDRAM_DATA[3]
SDRAM_DATA[2]
SDRAM_DATA[1]
SDRAM_DATA[0]
VSSP
VDDP
MIU_LBA
MIU_RDY
MIU_WEN
MIU_MASK[1]
MIU_MASK[0]
MIU_ADDR[24]

G_16860_043p.eps

Figure 9-16 Internal block diagram and pin configuration

300107

EN 96 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.12.4 Diagram B04B, Type SVP CX32 (IC7202), Trident Video processor

Block Diagram

5 CVBS

2 Chroma

PC RGB x 1

(up to SXGA 60Hz)

Ypbpr x 2 (up to 1080i)

24bit Digital or 8/10 bit

CCIR656/601

Pin Configuration

TESTMODE

CVBS_OUT2
CVBS_OUT1

AVSS_OUTBUF

AVDD3_OUTBUF

AVDD3_BG_ASS

AVSS_BG_ASS

AVDD3_ADC1

VREFP_1
VREFN_1

AVSS_ADC1
AVDD_ADC1
AVDD_ADC4

AVSS_ADC4

VREFP_2
VREFN_2

AVDD_ADC2

AVSS_ADC2

AVDD_ADC3

AVSS_ADC3

AVDD3_AD2

AIN_HS

AIN_VS

VDDC

VSSC

CVBS1

FS2
FS1
FB2
FB1

Y_G1
Y_G2
Y_G3
PC_G

PR_R1
PR_R2
PR_R3

PC_R

PB_B1
PB_B2
PB_B3

PC_B
PDVDD
PDVSS
PAVDD

PAVSS

XTALO

XTALI

PAVSS1

MLF1

PAVDD1

157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191

C

192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208

Analog Mux

ADC

Din_portD
(24bit)

DQM0

MD0

MD1

154

155

156

1

r

PLF2

PAVSS2

PAVDD2

SDR

16/32

UMAC

Memory Control

3D Video
Decoder

ASS/DSS

Interface

8/16 bit

CPU bus

MD5

MD2

MD3

MD4

MD6

MD7

VSSM

147

148

149

150

151

152

153

B

R

G

VM

ADVDD33

AVSS33_2

AVSS33_1

VBI

Slicer

MCU

External

MCU

VDDM

MD8

MD9

144

145

146

IRSET

AVDD33

AVSS33_3

3D motion

Deinterlacer

Dynamic
Contrast

ICSC

GPIO I2C PWM

MD10

MD11

MD12

MD13

MD14

MD15

138

139

140

141

142

143

VSG

HSD

HSG

HFLB

DP_HS

FBLANK

Noise

Reduction

6th

Generation

Scaler

Sharpness

Control

OSD

Engine

GPIO

VSSM

VSSC

VDDC

135

136

137

I2C

VDDM

DQM1

WE#

CAS#

RAS#

CS0#

BA0

BA1

MA11

MA10

126

127

128

129

130

131

132

133

134

SVPTMCX32

.

DP23

DP22

DP21

DP20

DP19

DP17

VSSC

VDDC

DP_VS

DP_DE_FLD

DP18

VSSH

VDDH

CRTC

10bit Gama

LCD Over

Drive
CSC

Color

Management

MA0

MA1

MA2

122

123

124

125

DP14

DP15

DP16

DP13

PWM

MA3

121

CLKE

MCK

111

112

DP7

DP6

VSSM

DQM2

VDDM

108

109

110

DP5

DP4

DP3

DP2

LVDS Out

CVBS Out

MD16

MD17

MD18

105

106

107

104

MD19

103

MD20

102

MD21

101

MS22

100

MD23

99

VSSM

98

VDDM
VSSC

97
96

VDDC
MD24

95
94

MD25

93

MD26

92

MD27

91

MD28

90

MD29

89

MD30

88

MD31

87

DQM3

86

RESET

85

V5SF

84

ALE

83

A_D0

82

A_D1

81

A_D2

80

A_D3

79

A_D4

78

A_D5

77

A_D6

76

A_D7

75

VSSC

74

VDDC

73

VSSH

72

VDDH

71

ADDR7

70

ADDR6

69

ADDR5

68

ADDR4

67

ADDR3

66

ADDR2

65

ADDR1

64

ADDR0

63

RD#

62

WR#

61

CS

60

GPIO0

59

GPIO1

58

SDA

57

SCL

56

INTN

55

PWM0

54

VSSC

53

VDDC

5251504948474645444342414039383736353433323130292827262524232221201918171615141312111098765432

DP0

DP1

G_16860_042.eps

220207

8bit Single

LVDS Tx

CVBS_OUT

VSSC

VDDC

MA4

MA5

MA6

MA7

MA8

MA9

113

114

115

116

117

118

119

120

DP9

DP12

DP8

DP11

DP10

VSSC

VDDC

DP_CLK

Figure 9-17 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.12.5 Diagram B04C, Type MSP4450P (IC7411), Micronas Sound Processor

Block Diagram

EN 97LC7.2E LA 9.

Sound IF1

Sound IF2

I2S5

2

I

I2S2

2

I

I2S4

SCART1
SCART2
SCART3
SCART4

SCART5

Loud-

speaker

Sound

Processing

Headphone

Sound

Processing

DAC/
High-

Resolution

PWM

DAC

ADC

De-

modulator

Pre-

processing

internal /

external

Audio Delay

12

/

16

/

Source Select

S1

S3

2

I

S

I2S

I2S

(2..8-channel)

Prescale

L
R

SL
SR

Center
Subwoofer

Headphone

S/PDIF

2

I

S

Loudspeaker

Surround

SCART

DSP

Input

Select

Processing

ADC

Prescale

DAC

DAC

SCART
Output
Select

SCART1

SCART2

SCART3

Figure 9-18 Internal block diagram

G_16860_041.eps

300107

EN 98 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.12.6 Diagram B06C, Type SIL9025CTU(IC7817), HDMI Receiver

Block Diagram

Pin Configuration

G_16860_073.eps

300107

Figure 9-19 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.12.7 Diagram B06C, Type UDA1334ATS (IC7810), Audio DAC

Block Diagram

V

DDD

V

SSD

EN 99LC7.2E LA 9.

PLL0

1

BCK

2

WS

DATAI

3

UDA1334ATS

SYSCLK/PLL1

MUTE

DEEM/CLKOUT

VOUTL

6
8
9

14

Pin Configuration

4

DIGITAL INTERFACE PLL

DE-EMPHASIS

INTERPOLATION FILTER

NOISE SHAPER

DAC

13 12

V

DDA

V

15

SSA

5

DAC

10

V

ref(DAC)

7

SFOR1

11

SFOR0

16

VOUTR

BCK

WS

DATAI

V

DDD

V

SSD

1
2
3
4

UDA1334ATS

5
6
7
8

16
15
14
13
12
11
10

9

VOUTR
V

SSA

VOUTL
V

DDA

V

ref(DAC)

SFOR0SYSCLK/PLL1
PLL0SFOR1
DEEM/CLKOUTMUTE

Figure 9-20 Internal block diagram and pin configuration

G_16860_081.eps

220207

EN 100 LC7.2E LA9.

Circuit Descriptions, Abbreviation List, and IC Data Shee ts

9.12.8 Diagram B07, Type TDA8932T (IC7A01), Audio Amplifier

Block Diagram

2

IN1P

3

IN1N

IN2P

IN2N

DIAG

12

15

14

4

7

6

5

INREF

CGND

POWERUP

ENGAGE

OSCILLATOR

V

SSD

PROTECTIONS:

OVP, OCP, OTP,

UVP, TF, WP

MODE

PWM

MODULATOR

PWM

MODULATOR

MANAGER

VOICSOFERCSO

DDA

CTRL

CTRL

81301

DRIVER

HIGH

DRIVER

LOW

DRIVER

HIGH

DRIVER

LOW

STABILIZER 11 V

STABILIZER 11 V

REGULATOR 5 V

V

DDA

28

BOOT1

29

V

DDP1

27

OUT1

26

V

SSP1

21

BOOT2

20

V

DDP2

22

OUT2

23

V

SSP2

V

DDA

V

SSP1

V

DDA

V

SSP2

V

SSD

25

STAB1

24

STAB2

18

DREF

11

HVPREF

13

TEST

Pin Configuration

30

HVP1

V

TDA8932

9

V

SSA

V

V

SSD(HW)

V

V

OSCREF

V

SSD(HW)

1, 16, 17, 32

SSD(HW)

DDA
SSA

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16

TDA8932T

SSA

HALF SUPPLY VOLTAGE

32

V

SSD(HW)

31

OICSOP1NI

30

1PVHN1NI

29

VGAID

DDP1

28

1TOOBEGAGNE

27

1TUOPUREWOP

26

VDNGC

SSP1

25

STAB1

24

STAB2
V

23

SSP2

22

2TUOFERPVH

21

2TOOBFERNI

20

VTSET

DDP2

19

2PVHN2NI

18

FERDP2NI

17

V

SSD(HW)

19

HVP2

G_16860_045.eps

300107

Figure 9-21 Internal block diagram and pin configuration