Philips 40PFL7007T/12 Schematic

Colour Television Chassis

QFU1.1E

LA

Contents Page

1. Revision List 2

2. Technical Specs, Diversity, and Connections 2

3. Precautions, Notes, and Abbreviation List 5

4. Mechanical Instructions 9

5. Service Modes, Error Codes, and Fault Finding 20

6. Alignments 39

7. Circuit Descriptions 43

9. Block Diagrams Wiring diagram 7000 series 40" 55 Wiring diagram 8000 series 40" 56 Wiring diagram 7000 series 46" 58 Wiring diagram 8000 series 46" 59 Wiring diagram 7000 series 55" 62 Wiring diagram 8000 series 55" 63

10. Circuit Diagrams and PWB Layouts Drawing PWB B 310431365554 B 310431365664 125 177-178 E 272217190673 - 272217190698 Keyboard 179 J 272217190536 Sensor board 183 184 AL 310431365771 16 LED AmbiLight 203 AL 310431365781 15 LED AmbiLight 206 AL 310431365804 12 LED AmbiLight 209 AL 310431365813 10 LED AmbiLight 211 AL 310431365823 9 LED AmbiLight 214 AL 310431365833 7 LED AmbiLight 216

11. Styling Sheets 7000 series 40" 218 8000 series 40" 219 7000 series 46" 221 8000 series 46" 222 7000 series 55" 225 8000 series 55" 226

70 123-124

Published by ER/EL 1269 Quality Printed in the Netherlands Subject to modification EN 3122 785 19212

2012-Sep-14

2012 ©

TP Vision Netherlands B.V.

All rights reserved. Specifications are subject to change without notice. Trademarks are the property of Koninklijke Philips Electronics N.V. or their respective owners. TP Vision Netherlands B.V. reserves the right to change products at any time without being obliged to adjust earlier supplies accordingly. PHILIPS and the PHILIPS’ Shield Emblem are used under license from Koninklijke Phili ps Electronics N.V.

EN 2 QFU1.1E LA1.

1. Revision List

Manual xxxx xxx xxxx.0

• First release.

Revision List

• Chapter 5: added white tone alignment values; see section .

6.3.1

Manual xxxx xxx xxxx.1

• Chapter 4: added additional LVDS cable handling info; see section 4.3.2

.

Manual xxxx xxx xxxx.2

• Chapter 2: Table 2-1

2. Technical Specs, Diversity, and Connections

Index of this chapter:

2.1 Technical Specifications

2.2 Directions for Use

2.3 Connections

2.4 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

Table 2-1 Described Model Numbers and Diversity

2 4 7 9 10 11

Mechanics Descr. Block Diagrams Schematics Styling

2.1 Technical Specifications

For on-line product support please use the CTN links in Table

2-1. Here is product information available, as well as getting

started, user manuals, frequently asked questions and software & drivers.

updated (added CTNs).

CTN

40PFL7007H/12 2.3 4-1 4-2 4.3 7.2 9.1 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.1 40PFL7007K/12 2.3 4-1 4-2 4.3 7.2 9.1 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.1 40PFL7007T/12 2.3 4-1 4-2 4.3 7.2 9.1 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.1 40PFL8007K/12 2.3 4-1 4-3 4.3 7.2 9.2 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.2 40PFL8007T/12 2.3 4-1 4-3 4.3 7.2 9.2 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.2 42PFL6907H/12 2.3 4-4 4-5 4.3 7.2 9.3 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.4 11.3 42PFL6907K/12 2.3 4-4 4-5 4.3 7.2 9.3 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.4 11.3 42PFL6907T/12 2.3 4-4 4-5 4.3 7.2 9.3 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.4 11.3 46PFL7007H/12 2.3 4-6 4-7 4.3 7.2 9.4 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.4 46PFL7007K/12 2.3 4-6 4-7 4.3 7.2 9.4 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.4 46PFL7007T/12 2.3 4-6 4-7 4.3 7.2 9.4 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.4 46PFL8007K/12 2.3 4-6 4-8 4.3 7.2 9.5 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.5 46PFL8007T/12 2.3 4-6 4-8 4.3 7.2 9.5 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.5 46PFL9707S/12 2.3 4-9 4-10 4.3 7.2 9.7 9.11 9.12 9.13 9.14 9.15 - 10.2 10.7 10.4 11.6 46PFL9707T/12 2.3 4-9 4-10 4.3 7.2 9.7 9.11 9.12 9.13 9.14 9.15 - 10.2 10.7 10.4 11.6 47PFL6907H/12 2.3 4-11 4-12 4.3 7.2 9.7 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.4 11.7 47PFL6907K/12 2.3 4-11 4-12 4.3 7.2 9.7 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.4 11.7 47PFL6907T/12 2.3 4-11 4-12 4.3 7.2 9.7 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.4 11.7 55PFL7007H/12 2.3 4-13 4-14 4.3 7.2 9.8 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.8 55PFL7007K/12 2.3 4-13 4-14 4.3 7.2 9.8 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.8 55PFL7007T/12 2.3 4-13 4-14 4.3 7.2 9.8 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.8 55PFL8007K/12 2.3 4-13 4-15 4.3 7.2 9.9 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.9 55PFL8007T/12 2.3 4-13 4-15 4.3 7.2 9.9 9.11 9.12 9.13 9.14 9.15 - 10.1 10.7 10.3 11.9 60PFL9607S/12 2.3 4-16 4-17 4.3 7.2 9.10 9.11 9.12 9.13 9.14 9.15 - 10.2 10.7 10.4 11.10 60PFL9607T/12 2.3 4-16 4-17 4.3 7.2 9.10 9.11 9.12 9.13 9.14 9.15 - 10.2 10.7 10.4 11.10

Connection Overview

Wire Dressing

Wire Dressing rear cover

Assembly Removal

Power Supply

Wiring Diagram

Video

Audio

Control & Clock

I2C

Supply lines

Power Supply

SSB

2.2 Directions for Use

You can download this information from the following websites:

http://www.philips.com/support http://www.p4c.philips.com

J (Sensor Board)

E (Keyboard/Leading Edge)

Sheet

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2.3 Connections

REAR CONNECTORS

BOTTOM REAR CONNECTORS

SIDE CONNECTORS

HDMI 4

HDMI 5

DIGITAL

AUDIO OUT

(OPTICAL)

USB 3

USB 2

CI

NETWORK L/RY/Pb/Pr

SERV.U

AUDIO IN

DVI/VGA

VGA SCART 75

(RGB/CVBS)

USB 1 (1) (2) (3)

HDMI

TV ANTENNA

SATELLITE

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Technical Specs, Diversity, and Connections

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Note: The following connector colour abbreviations are used

(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy= Grey, Rd= Red, Wh= White, Ye= Yellow.

2.3.1 Connections

1 - RJ45: Ethernet

Figure 2-2 Ethernet connector

1 -TD+ Transmit signal k 2 -TD- Transmit signal k 3 -RD+ Receive signal j 4 -CT Centre Tap: DC level fixation 5 -CT Centre Tap: DC level fixation 6 -RD- Receive signal j 7 -GND Gnd H 8 -GND Gnd H

Figure 2-1 Connection overview (SATELLITE and HDMI5 are optional)

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2,4 - Cinch: Video YPbPr - In, Audio - In (via break-out cable)

Gn -Video Y 1 V Bu -Video Pb 0.7 V Rd - Video Pr 0.7 V Rd - Audio - R 0.5 V Wh -Audio - L 0.5 V

3 - Service Connector (UART)

1 -Ground Gnd H 2 -UART_TX Transmit k 3 -UART_RX Receive j

5 - Cinch: Audio - In (VGA/DVI)

Rd - Audio R 0.5 V Wh -Audio L 0.5 V

6 - VGA: Video RGB - In

Figure 2-3 VGA Connector

1 -Video Red 0.7 V

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 75 ohm jq

PP

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

/ 10 kohm jq

RMS

/ 75 ohm j

PP

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Technical Specs, Diversity, and Connections

2 -Video Green 0.7 VPP / 75 ohm j 3 -Video Blue 0.7 V

/ 75 ohm j

PP

4-n.c. 5 -Ground Gnd H 6 -Ground Red Gnd H 7 -Ground Green Gnd H 8 -Ground Blue Gnd H 9-+5V

+5 V j

DC

10 - Ground Sync Gnd H 11 - n.c. 12 - DDC_SDA DDC data j 13 - H-sync 0 - 5 V j 14 - V-sync 0 - 5 V j 15 - DDC_SCL DDC clock j

7 - Video RGB - In, CVBS - In/Out, Audio - In/Out (via breakout cable)

Figure 2-4 SCART connector

1 -Audio R 0.5 V 2 -Audio R 0.5 V 3 -Audio L 0.5 V 4 -Ground Audio Gnd H

/ 1 kohm k

RMS

/ 10 kohm j

RMS

/ 1 kohm k

RMS

5 -Ground Blue Gnd H 6 -Audio L 0.5 V 7 -Video Blue 0.7 V

/ 10 kohm j

RMS

/ 75 ohm jk

PP

8 -Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3 j 9 -Ground Green Gnd H 10 - n.c. 11 - Video Green 0.7 V

/ 75 ohm j

PP

12 - n.c. 13 - Ground Red Gnd H 14 - Ground P50 Gnd H 15 - Video Red 0.7 V 16 - Status/FBL 0 - 0.4 V: INT

/ 75 ohm j

PP

1 - 3 V: EXT / 75 ohm j 17 - Ground Video Gnd H 18 - Ground FBL Gnd H 19 - Video CVBS/Y 1 V 20 - Video CVBS 1 V 21 - Shield Gnd H

/ 75 ohm k

PP

/ 75 ohm j

PP

10 - USB2.0

Figure 2-5 USB (type A)

1-+5V k 2 -Data (-) jk 3 -Data (+) jk 4 -Ground Gnd H

11 - HDMI 1, 2, 3, 4, 5 (optional): Digital Video - In, Digital Audio with ARC - In/Out

Figure 2-6 HDMI (type A) connector

1 -D2+ Data channel j 2 -Shield Gnd H 3 -D2- Data channel j 4 -D1+ Data channel j 5 -Shield Gnd H 6 -D1- Data channel j 7 -D0+ Data channel j 8 -Shield Gnd H 9 -D0- Data channel j 10 - CLK+ Data channel j 11 - Shield Gnd H 12 - CLK- Data channel j 13 - Easylink/CEC Control channel jk 14 - ARC Audio Return Channel k 15 - DDC_SCL DDC clock j 16 - DDC_SDA DDC data jk 17 - Ground Gnd H 18 - +5V j 19 - HPD Hot Plug Detect j 20 - Ground Gnd H

12 - Head phone (Output)

Bk -Head phone 32 - 600 ohm / 10 mW ot

13 - Common Interface

68p- See Figure 10-1-48

B07D, Common interface jk

8 - Aerial - In

- -IEC-type (EU) Coax, 75 ohm D

9 - SAT - In (optional)

- -F-type Coax, 75 ohm D

2.4 Chassis Overview

Refer to chapter 9. Block Diagrams for PWB/CBA locations.

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14 - Cinch: S/PDIF - Out

Bk -Coaxial 0.4 - 0.6V

/ 75 ohm kq

PP

Precautions, Notes, and Abbreviation List

3. Precautions, Notes, and Abbreviation List

Index of this chapter:

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.4 Abbreviation List

3.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

1. Unplug the Mains/AC Power cord and connect a wire

between the two pins of the Mains/AC Power plug.

2. Set the Mains/AC Power switch to the “on” position

(keep the Mains/AC Power cord unplugged!).

3. Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 M and 12 M.

4. Switch “off” the set, and remove the wire between the

two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

3.2 Warnings

• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched “on”.

• When you align the set, use plastic rather than metal tools. This will prevent any short circuits and the danger of a circuit becoming unstable.

3.3 Notes

3.3.1 General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the Service Default Mode with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or 61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages with (D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation (G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

3.3.2 Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 k).

• Resistor values with no multiplier may be indicated with either an “E” or an “R” (e.g. 220E or 220R indicates 220 ).

• All capacitor values are given in micro-farads (10 nano-farads (n 10

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An “asterisk” (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed on the Philips Spare Parts Web Portal.

3.3.3 Spare Parts

For the latest spare part overview, consult your Philips Spare Part web portal.

3.3.4 BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this URL: http://www.atyourservice-magazine.com “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile. Where applicable and available, this profile is added to the IC Data Sheet information section in this manual.

3.3.5 Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able: – To reach a solder-tip temperature of at least 400°C. – To stabilize the adjusted temperature at the solder-tip. – To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around 360°C - 380°C is reached and stabilized at the solder joint. Heating time of the solder-joint should not exceed ~ 4 sec. Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed. To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

3.3.6 Alternative BOM identification

It should be noted that on the European Service website, “Alternative BOM” is referred to as “Design variant”.

The third digit in the serial number (example: AG2B0335000001) indicates the number of the alternative B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then

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-9

), or pico-farads (p 10

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-12

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Precautions, Notes, and Abbreviation List

result in sets which have the same CTN (Commercial Type Number; e.g. 28PW9515/12) but which have a different B.O.M. number. By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with. If the third digit of the serial number contains the number “1” (example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts! For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production centre (e.g. SN is Lysomice, RJ is Kobierzyce), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2010 week 10 / 2010 week 17). The 6 last digits contain the serial number.

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level. If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

3.3.8 Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be

dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation. It is easy to do, and is a good service precaution.

3.4 Abbreviation List

0/6/12 SCART switch control signal on A/V

board. 0 = loop through (AUX to TV),

6 = play 16 : 9 format, 12 = play 4 : 3 format

AARA Automatic Aspect Ratio Adaptation:

algorithm that adapts aspect ratio to remove horizontal black bars; keeps the original aspect ratio

ACI Automatic Channel Installation:

algorithm that installs TV channels directly from a cable network by

means of a predefined TXT page ADC Analogue to Digital Converter AFC Automatic Frequency Control: control

signal used to tune to the correct

frequency AGC Automatic Gain Control: algorithm that

controls the video input of the feature

box AM Amplitude Modulation AP Asia Pacific AR Aspect Ratio: 4 by 3 or 16 by 9 ASF Auto Screen Fit: algorithm that adapts

aspect ratio to remove horizontal black

bars without discarding video

information ATSC Advanced Television Systems

Committee, the digital TV standard in

the USA ATV See Auto TV Auto TV A hardware and software control

system that measures picture content,

and adapts image parameters in a

dynamic way AV External Audio Video AVC Audio Video Controller AVIP Audio Video Input Processor B/G Monochrome TV system. Sound

carrier distance is 5.5 MHz BDS Business Display Solutions (iTV) BLR Board-Level Repair BTSC Broadcast Television Standard

Committee. Multiplex FM stereo sound

system, originating from the USA and

used e.g. in LATAM and AP-NTSC

countries B-TXT Blue TeleteXT C Centre channel (audio) CEC Consumer Electronics Control bus:

remote control bus on HDMI

connections CL Constant Level: audio output to

connect with an external amplifier CLR Component Level Repair ComPair Computer aided rePair CP Connected Planet / Copy Protection CSM Customer Service Mode CTI Color Transient Improvement:

manipulates steepness of chroma

transients CVBS Composite Video Blanking and

Synchronization DAC Digital to Analogue Converter DBE Dynamic Bass Enhancement: extra

low frequency amplification DCM Data Communication Module. Also

referred to as System Card or

Smartcard (for iTV). DDC See “E-DDC” D/K Monochrome TV system. Sound

carrier distance is 6.5 MHz DFI Dynamic Frame Insertion DFU Directions For Use: owner's manual DMR Digital Media Reader: card reader DMSD Digital Multi Standard Decoding DNM Digital Natural Motion

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Precautions, Notes, and Abbreviation List

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DNR Digital Noise Reduction: noise

reduction feature of the set DRAM Dynamic RAM DRM Digital Rights Management DSP Digital Signal Processing DST Dealer Service Tool: special remote

control designed for service

technicians DTCP Digital Transmission Content

Protection; A protocol for protecting

digital audio/video content that is

traversing a high speed serial bus,

such as IEEE-1394 DVB-C Digital Video Broadcast - Cable DVB-T Digital Video Broadcast - Terrestrial DVD Digital Versatile Disc DVI(-d) Digital Visual Interface (d= digital only) E-DDC Enhanced Display Data Channel

(VESA standard for communication

channel and display). Using E-DDC,

the video source can read the EDID

information form the display. EDID Extended Display Identification Data

(VESA standard) EEPROM Electrically Erasable and

Programmable Read Only Memory EMI Electro Magnetic Interference EPG Electronic Program Guide EPLD Erasable Programmable Logic Device EU Europe EXT EXTernal (source), entering the set by

SCART or by cinches (jacks) FDS Full Dual Screen (same as FDW) FDW Full Dual Window (same as FDS) FLASH FLASH memory FM Field Memory or Frequency

Modulation FPGA Field-Programmable Gate Array FTV Flat TeleVision Gb/s Giga bits per second G-TXT Green TeleteXT H H_sync to the module HD High Definition HDD Hard Disk Drive HDCP High-bandwidth Digital Content

Protection: A “key” encoded into the

HDMI/DVI signal that prevents video

data piracy. If a source is HDCP coded

and connected via HDMI/DVI without

the proper HDCP decoding, the

picture is put into a “snow vision” mode

or changed to a low resolution. For

normal content distribution the source

and the display device must be

enabled for HDCP “software key”

decoding. HDMI High Definition Multimedia Interface HP HeadPhone I Monochrome TV system. Sound

2

C Inter IC bus

I

2

I

D Inter IC Data bus

2

S Inter IC Sound bus

I

carrier distance is 6.0 MHz

IF Intermediate Frequency IR Infra Red IRQ Interrupt Request ITU-656 The ITU Radio communication Sector

(ITU-R) is a standards body

subcommittee of the International

Telecommunication Union relating to

radio communication. ITU-656 (a.k.a.

SDI), is a digitized video format used

for broadcast grade video.

Uncompressed digital component or

digital composite signals can be used.

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The SDI signal is self-synchronizing, uses 8 bit or 10 bit data words, and has a maximum data rate of 270 Mbit/s, with a minimum bandwidth of 135 MHz.

iTV Institutional TeleVision; TV sets for

hotels, hospitals etc.

LS Last Status; The settings last chosen

by the customer and read and stored in RAM or in the NVM. They are called at start-up of the set to configure it according to the customer's

preferences LATAM Latin America LCD Liquid Crystal Display LED Light Emitting Diode L/L' Monochrome TV system. Sound

carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I LPL LG.Philips LCD (supplier) LS Loudspeaker LVDS Low Voltage Differential Signalling Mbps Mega bits per second M/N Monochrome TV system. Sound

carrier distance is 4.5 MHz MHEG Part of a set of international standards

4. Mechanical Instructions

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Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

Notes:

• Figures below can deviate slightly from the actual situation, due to the different set executions.

4.1 Cable Dressing

Mechanical Instructions

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Figure 4-1 Cable dressing 40" 7000/8000 series

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Figure 4-2 Cable dressing 40" rear cover 7000 series

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Figure 4-3 Cable dressing 40" rear cover 8000 series

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Mechanical Instructions

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Figure 4-4 Cable dressing 42" 6900 series

Figure 4-5 Cable dressing 42" rear cover 6900 series

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Figure 4-6 Cable dressing 46" 7000/8000 series

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Figure 4-7 Cable dressing 46" rear cover 7000 series

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Mechanical Instructions

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Figure 4-8 Cable dressing 46" rear cover 8000 series

Figure 4-9 Cable dressing 46" 9707 series

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Figure 4-10 Cable dressing 46" rear cover 9707 series

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Figure 4-11 Cable dressing 47" 6900 series

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Mechanical Instructions

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Figure 4-12 Cable dressing 47" rear cover 6900 series

Figure 4-13 Cable dressing 55" 7000/8000 series

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Figure 4-14 Cable dressing 55" rear cover 7000 series

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Figure 4-15 Cable dressing 55" rear cover 8000 series

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Mechanical Instructions

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Figure 4-16 Cable dressing 60" 9607 series

Figure 4-17 Cable dressing 60" rear cover 9607 series

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4.2 Se rvice Positions

For easy servicing of a TV set, the set should be put face down on a soft flat surface, foam buffers or other specific workshop tools. Ensure that a stable situation is created to perform measurements and alignments. When using foam bars take care that these always support the cabinet and never only the display. Caution: Failure to follow these guidelines can seriously damage the display! Ensure that ESD safe measures are taken.

4.3.1 Rear Cover

Warning: Disconnect the mains power cord before removing

the rear cover.

Attention: All sets are equipped with a hatch to disconnect the keyboard control panel. Ambilight sets are in addition equipped with a hatch to disconnect the Ambilight units.

These hatches are indicated on the rear cover with

SERVICE h. It is mandatory to open the hatches and disconnect the cables prior to removal of the rear cover!

See Figure 4-18

1. For sets equipped with Ambilight: open the hatch that covers the Ambilight connector and unplug the connector [1].

2. Remove the hatch that covers the keyboard control panel connector by removing the screws [3].

3. For sets equipped with Ambilight: remove the stand and swivel block [4].

4. Unplug the keyboard control panel connector located underneath the keyboard control hatch.

5. Remove remaining fixation screws.

6. Lift the rear cover from the TV. Make sure that wires and flat foils are not damaged while lifting the rear cover from the set.

and Figure 4-19 for details.

Mechanical Instructions

4.3 Assy/Panel Removal

Figure 4-19 Rear cover removal -all models -2-

4.3.2 SSB

19300_053_120418.eps

Figure 4-18 Rear cover removal -all models -1-

1

120418

Refer to Figure 4-20

and Figure 4-21 for details. Some SSBs have a dedicated LVDS connector, requiring pressing two catches as indicated in the figure, before removing the LVDS cable.

Figure 4-20 SSB LVDS connector catches (optional) -1-

Upon re-connecting the LVDS cable, ensure the catches are locked after having inserted the LVDS cable.

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Figure 4-21 SSB LVDS connector catches (optional) -2-

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120626

Click!

LVDS flat foil

Click!

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Mechanical Instructions

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position.

• Pay special attention not to damage the EMC foams in the set. Ensure that EMC foams are mounted correctly.

EN 19QFU1.1E LA 4.

Underneath the SSB an adhesive heat path is located. Refer to Figure 4-22

for details.

After board swap, it should be located at the correct position.

Figure 4-22 SSB adhesive heath path

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Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.1 Test Points

5.2 Service Modes

5.3 Start-up

5.4 Service Tools

5.5 Error Codes

5.6 The Blinking LED Procedure

5.7 Protections

5.8 Fault Finding and Repair Tips

5.9 Software Upgrading

5.1 Test Points

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. However, several key ICs are capable of generating test patterns, which can be controlled via ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2 Service Modes

Service Default mode (SDM) and Service Alignment Mode (SAM) offers several features for the service technician, while the Customer Service Mode (CSM) is used for communication between the call centre and the customer.

Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again. Analogue SDM can also be activated by grounding the solder path on the SSB, with the indication “SDM” (see figures Service mode pad - front

back.

• Digital SDM: use the RC-transmitter and key in the code “062593”, directly followed by the “MENU” (or "HOME") button. Note: It is possible that, together with the SDM, the main menu will appear. To switch it “off”, push the “MENU” (or "HOME") button again.

) and Service mode pad -

This chassis also offers the option of using ComPair, a hardware interface between a computer and the TV chassis. It offers the abilities of structured troubleshooting, error code reading, and software version read-out for all chassis. (see also section “5.4.1 ComPair

”).

Note: For the new model range, a new remote control (RC) is used with some renamed buttons. This has an impact on the activation of the Service modes. For instance the old “MENU” button is now called “HOME” (or is indicated by a “house” icon).

5.2.1 Service Default Mode (SDM)

Purpose

• To create a pre-defined setting, to get the same measurement results as given in this manual.

• To override SW protections detected by the standby processor and make the TV start up to the step just before protection. See section “5.3 Start-up

”.

• To start the blinking LED procedure where only LAYER 2 errors are displayed. (see also section “5.5 Error Codes

Specifications

Table 5-1 SDM default settings

Region Freq. (MHz) Default system

Europe, AP(PAL/Multi) 475.25 PAL B/G Europe, AP DVB-T 546.00 PID Video: 0B

06 PID PCR: 0B 06 PID Audio: 0B 07

• All picture settings at 50% (brightness, colour, contrast).

• Sound volume at 25%.

How to Activate SDM

For this chassis there are two kinds of SDM: an analogue SDM and a digital SDM. Tuning will happen according Table 5-1

• Analogue SDM: use the RC-transmitter and key in the code “062596”, directly followed by the “MENU” (or “HOME”) button.

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DVB-T

”).

.

Figure 5-1 Service mode pad - front

Figure 5-2 Service mode pad - back

After activating this mode, “SDM” will appear in the upper right corner of the screen (when a picture is available).

How to Exit SDM

Use one of the following methods:

• Switch the set to STANDBY via the RC-transmitter.

• Via a standard customer RC-transmitter: key in “00”sequence.

5.2.2 Service Alignment Mode (SAM)

Purpose

• To perform (software) alignments.

• To change option settings.

• To easily identify the used software version.

• To view operation hours.

• To display (or clear) the error code buffer.

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PHILIPS

MODEL:

32PF9968/10

PROD.SERIAL NO: AG 1A0620 000001

040

39mm

27mm

(CTN Sticker)

Display Option

Code

Service Modes, Error Codes, and Fault Finding

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How to Activate SAM

Via a standard RC transmitter: Key in the code “062596” directly followed by the “INFO” or “OK” button. After activating SAM with this method a service warning will appear on the screen, continue by pressing the “OK” button on the RC.

Contents of SAM

• Hardware Info. – A. SW Version. Displays the software version of the

main software (example: QF1XX-1.2.3.4 = AAABB_X.Y.W.Z).

• AAA= the chassis name.

• BB= Product ID.

• X.Y.W.Z= the software version, where X is the main version number (different numbers are not compatible with one another) and Y.W.Z is the sub version number (a higher number is always

Figure 5-3 Location of Display Option Code sticker

compatible with a lower number).

– B. Standby processor version. Displays the software

version of the standby processor.

– C. Production Code. Displays the production code of

the TV, this is the serial number as printed on the back of the TV set. Note that if an NVM is replaced or is initialized after corruption, this production code has to be re-written to NVM. The update can be done via the NVM editor available in SAM.

• Operation hours. Displays the accumulated total of operation hours (not the standby hours). Every time the TV is switched “on/off”, 0.5 hours is added to this number.

• Errors (followed by maximum 10 errors). The most recent error is displayed at the upper left (for an error explanation see section “5.5 Error Codes

”).

• Reset Error Buffer. When “cursor right” (or “OK” button) pressed here, followed by the “OK” button, the error buffer is reset.

• Alignments. This will activate the “ALIGNMENTS” submenu. See Chapter 6. Alignments

.

• Options numbers. Extra features for Service. For more info regarding option codes, see chapter 6. Alignments

. Note that if the option code numbers are changed, these have to be confirmed with pressing the “OK” button before the options are stored, otherwise changes will be lost.

• Initialise NVM. The moment the processor recognizes a corrupted NVM, the “initialise NVM” line will be highlighted. Now, two things can be done (dependent of the service instructions at that moment): – Save the content of the NVM via ComPair for

development analysis, before initializing. This will give the Service department an extra possibility for diagnosis (e.g. when Development asks for this).

– Initialise the NVM.

• Store - go right. All options and alignments are stored when pressing “cursor right” or the “OK” button.

• Software maintenance. – SW Events. In case of specific software problems, the

development department can ask for this info.

– HW Events. In case of specific software problems, the

development department can ask for this info :

- Event 26: refers to a power dip, this is logged after the TV set reboots due to a power dip.

- Event 17: refers to the power OK status, sensed even before the 3 x retry to generate the error code.

• Test settings. For development purposes only.

• RF4CE pairing tables. Clear paired remote control. Repairing (coldboot of platform possibly needed) can be done by pressing the red/blue hot keys simultaneously for a few seconds.(be sure the distance between the remote control and TV set RF4CE receiver is less then 30cm). Message like “Pairing successful”, confirms the match-make.

• Development 1 file versions. Not useful for Service purposes, this information is mainly used by the development department.

• Development 2 file versions. Not useful for Service purposes, this information is mainly used by the development department.

• Upload to USB. To upload several settings from the TV to an USB stick, which is connected to the SSB. The items are “Personal settings”, “Option codes”, “Alignments”, “Identification data” (includes the set type and prod code + all 12NC like SSB, display, boards), “History list”. The “All” item supports the upload of all several items at once.

A directory “repair\” will be created in the root of the USB stick.

To upload the settings, select each item separately, press “cursor right” (or the “OK” button), confirm with “OK” and

Note: When the NVM is corrupted, or replaced, there is a high possibility that no picture appears because the display code is not correct. So, before initializing the NVM via the SAM, a picture is necessary and therefore the correct display option has to be entered. Refer to Chapter 6. Alignments

for details. To adapt this option, it’s advised to use ComPair (the correct values for the options can be found in Chapter 6. Alignments

) or a method via a standard RC (described below). Changing the display option via a standard RC: Key in the code “062598” directly followed by the “MENU” (or "HOME") button and “XXX” (where XXX is the 3 digit decimal display code as mentioned on the sticker in the set). Make sure to key in all three digits, also the leading zero’s. If the above action is successful, the front LED will go out (Standby) as an indication that the RC sequence was correct. After the display option is changed in the NVM, the TV will go to the Standby mode. If the NVM was corrupted or empty before this action, it will be initialized first (loaded with default values). This initializing can take up to 20 seconds.

wait until the message “Done” appears. In case the download to the USB stick was not successful, “Failure” will be displayed. In this case, check if the USB stick is connected properly and if the directory “repair” is present in the root of the USB stick. Now the settings are stored onto the USB stick and can be used to download into another TV or other SSB. Uploading is of course only possible if the software is running and preferably a picture is available. This method is created to be able to save the customer’s TV settings and to store them into another SSB. Important remark : to upload the “channel list”, select “Home” => “Setup” => “TV settings” => “General settings” => “Channel list copy” => “Copy to USB”.The procedure is also described in the (electronic) user manual.

• Download from USB. To download several settings from the USB stick to the TV, same way of working needs to be followed as described in “Upload to USB”. The “All” item supports to download all several items at once. Important remark : to download the “channel list”, select “Home” => “Setup” => “TV settings” => “General settings” => “Channel list copy” => “Copy to TV”. The procedure is also described in the (electronic) user manual.

• NVM editor. For Smart TV the set “Type number” must be

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Service Modes, Error Codes, and Fault Finding

entered correctly. Also the “Production code” (factory location code), “12NC SSB”, “12NC display” and “12NC supply” can be entered here via the RC-transmitter.Be sure the cursor is put fully to the left (use back key) of the dialog box before enter the new data. Correct data can be found on the side/rear sticker.

How to Navigate

• In SAM, the menu items can be selected with the “CURSOR UP/DOWN” key on the RC-transmitter. The selected item will be highlighted. When not all menu items fit on the screen, move the “CURSOR UP/DOWN” key to display the next/previous menu items.

• With the “CURSOR LEFT/RIGHT” keys, it is possible to: – (De) activate the selected menu item. – (De) activate the selected sub menu.

• With the “OK” key, it is possible to activate the selected action.

How to Exit SAM

Use one of the following methods:

• Switch the TV set to STAND-BY via the RC-transmitter.

• Via a standard RC-transmitter, key in “00” sequence, or select the “BACK” key.

5.2.3 Customer Service Mode (CSM)

Purpose

When a customer is having problems with his TV-set, he can call his dealer or the Customer Helpdesk. The service technician can then ask the customer to activate the CSM, in order to identify the status of the set. Now, the service technician can judge the severity of the complaint. In many cases, he can advise the customer how to solve the problem, or he can decide if it is necessary to visit the customer. The CSM is a read only mode; therefore, modifications in this mode are not possible.

Provided CSM is activated, every menu from CSM can be used as check for the back end chain video.So for all CSM content displayed, it could be determined that the back end video chain is working.

When CSM is activated and there is a USB stick connected to the TV set, the software will dump the CSM content to the USB stick. The file (CSM_model number_serial number.txt) will be saved in the root of the USB stick. This info can be handy if no information is displayed.

Additional in CSM mode (with USB stick connected), pressing “OK” will create an extended CSM dump file on the USB stick. This file (Extended_CSM_model number_serial number.txt) contains:

• The normal CSM dump information,

• All items (from SAM “load to USB”, but in readable format),

• Operating hours,

• Error codes,

• SW/HW event logs.

To have fast feedback from the field, a flashdump can be requested by development. When in CSM, push the “red” button and key in serial digits ‘2679’ (same keys to form the word ‘COPY’ with a cellphone). A file “Dump_model number_serial number.bin” will be written on the connected USB device. This can take 1/2 minute, depending on the quantity of data that needs to be dumped.

Also when CSM is activated, the LAYER 1 error is displayed via blinking LED.(see also section 5.5 Error Codes

How to Activate CSM

Key in the code “123654” via the standard RC transmitter.

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Note: Activation of the CSM is only possible if there is no (user) menu on the screen!

How to Navigate

By means of the “CURSOR-DOWN/UP” knob on the RCtransmitter, can be navigated through the menus.

Contents of CSM

The contents are reduced to 3 pages: General, Software versions and Quality items. The group names itself are not shown anywhere in the CSM menu.

General

• Set type. This information is very helpful for a helpdesk/ workshop as reference for further diagnosis. In this way, it is not necessary for the customer to look at the rear of the TV set. Note that if an NVM is replaced or is initialized after corruption, the set type content has to be re-written to NVM.The update can be done via the NVM editor available in SAM.

• Production code. Displays the production code (the serial number) of the TV. Note that if an NVM is replaced or is initialized after corruption, the production code content has to be re-written to NVM. The update can be done via the NVM editor available in SAM.

• Installed date. Indicates the date of the first installation of the TV. This date is acquired by time extraction.

• Options 1. Displays the option codes numbers of option group 1 as set in SAM (Service Alignment Mode).

• Options 2. Displays the option codes numbers of option group 2 as set in SAM (Service Alignment Mode).

• 12NC SSB. Gives an identification of the SSB as stored in NVM. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. The update can be done via the NVM editor available in SAM. This identification number is the 12nc number of the SSB.

• 12NC display. Shows the 12NC of the display. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. The update can be done via the NVM editor available in SAM.

• 12NC supply. Shows the 12NC of the power supply. Note that if an NVM is replaced or is initialized after corruption, this identification number has to be re-written to NVM. The update can be done via the NVM editor available in SAM.

• 12NC RF4CE board. Shows the 12NC of the RF4CE board.

Software versions

• Current main software. Displays the build-in main software version. In case of field problems related to software, software can be upgraded. As this software is consumer upgradeable, it will also be published on the Internet. Example: QF1xx-1.2.3.4

• Standby software. Displays the build-in standby processor software version. Upgrading this software will be possible via USB (see section 5.9 Software Upgrading

).

Example: STDBY_61.0.0.7

• e-UM version. Displays the electronic user manual SWversion (12NC version number). Most significant number here is the last digit.

• Strings database version. Reflects the latest embedded string database version .

• FPGA video version.Displays the Scan/backlight FPGA software version.Device processes the backlight + boost pwm control, scanning, 3D drive and ambilight buffering.

• 3D dongle software version.Not applicable.

• FRC-V software.Not applicable.

).

• RF4CE software.Embedded software version located on the RF4CE board.

• FPGA lattice backlight software.

• FPGA HDR software.

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Active

Off

On

Semi

St by

Mains

on

Mains

off

GoToProtection

-WakeUp requested

-Acquisition needed

- stby requested and no data Acquisition required

St by requested

WakeUp

requested

Protection

WakeUp

requested

(SDM)

GoToProtection

(triggered during startup

by standby µP)

EN 23QFU1.1E LA 5.

Quality items

• Signal quality. Bad / average /good (not for DVB-S).

• Ethernet MAC address. Displays the MAC address present in the SSB.

• Wireless MAC address. Displays the wireless MAC address to support the Wi-Fi functionality.

• BDS key. Indicates if the set is in the BDS status.

• CI module. Displays status if the common interface module is detected.

• CI + protected service. Yes/No.

• Event counter : S : 000X 0000(number of software recoveries : SW EVENT-LOG #(reboots) S : 0000 000X (number of software events : SW EVENTLOG #(events) H : 000X 0000(number of hardware errors) H : 0000 000X (number of hardware events : SW EVENTLOG #(events).

• Coldboot counter. Neglect “BDS mode settings”

• Fastcoldboot counter. Neglect “BDS mode settings”

• Hotboot counter. Neglect “BDS mode settings”

• Application hotboot counter. Neglect “BDS mode settings”

How to Exit CSM

Press “MENU” (or "HOME") / “Back” key on the RC-transmitter.

5.3 Start-up

As described, the start-up diagrams below, documents which supplies are present at any certain moment.

Figure 5-4 Transition diagram

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No

Start AVC system

Off

Standby Supply starts running.

All standby supply voltages become available.

st-by µP resets, resulting in a high impedant output

stage of the I/O ports.

Stand by or

Protection

AC~ Mains is applied

start keyboard scanning, RC detection.

Wake up reasons are off.

If the protection state was left by short circuiting the

SDM pins, detection of a protection condition during

startup shall stall the startup. Protection conditions

occuring in a playing set shall be ignored. The

protection mode shall not be entered.

12V platform is turned on, automatically enabling the

low voltage DCDC converter outputs

Enable the supply detect io n algorithm

Switch ON Platform supply by switching High the

STANDBYn line.

Initialise I/O pins of th e st-by µP

- Keep AVC system in reset (internal signal)

- Switch RESET-FUSION-OUTn LOW

- Switch RESET-HDMI-MUXn LOW

- Switch RESET-ETHERNETn LOW

- Switch AUDIO-MUTEn LOW

- Switch SPLASH-ON LOW

- Switch LCD-PWR-ONn High

No

Detect2 high received

within 2 seconds?

12V error: Layer1: 3

Layer2: 16

Enter protection

Yes

Wait 300ms

Switch followin g lines asap:(part of preBOOT) (GPIO2): LOW

CTRL-DISP2 (GPIO3): LOW CTRL-DISP3 (GPIO8): LOW CTRL-DISP4 (BKLGON): LOW 3D-LR (PWM0): LOW BL-SPI-CS_BL-I-CTRL (PWM1): LOW BL-DIM (BOOST): LOW

All display related I/O lines should be LOW as long as the Tcon is not powered to avoid leakage current and tcon startup problems. These lines will furtheron be dynamically controll e d by the mainSW.

Wait 10ms

Switch RESET-FUSION-OUTn, RESET-

HDMI-MUXn , RESET-ETHERNETn High

Small delay between AVC boot and other platform ICs is preferred to limi t rush-in current on Platform.

Switch ENABLE-WOLAN high to power Ethernet PHY

and Wifi dongle

Switch ENABLE-WOLANn high to power Ethernet

PHY and internal Wifi dongle if Networked Standby

was Off in the Standby mode.

Startup shall continue from the moment a valid detection is received.

Service Modes, Error Codes, and Fault Finding

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Figure 5-5 “Off” to “Semi Stand-by” flowchart (part 1)

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Service Modes, Error Codes, and Fault Finding

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120504

Yes

Semi-Standby

3-th try?NoSwitch Standby I/O l ine LOW

Switch AVC in reset

Enter protection

Wake up reason

coldboot to Active mode?

Startup screen cfg file

present?

yes

No

yes

AUDIO-MUTEn is switched by MIPS code later on in the startup process when audio

needs to be released

Switch RESET-FUSION-OUTn, RESET-

HDMI-MUXn , RESET-ETHERNETn Low

Boot is failing

Reset-lines are switched

MIPS boots

Standby µP monitors boot process and will

init a restart if Boot

process hampers

TV application starts

Set was

started with

SDM pin?

Yes

Ignore boot failure:

Stall the startup process.

Blink Layer2 error 53.

Enter protection without

turning off the supplies

No

Wait 4 seconds before restarting

No

Blink error code

Layer 1 error 2

MIPS sends out startup screen

MIPS starts up the display.

Startup screen visible

EN 25QFU1.1E LA 5.

Figure 5-6 “Off” to “Semi Stand-by” flowchart (part 2)

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Active

Semi Standby

Initialize audio and video

processing IC's and functions

according needed use case.

Assert RGB video blanking

and audio mute

Wait until previous on-state is left more than2

secondsago. (to prevent LCD display problems)

The assumption here is that a fast toggle (<2s) can

only happen during ON->SEMI ->ON. In these states,

the AVC is still active and can provide the 2s delay. A

transition ON->SEMI->STB Y->SEMI->ON cannot be

made in less than 2s, because the standby state will

be maintained for at least 4s.

unblank the video

Wait until valid and stable audio and video, corresponding to the

requested output is delivered

AND

the backlight has been switched on for at least the time which is

indicated in the display file as preheat time

Release audio mute

Set the Ambilight functionality according the last status

settings

No

Start POWER-OK line

detection algorithm as defined

in the CHS service.

return

Display already on?

(cold boot with splash

screen)

Yes

Startup display

(see separate tab)

Display cfg file present

and up to date, according

correct display option?

No

Prepare Start screen Display config

file and copy to Flash

Yes

Service Modes, Error Codes, and Fault Finding

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Figure 5-7 “Semi Stand-by” to “Active” flowchart

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Service Modes, Error Codes, and Fault Finding

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120504

Semi Standby

Active

Mute all sound outputsaccording

information in the FMS AUDIO

Mute all video outputs switch off Ambilight (see CHS ambilight)

Wait 100ms

Wait until Ambilight has faded out:

Output power Observer should be zero

Switch off POK line detection

algorithm (see CHS service)

Shut down the display

(see separate sheet)

Switch Off LCD backlight

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Figure 5-8 “Active” to “Semi Stand-by” flowchart

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120504

transfer Wake up reasons to the Stand by µP.

Stand by

Semi Stand by

Disable all supply related protections and switch off

the DC/DC converters (ENABLE-3V3n)

No

Switch OFF all supplies by switching HIGH the

Standby I/O line

Switch AVC system in reset state

Switch reset-USB, Reset-Ethernet and Reset-DVBs

LOW

Important remarks:

release reset audio 10 sec after entering

standby to save power

Also here, the standby state has to be

maintained for at least 4s before starting

another state transition.

Wait 10ms

Delay transition until ramping down of ambient light is

finished. *)

If ambientlight functionality was used in semi-standby (lampadaire mode), switch off ambient light (see CHS

ambilight)

*) If this is not performed and the set is switched to standby when the switch off of the ambilights is still ongoing, the lights will switch off abruptly when the supply is cut.

Switch RESET-FUSION-OUTn, RESET-HDMI-MUXn ,

RESET-ETHERNETn Low

Switch ENABLE-WOLAN Low to

power off the Ethernet PHY and

Internal Wifi dongle.

Networked Standby

required?

Yes

transfer specific Firmware and Wake up reasons to the

Wifi dongle to allow networked standby

Service Modes, Error Codes, and Fault Finding

2012-Sep-14

Figure 5-9 “Semi Stand-by” to “Stand-by” flowchart

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Service Modes, Error Codes, and Fault Finding

10000_036_090121.eps

091118

TO

UART SERVICE

CONNECTOR

TO

UART SERVICE

CONNECTOR

TO I2C SERVICE CONNECTOR

TO TV

PC

HDMI I

2

C only

Optional power

5V DC

ComPair II Developed by Philips Brugge

RC out

RC in

Optional

Switch

Power ModeLink/

Activity

I

2

C

ComPair II

Multi

function

RS232 /UART

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5.4 Service Tools

5.4.1 ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips Consumer Electronics products and offers the following:

1. ComPair helps to quickly get an understanding on how to

2. ComPair allows very detailed diagnostics and is therefore

3. ComPair speeds up the repair time since it can

4. ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product. The ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s). The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to Connect

This is described in the chassis fault finding database in ComPair.

Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs can be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• Software is available via the Philips Service web portal.

• ComPair UART interface cable for QF1x.x.

Note: When you encounter problems, contact your local support desk.

repair the chassis in a short and effective way.

capable of accurately indicating problem areas. No knowledge on I

2

C or UART commands is necessary,

because ComPair takes care of this.

automatically communicate with the chassis (when the µP is working) and all repair information is directly available.

Figure 5-10 ComPair II interface connection

(using 3.5 mm Mini Jack connector): 3138 188 75051.

5.5 Error Codes

5.5.1 Introduction

The error code buffer contains all detected errors since the last time the buffer was erased. The buffer is written from left to right, new errors are logged at the left side, and all other errors shift one position to the right. When an error occurs, it is added to the list of errors, provided the list is not full. When an error occurs and the error buffer is full, then the new error is not added, and the error buffer stays intact (history is maintained). To prevent that an occasional error stays in the list forever, the error is removed from the list after more than 50 hrs. of operation. When multiple errors occur (errors occurred within a short time span), there is a high probability that there is some relation between them.

• If no errors are there, the LED should not blink at all in

CSM or SDM. No spacer must be displayed as well.

• There is a simple blinking LED procedure for board

level repair (home repair) so called LAYER 1 errors

next to the existing errors which are LAYER 2 errors (see

Table 5-2

– LAYER 1 errors are one digit errors. – LAYER 2 errors are 2 digit errors.

• In protection mode. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• Fatal errors, if I2C bus is blocked and the set reboots, CSM and SAM are not selectable. – From consumer mode: LAYER 1. – From SDM mode: LAYER 2.

• In CSM mode. – When entering CSM: error LAYER 1 will be displayed

• In SDM mode. – When SDM is entered via Remote Control code or the

• Error display on screen. – In CSM no error codes are displayed on screen. – In SAM the complete error list is shown.

Basically there are three kinds of errors:

• Errors detected by the Standby software which lead to protection. These errors will always lead to protection and an automatic start of the blinking LED LAYER 1 error. (see section “5.6 The Blinking LED Procedure

• Errors detected by the Standby software which not lead to protection. In this case the front LED should blink the involved error. See also section “5.5 Error Codes

Error Buffer”. Note that it can take up several minutes

before the TV starts blinking the error (e.g. LAYER 1 error = 2, LAYER 2 error = 15 or 53).

• Errors detected by main software (MIPS). In this case the error will be logged into the error buffer and can be read out via ComPair, via blinking LED method LAYER 1-2 error, or in case picture is visible, via SAM.

5.5.2 How to Read the Error Buffer

Use one of the following methods:

• On screen via the SAM (only when a picture is visible). E.g.: – 00 00 00 00 00: No errors detected – 23 00 00 00 00: Error code 23 is the last and only

– 37 23 00 00 00: Error code 23 was first detected and

– Note that no protection errors can be logged in the

• Via the blinking LED procedure. See section 5.5.3 How to

Clear the Error Buffer.

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).

by blinking LED.

hardware pins, LAYER 2 is displayed via blinking LED.

detected error.

error code 37 is the last detected error.

error buffer.

”).

, 5.5.4

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Service Modes, Error Codes, and Fault Finding

•Via ComPair.

5.5.3 How to Clear the Error Buffer

Use one of the following methods:

• By activation of the “RESET ERROR BUFFER” command in the SAM menu.

• If the content of the error buffer has not changed for 50+ hours, it resets automatically.

5.5.4 Error Buffer

In case of non-intermittent faults, clear the error buffer before starting to repair (before clearing the buffer, write down the content, as this history can give significant information). This to ensure that old error codes are no longer present.

Table 5-2 Error code overview

Description Layer 1 Layer 2

I2CM3 (SSB + SRF bus) 2 13 MIPS E BL / EB SSB SSB I2CM2 (BE bus) 2 14 MIPS E BL / EB SSB SSB I2CM1(FE bus) 2 18 MIPS E BL / EB SSB SSB Fusion doesn’t boot (HW cause) 2 15 Stby µP P BL Fusion SSB 12V 3 16 Stby µP P BL / Supply Display supply (POK) 3 17 MIPS E EB / Supply HDMI mux 2 23 MIPS E EB SII9387 SSB I2C switch 2 24 MIPS E EB PCA9540 SSB Channel dec DVB-T2 2 27 MIPS E EB CXD2834 SSB Channel dec DVB-S2 2 28 MIPS E EB STV0903 SSB Lnb controller 2 31 MIPS E EB LNBH25 SSB Hybrid Tuner 2 34 MIPS E EB SUT-RE214Z SSB Main NVM 2 35 MIPS E EB STM24C64 SSB Tuner DVB-S2 2 36 MIPS E EB STV6110 SSB Class-D 2 37 MIPS E EB TAS 5731 PHP SSB FPGAScanBacklight 2 38 MIPS E EB XC6SLX4 SSB T° sensor SSB/Display 2 42 MIPS E EB LM 75 T° sensor on SSB/Display Light sensor 6 43 MIPS E EB TSL2571 Set µP touch control 6 44 MIPS E EB / Set RF4CE 6 46 MIPS E EB / Set MIPS doesn’t boot (SW cause) 2 53 Stby µP P BL FUSION SSB FPGA HDR 5 61 MIPS E BL Xilinx Spartan Display FPGA Lattice Backlight 5 62 MIPS E BL Lattice Display TCON µP (SHARP) 7 54 MIPS E BL / Display TCON ASIC (SHARP) 7 55 MIPS E BL / Display VCON cal (SHARP) 7 56 MIPS E BL / Display

Monitored by

If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error code and not the actual cause.(e.g. a fault in the protection detection circuitry can also lead to a protection) There are several mechanisms of error detection:

• Via error bits in the status registers of ICs.

• Via polling on I/O pins going to the standby processor.

• Via sensing of analog values on the standby processor or the Mips.

• Via a “not acknowledge” of an I

Take notice that some errors need several minutes before they start blinking or before they will be logged. So in case of problems wait 2 minutes from start-up onwards, and then check if the front LED is blinking or if an error is logged.

Error/

Error Buffer/

Prot

Blinking LED Device Defective Board

2

C communication.

Extra Info

• Rebooting. When a TV is constantly rebooting due to internal problems, most of the time no errors will be logged or blinked. This rebooting can be recognized via a ComPair interface and Hyperterminal (for Hyperterminal settings, see section “5.8 Fault Finding and Repair Tips

Logging). It’s shown that the loggings which are generated

by the main software keep continuing.

• Error 13 (I

2

C bus M3, SSB + SRF bus blocked). Current situation: when this error occurs, the TV can reboot due to the blocked bus. The best way for further diagnosis here, is to check the logging output.

• Error 14 (I

2

C bus M2, BE bus blocked). Current situation: when this error occurs. The best way for further diagnosis here, is to check the logging output.

• Error 18 (I

2

C bus M1, FE bus blocked). Current situation: when this error occurs. The best way for further diagnosis here, is to check the logging output.

• Error 15 (Fusion doesn’t boot). Indicates that the main processor was not able to read his bootscript. This error will point to a hardware problem around the Fusion (supplies not OK, Fusion device completely dead, link between Mips and Stand-by Processor broken, etc...) Other root causes for this error can be due to hardware problems regarding the DDR’s and the bootscript reading from the Fusion device.

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• Error 16 (12V). This voltage is made in the power supply and results in protection (LAYER 1 error = 3) in case of absence. When SDM (maintain grounding continuously) is activated we see blinking LED LAYER 2 error = 16.

• Error 17 (Display Supply). Here the status of the “Power OK” is checked by software, no protection will occur during failure of the display supply, only error logging. LED blinking of LAYER 1 error = 3 in CSM, in SDM this gives LAYER 2 error = 17.

• Error 23 (HDMI mux). When there is no I

2

C communication towards the HDMI mux after start-up, LAYER 2 error = 23 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 24 (I2C switch). When there is no I communication towards the I

2

C switch, LAYER 2

2

C

error = 24 will be logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 27 (Channel dec DVB-T2). When there is no I

2

C communication towards the DVB-T channel decoder, LAYER 2 error = 27 will be logged and displayed via the blinking LED procedure if SDM is switched on.

• Error 28 (Channel dec DVB-S2). When there is no I

2

C communication towards the DVB-S channel decoder, LAYER 2 error = 28 will be logged and displayed via the blinking LED procedure if SDM is switched on.

Service Modes, Error Codes, and Fault Finding

EN 31QFU1.1E LA 5.

• Error 31 (Lnb controller). When there is no I2C communication towards this device, LAYER 2 error = 31 will be logged and displayed via the blinking LED procedure if SDM is activated.

• Error 34 (Tuner). When there is no I

2

C communication towards the tuner during start-up, LAYER 2 error = 34 will be logged and displayed via the blinking LED procedure when SDM is switched on.

• Error 35 (main NVM). When there is no I communication towards the main NVM during start-up, LAYER 2 error = 35 will be displayed via the blinking LED procedure when SDM is switched “on”. All service modes (CSM, SAM and SDM) are accessible during this failure, observed in the Uart logging as follows: "<< ERRO >>> PFPOW_.C: First Error (id19, Layer_1= 2 Layer_= 35)".

• Error 36 (Tuner DVB-S). When there is no I communication towards the DVB-S tuner during start-up, LAYER 2 error = 36 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 37 (Class-D). When there is no I

2

C communication towards the Class-D amplifier during start-up, LAYER 2 error = 37 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 38 (FPGA ScanBacklight). When there is no I communication towards this FPGA device during start-up, LAYER 2 error = 38 will be logged and displayed via the blinking LED procedure when SDM is switched “on”. This device supports the backlight + boost pwm control, scanning, 3D drive and ambilight buffering.

• Error 42 (Temp sensor). Only applicable for TV sets equipped/stuffed with temperature devices.

• Error 43 (Light sensor). When there is no I communication towards the light sensor device during start-up, LAYER 2 error = 43 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 44 (Touch control). When there is no I communication towards the touch control micro processor during start-up, LAYER 2 error = 44 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 46 (RF4CE). When there is no I

2

C communication towards the RF4CE driver during start-up, LAYER 2 error = 46 will be logged and displayed via the blinking LED procedure when SDM is switched “on”.

• Error 53. This error will indicate that the Fusion device has read his bootscript (when this would have failed, error 15 would blink) but initialization was never completed because of hardware problems (NAND flash, DDR...) or software initialization problems. Possible cause could be that there is no valid software loaded (try to upgrade to the latest main software version). Note that it can take a few minutes before the TV starts blinking LAYER 1 error = 2 or in SDM (maintain grounding continuously), LAYER 2 error = 53.

5.6 The Blinking LED Procedure

5.6.1 Introduction

The blinking LED procedure can be split up into two situations:

• Blinking LED procedure LAYER 1 error. In this case the error is automatically blinked when the TV is put in CSM. This will be only one digit error, namely the one that is referring to the defective board (see table “5-2 Error code

overview”) which causes the failure of the TV. This

approach will especially be used for home repair and call centres. The aim here is to have service diagnosis from a distance.

• Blinking LED procedure LAYER 2 error. Via this procedure, the contents of the error buffer can be made visible via the front LED. In this case the error contains 2 digits (see table “5-2 Error code overview displayed when SDM (hardware pins) is activated. This is especially useful for fault finding and gives more details regarding the root cause of the defective board.

2

C

2

C

2

C

2

C

”) and will be

Important remark:

For an empty error buffer, the LED should not blink at all in CSM or SDM. No spacer will be displayed.

When one of the blinking LED procedures is activated, the front LED will show (blink) the contents of the error buffer. Error codes greater then 10 are shown as follows:

1. “n” long blinks (where “n” = 1 to 9) indicating decimal digit

2. A pause of 1.5 s

3. “n” short blinks (where “n”= 1 to 9)

4. A pause of approximately 3 s,

5. When all the error codes are displayed, the sequence finishes with a LED blink of 3 s (spacer).

6. The sequence starts again.

Example: Error 12 8 6 0 0. After activation of the SDM, the front LED will show:

1. One long blink of 750 ms (which is an indication of the decimal digit) followed by a pause of 1.5 s

2. Two short blinks of 250 ms followed by a pause of 3 s

3. Eight short blinks followed by a pause of 3 s

4. Six short blinks followed by a pause of 3 s

2

C

5. One long blink of 3 s to finish the sequence (spacer).

6. The sequence starts again.

5.6.2 How to Activate

Use one of the following methods:

• Activate the CSM. The blinking front LED will show the layer 1 error(s), this works in “normal operation” mode or automatically when the error/protection is monitored by the Standby processor. In case no picture is shown and there is no LED blinking, read the logging to detect whether “error devices” are mentioned. (see section “5.8 Fault Finding and Repair

Tips, 5.8.6 Logging”).

• Activate the SDM. The blinking front LED will show the entire content of the LAYER 2 error buffer, this works in “normal operation” mode or when SDM (via hardware pins) is activated when the tv set is in protection.

5.7 Protections

5.7.1 Software Protections

Most of the protections and errors use either the standby microprocessor or the MIPS controller as detection device. Since in these cases, checking of observers, polling of ADCs, and filtering of input values are all heavily software based, these protections are referred to as software protections. There are several types of software related protections, solving a variety of fault conditions:

• Related to supplies: presence of the +5V, +3V3 and 1V2 needs to be measured, no protection triggered here.

• Protections related to breakdown of the safety check mechanism. E.g. since the protection detections are done by means of software, failing of the software will have to initiate a protection mode since safety cannot be guaranteed any more.

Remark on the Supply Errors

The detection of a supply dip or supply loss during the normal playing of the set does not lead to a protection, but to a cold reboot of the set. If the supply is still missing after the reboot, the TV will go to protection.

Protections during Start-up

During TV start-up, some voltages and IC observers are actively monitored to be able to optimize the start-up speed, and to assure good operation of all components. If these monitors do not respond in a defined way, this indicates a malfunction of the system and leads to a protection. As the

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observers are only used during start-up, they are described in the start-up flow in detail (see section “5.3 Start-up

5.8 Fault Finding and Repair Tips

Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra

Info”.

5.8.1 Ambilight

Due to the aging process on the LED’s fitted on the Ambilight module, there can be a difference in the colour and/or light output of the spare ambilight modules in comparison with the originals ones contained in the TV set. Via SAM => alignments => ambilight, the spare module can be fine-tuned. Other possibility: the original values can also be recovered via SAM, Upload to USB => alignments. Now the original settings are on the USB stick and can be reloaded into another SSB (NVM).

5.8.2 CSM

When CSM is activated and there is a USB stick connected to the TV, the software will dump the complete CSM content to the USB stick. The file (Csm.txt) will be saved in the root of the USB stick. If this mechanism works it can be concluded that a large part of the operating system is already working (MIPS, USB...)

5.8.3 DC/DC Converter

Description

Input power for the TV platform comes from the main power supply that delivers +3V3STANDBY (pin 1 of connector 1M95) and +12V (pins 5,6 of the same connector). +3V3STANDBY (3.3V nominal) is the permanent voltage, supplying the standby microprocessor inside the Fusion chip while +12V is started by the STANDBY signal (connector 1M95, pin 2) when going from high to low. +12V is split in three branches via fuses 1UA0 (+12Va), 1UA1 (+12Vb) and 1UP1(+12-DVBS):

• +12Va serves as input voltage for the switching voltage regulators that deliver +1V1-FD and +1V5.

• +12Vb is used as input voltage for the switching voltage regulators that deliver +3V3 and +5V.

• +12V-DVBS (if DVB-S functionality is present) goes to 12V to +1V0-DVBS and 12V to +V-LNB switching regulators.

The on board power supply consists of 4 switching voltage regulators (6 in case of DVB-S version), 6 linear voltage regulators (7 in case of DVB-S version) one power switch delivering +3V3AL for Ambilight driver boards and an overcurrent protection for 12V (AMBI-POWER) Ambilight boards.

All switching voltage regulators have 12V input voltage and deliver:

• +1V0-DVBS core supply voltage for DVB-S2 demodulator (1.02V nominal), stabilized close to the point of load by means of SENSE+1V0-DVBS signal.

• +1V1-FD Fusion main core supply voltage (0.95V...1.2V depending on DVS1 signal), stabilized close to the point of load by means of SENSE+1V1-FD signal.

• +1V5 supply voltage (1.53V nominal), for the DDR3 memories and DDR3 interface of the Fusion chip.

• +3V3 supply voltage (3.37V nominal): overall 3.3V for on board IC’s and for WiFi module, also used as input voltage for linear voltage regulators delivering +1V1-FA, +1V2-FA and +2V5.

• +5V (5.15V nominal) for USB, WiFi, Conditional Access Module and via linear voltage regulators, the DVB-T and DVB-S tuner supplies.

• +V-LNB (13V or 18V) supply for outdoor satellite reception equipment.

The linear voltage regulators are providing:

”).

• +1V1-FA supply voltage (1.10V nominal, from +3V3) for low power analog (PLL) blocks inside Fusion chip.

• +1V2-MIPS supply voltage (1.05...1.3V depending on DVS2 signal, input voltage: +1V5) for Fusion auxiliary core.

• +1V2-FE supply voltage (1.20V nominal, from +1V5) for HDMI multiplexer and (if present) DVB-T2 demodulator IC device.

• +1V2-FA supply voltage (1.20V nominal, from +3V3) for higher power analog Fusion internal blocks (mainly video ADC’s).

• +2V5 supply voltage (2.5V nominal, from +3V3) for LVDS (or Vby1) interface and various other internal blocks of Fusion.

• +3V3 supply voltages (3.3V nominal, from +5V) for RF tuners, separate linear regulator per tuner.

Supply voltages +1V1-FD, +1V5 and +1V2-MIPS are started immediately when +12V rises above the 5V level. The rest of the supply voltages (+5V, +3V3, +2V5, +1V2-FA and +1V1-FA are turned on by signal DETECT12V when becomes high. The tuners are supplied from their respective linear voltage regulators when +5V starts.+1V0-DVBS is started almost at the same time, when +2V5-DVBS (derived from +3V3-DVBS via the equivalent diode 7RC2) rises.

DETECT12V becomes high when +12V rises above 10V and stays above 9.5V (0.5V hysteresis).

+3V3AL will become available when e (signal ENABLE-3V3-AMBI high).In case of TV sets having Ambilight consumption from 12V + higher than 1A, the electronic protection circuit (7UAC and surrounding components) is used instead of fuse 1UA2. AMBI-POWER should be available shortly (100 ms) after +12V starts if there is no load on it. The over-current trigger level is around 4.1A. Once triggered, it can be reset by removing the shortcircuit cause and keeping it under no load condition for about 100 ms.

+V-LNB value is determined via software: around 13V for vertical polarized satellite channels and around 18V for the horizontal ones. Maximum current is limited in both cases to 400mA

Debugging

The best way to find a failure in the DC/DC converters is to check their start-up sequence at power “on”, presuming that the external supply is operational. Take the STANDBY signal "high"-to-"low" transition as trigger reference and check the power start-up sequence as described above.

Tips

• Behaviour comparison with a working Fusion platform can be a fast way to locate failures.

• Check first the integrity of fuses 1UA0, 1UA1 and (if present) 1UA2 and 1UP1.

• If a fuse is found interrupted: check the respective +12Va (or +12Vb or +12V-DVBS) short circuit with all of the derived supply voltages, for example: a +12Va ->+1V5 short circuit will probably be caused by a defective 7UB5 integrated circuit.

• Switching frequency should be around 400KHz for 12V to +V-LNB switching voltage regulator, 500KHz for +12V to +1V1-FD and 600KHz...700KHz for the others.

• When a short circuit to GND is found on one of the supply voltage delivered by a switching voltage regulator, then try first removing the power coil(s) from the output filter of the converter, this to point the location of the short circuit (at converter side or at load side).

5.8.4 Power Supply Unit

For fault finding tips, refer to section 7.2.1

nabled via software

.

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5.8.5 Exit “Factory Mode”

To exit this mode, push the “VOLUME minus” button on the TV’s local keyboard for 10 seconds (this disables the continuous mode). Then push the “SOURCE” button for 10 seconds until to exit the “Factory mode”.

5.8.6 Logging

When something is wrong with the TV set (f.i. the set is rebooting) you can check for more information via the logging in Hyperterminal. The Hyperterminal is available in every Windows application via Programs, Accessories, Communications, Hyperterminal. Connect a “ComPair UART”cable (3138 188 75051) from the service connector in the TV to the “multi function” jack at the front of ComPair II box. Required settings in ComPair before starting to log:

- Start up the ComPair application.

- Select the correct database (open file “QFU1X.X”, this will set the ComPair interface in the appropriate mode).

- Close ComPair After start-up of the Hyperterminal, fill in a name (f.i. “logging”) in the “Connection Description” box, then apply the following settings:

1. COMx

2. Bits per second = 115200

3. Data bits = 8

4. Parity = none

5. Stop bits = 1

6. Flow control = none During the start-up of the TV set, the logging will be displayed. This is also the case during rebooting of the TV set (the same logging appears time after time). Also available in the logging is the “Display Option Code” (useful when there is no picture), look for item “display number xxx” in the beginning of the logging. Tip: when there is no picture available during rebooting you are able to check for “error devices” in the logging (LAYER 2 error) which can be very helpful to determine the failure cause of the reboot. For protection state, there is no logging.

5.8.7 Guidelines Uart logging

Description possible cases:

Uart loggings are displayed:

• When Uart loggings are coming out, the first conclusion we can make is that the TV set is starting up and communication with the flash RAM seems to be supported. The Fusion processor is able to read and write in the DRAMs.

• We can not yet conclude: Flash RAM and DRAMs are fully operational/reliable.There still can be errors in the data transfers, DRAM errors, read/write speed and timing control.

No Uart logging at all:

• No startup will end up in a blinking LED status: error LAYER 1 = “2”, error LAYER 2 = “53” (startup with SDM solder paths continuous short).

• Error LAYER 2 = “15” (hardware cause) is more related to a supply issue while error LAYER 2 = “53” (software cause) refers more to boot issues.

Uart loggings reporting fault conditions, error messages, error codes, fatal errors:

• Some failures are indicated by error codes in the logging, check with error codes table (see Table “5-2 Error code

overview”). e.g. => <<<ERROR>>>PLFPOW_MERR.C :

First Error (id=10,Layer_1=2,Layer_2=23).

2

C bus errors.

•I

• Not all failures or error messages should be interpreted as fault. For instance root cause can be due to wrong option codes settings => e.g. “FpgaDimmingPresent: False/True”.

In the Uart log startup script we can observe and check the enabled loaded option codes.

Defective sectors (bad blocks) in the Nand Flash can also be reported in the logging.

Startup in the SW upgrade application and observe the Uart logging:

Starting up the TV set in the Manual Software Upgrade mode will show access to USB, meant to copy software content from USB to the DRAM. Progress feedback can be found in the logging.

Startup in Jett Mode:

Check Uart logging in Jet mode mentioned as : “JETT UART READY”.

5.8.8 Loudspeakers

Make sure that the volume is set to minimum during disconnecting the speakers in the ON-state of the TV. The audio amplifier can be damaged by disconnecting the speakers during ON-state of the set!

5.8.9 Power Supply

In case of no picture when CSM (test pattern) is activated and backlight doesn’t light up, it’s recommended first to check the LED drivers on the PSL(S) + wiring (LAYER 2 error = 17 is displayed in SDM).

5.8.10 Display option code

Attention: In case the SSB is replaced, always check the display option code number (group 2, first option number e.g. “44855”) in SAM, even when picture is available. Performance with the incorrect display option code can lead to unwanted side-effects for certain conditions.

Also supported in this chassis:

While in the download application (start up in TV mode + “OK” button pressed), the display option code can be changed via 062598 HOME XXX special SAM command (XXX=display option in 3 digits).

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Significant risk of damaging the board by the fixation point

SSB fixation points

Service Modes, Error Codes, and Fault Finding

5.8.11 SSB Replacement

Follow the instructions in the flowchart in case a SSB has to be exchanged. See table 5-3 SSB replacement instructions

Step # Action to do Advise / Attention points / Remarks

1 Ensure ESD protection by using a wristband 2 If SSB is still functional: Go via SAM to “upload to USB” and copy Personal

settings - Option codes - Alignments (Presets) - Set Identification. Advice: because of differences in memory a llocatio n, it is a dvised to upg rade main SW before copying data from existing SSB. Copy of Preset list is

possible from normal user interface. 3 Disconnect set from mains and from antenna. Safety and ESD! 4 Open the set and disconnect LVDS flat cable. Disconnect other cables /

connections. 5 Dismount the (defective) SSB from the set. Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful

6 Place new SSB in the set, and fixate/mount carefully. Do not damage SSB copper tracks with your tools! Do not scratch bottom of SSB (be very careful

7 Connect PSU and other connectors. Insert the optional WiFi module. Make sure that the connectors are correctly plugged-in and locked (click). Special attention for the

8 Connect LVDS connector(s). Be very careful: wrong or bad connection can damage the TCON part on the SSB and damage

9 Connect set to mains and switch TV “On”. Check start-up of the set, backlight switching “On”. 10 If the set does not start (or reboots) check:

- The connectors from the power supply,

- The power supply cable and connection pins,

- LVDS cable connection.

11 Before programmi ng the new SSB, upgrade to latest softwa re. If set is starting

up in software upgrade mode, then first install new software via software

Upgrade Menu or via the autorun.upg file. 12 If set is starting up without picture or menu (OSD), first program the correct

Display Option codes. 13 Go to SAM and program “Set type” and “Serial number”. This is possible via

the NVM editor and virtual keyboard. In case personal settings were

recovered from the defective SSB, you can use an “Upload from USB”. 14 Check if option codes are correct, a nd keys are present. S SBs with integra ted

TCON needs TCON alignment in SAM. 15 Update to latest software (Standb y and main software). This step is necessary

to make sure that the (optional) 200Hz T-CON board has the latest software.

16 Once the set is playing, check cable connection between PSU and SSB, by

moving the cable if there are no bad connections. 17 Fill in the Electronic DDF (Defect Description Form): Fault symptom, TV type

and TV serial number. 18 Install presets or check if all presets are OK. Check in CSM if Type number,

Serial number, Main and Standby software are correct. 19 Check connectivity to Net TV and DLNA. Check AmbiLight functionality. Only for sets having these functionalities. 20 Inform customer about Memory Card, USB, or Hard drive PVR (Personal

Video Recording) recordings.

For a more general overview of steps to follow, refer to figure

5-13 SSB replacement flowchart

.

Upload to USB: A directory “repair” will be created on the USB, and all data will be copied in this directory. On sets with software before Q552-xx-140-x-x, there was an issue by copying the program map table, so it is advised to reinstall the programs from Virgin mode instead of using copy via USB.

Always take care for ESD! Be extra careful when removing connectors!

by moving SSB over SSB supports). See Figure 5-11 and Figure 5-12. by moving SSB over SSB supports). See Figure 5-11 and Figure 5-12.

optional WiFi module: a defective WiFi module can give reboots or no start-up of the SSB. In this case do a trial without WiFi module.

the LCD display. Check if flat cables are fitted correctly before closing the connector lock.

Power supply connector must “snap” into the socket.

Some SSB’s will start-up in software upgrad e mode, and software needs to b e installed before you can program the Display Optio n codes. It’s adviced to use an autorun.upg file for software upgrade, this in case you have no OSD on the screen.

Use blind service mode “062598” + “Home” button, directly followed by the Display Option code (3 digits). Set will switch to Standby after Display Option code is entered.

Programming “Set type” and “Serial number ” i s ma nda to ry to ha ve al l fun c tionality of the set, like DLNA, Net TV… For certain sets you may need to use ComPair for this.

Validity of HDCP, CI+, Marlin, and WDRM keys can be checked via ComPair.

Even when the SSB already has the latest softwar e, it is mand atory to upgra de again the software to update the 200 Hz T-CON part. At the end of the main software update process, a dedicated software is loaded, from the main processor via the LVDS connection, to upgrade the 200 Hz T-CON part. For certain LCD displays, a dedicated Display software patch (autoscript) is available. See General Service info GSC_85590.

Check the two power connectors 1M95 and 1M99. Bad contact or bad connection here can give reboots.

It is mandatory to fill in the E-DDF form (see the “At Your Service” web portal).

Special attention for Standby software: check if Standby software ID is matching wi th the D-RAM’s mounted on the SSB (2 × Elpida = 73, 4 × Elpida = 64, 2 × Hynix = 72, 4 × Hynix = 63).

Inform customer that previous recordings ma de on Memory Card (movi e download), USB, or Hard drive will be lost. USB or Hard drive needs to be re-formatted and matched with new SSB (WDRM Keys!).

Table 5-3 SSB replacement instructions

.

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Blue arrows: traces of friction

Red arrows: damaged components

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Figure 5-11 Mounting attention points [1/2] Figure 5-12 Mounting attention points [2/2]

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Service Modes, Error Codes, and Fault Finding

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START

C onnect the U SB stick to th e set,

go to SAM and save the current TV settings via “Upload to USB”

Set is still operating?

Yes

1.

Dismount the defective SSB.

2. Replace the SSB by a Service SSB.

Set behaviour?

Yes

No

Instruction note SSB replacement Q55x.x

Before starting:

- prepare a USB memory stick with the latest software

- download the latest Main Software (Fus) from www.p4c.philips.com

- unzip this file

- create a folder ”upgrades” in the root of a USB stick (size > 50 MB) and save the autorun.upg file in this "upgrades" folder. Note: it is possible to rename this file, e.g."Q54x_SW_version.upg"; this in case there are more than one "autorun.upg" files on the USB stick.

No picture displayed

Picture displayed

Set is starting up without software upgrade menu appearing on screen

Picture displayed

Set is starting up with software upgrade menu appearing on screen

Due to a possible wrong display option code in the received Service SSB (NVM), it’s possible that no picture is displayed. Due to this

the download application will not be shown either. This tree enables you to load the main software step-by-step via the UART logging on the PC (this for visual feedback).

Start-up the set

1) Start up the TV set, equiped with the Service SSB, and enable the U

ART logging on the PC.

2) The TV set will start-up automatically in the

download application if main TV software is not loaded.

3) Plug the prepared USB stick into the TV set. Follow the

instructions in the UART log file, press “Right” cursor key to enter

the list. Navigate to the “autorun.upg” file in the UART logging

printout via the cursor keys on the remote control. When the

correct file is selected, press “Ok”.

4) Press "Do

wn" cursor and “Ok” to start flashing the main TV software. Printouts like: “L: 1-100%, V: 1-100% and P: 1-100%” should be visible now in the UART logging.

5) Wait until the message “Operation successful !” is logged in

the UART log and remove all inserted media. Restart the TV set.

1) Plug the USB stick into the TV set and select the “autorun .upg” file in the display

ed browser.

2) Now the main software will be loaded automatically,

supported by a progress bar.

3) Wait until the message “Operation successful !” is displayed and remove all inserted media. Restart the TV set.

Set the correct “Display code” via “062598 -HOME- xxx” where

“xxx” is the 3 digit display panel code (see stic

ker on the side

or bottom of the cabinet)

After entering the “Display Option” code, the set is going to

Standby

(= validation of code)

Restart the set

Connect PC via the ComPair interface to Service connector.

Start TV in Jett mode (DVD I + (OSD))

Open ComPair browser Q54x

Program set type number, serial number, and display 12 NC

Prog

ram E - DFU if needed.

Go to SAM and reload settings

via “Download from USB” function.

In case of settings reloaded from USB, the set type, serial number, display 12 NC, are automatically stored when entering display options.

- Check if correct “display option” code is programmed.

- Verify “option codes” according to sticker inside the set.

- Default settings fo

r “white drive” > see Service Manual.

Q55x.E SSB Board swap – ER on behalf of VDS Updated 28-07-2011

If not already done:

Check latest software on Service website.

Update main and Stand-by software via USB.

Check and perform alignments in SAM according to the Service Manual. Option codes, colour temperature, etc.

Final check of all menus in CSM.

Special attention f

or HDMI Keys and Mac address.

Check if E - D F U is present.

End

Attention point for Net TV: If the set type and serial number are not filled in, the Net TV functionality will not work. It will not be possible to connect to the internet.

Saved settings on USB stick?

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Figure 5-13 SSB replacement flowchart

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Restart the set

Set is startin g up in Factory mode

Set is starting up in Factor y mod e?

Noisy picture with bands/lines is visible and the

RED LED is continuous on.

An “F” is displayed (and the HDMI 1

input is displayed).

- Press the “volume minus” button on the TVs local keyboard for 5 ~10 seconds

- Press the “SOURCE” button for 10 seconds until the “F” disappears from the screen or the noise on the screen is replaced by “blue mute”

The noise on the screen is replaced

with the blue mute or the “F” is disappeared!

Unplug the mains cord to verify the correct

disabling of the Factory mode.

Program display option code

via “062598 MENU”, followed by

the 3 digits code of the display

(this code can be found

on a sticker on - or inside - the set).

After entering “display option” code, the set is

going in stand-by mode (= validation of code)

Service Modes, Error Codes, and Fault Finding

2012-Sep-14

Figure 5-14 SSB replacement flowchart - Factory mode

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5.9 Software Upgrading

Always check for the latest software version on the service website in relation to the correct CTN!!!

5.9.1 Introduction

The set software and security keys are stored in a NANDFlash, which is connected to the Fusion processor.

It is possible for the user to upgrade the main software via the USB port. This allows replacement of a software image in a stand alone set, without the need of an E-JTAG debugger. A description on how to upgrade the main software can be found in the electronic User Manual.

Important: When the NAND-Flash must be replaced, a new SSB must be ordered, due to the presence of the security keys! (CI +, MAC address, ...). Perform the following actions after SSB replacement:

1. Set the correct option numbers (see rearcover sticker).

2. Update the TV software => see the eUM (electronic User Manual) for instructions.

3. Perform the alignments as described in chapter 6 (section

6.5 Reset of Repaired SSB

4. Check in CSM if Set type, MAC address are valid.

For the correct order number of a new SSB, always refer to the Spare Parts list!

).

Figure 5-15 SSB start-up

Automatic Software Upgrade

In “normal” conditions, so when there is no major problem with the TV, the main software and the default software upgrade application can be upgraded with the “AUTORUN.UPG” (FUS part of the one-zip file: e.g. QF1EU_0.88.0.0.zip). This can also be done by the consumers themselves, but they will have to get their software from the commercial Philips website or via the Software Update Assistant in the user menu (see eUM). The “autorun.upg” file must be placed in the root of the USB stick. How to upgrade:

1. Copy “AUTORUN.UPG” to the root of the USB stick.

2. Insert USB stick in the set while the set is operational. The set will restart and the upgrading will start automatically. As soon as the programming is finished, a message is shown to remove the USB stick and restart the set.

Manual Software Upgrade

In case that the software upgrade application does not start automatically, it can also be started manually. How to start the software upgrade application manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “OK” button on a Philips TV remote control or a Philips DVD RC-6 remote control (attention : not supported by use of RF4CE remote due to the fact this application is not running yet at the time of the “OK” request). Keep the “OK” button pressed while reconnecting the TV to the Mains/AC Power.

3. The software upgrade application will start.

5.9.2 Main Software Upgrade

• The “UpgradeAll.upg” file is only used in the factory.

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Attention!

In case the download application has been started manually, the “autorun.upg” will maybe not be recognized.

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What to do in this case:

1. Create a directory “UPGRADES” on the USB stick.

2. Rename the “autorun.upg” to something else, e.g. to “software.upg”. Do not use long or complicated names, keep it simple. Make sure that “AUTORUN.UPG” is no longer present in the root of the USB stick.

3. Copy the renamed “upg” file into this directory.

4. Insert USB stick into the TV.

5. The renamed “upg” file will be visible and selectable in the upgrade application.

Back-up Software Upgrade Application

If the default software upgrade application does not start (could be due to a corrupted boot sector) via the above described method, try activating the “back-up software upgrade application”. How to start the “back-up software upgrade application” manually:

1. Disconnect the TV from the Mains/AC Power.

2. Press the “CURSOR DOWN”-button on a Philips TV remote control while reconnecting the TV to the Mains/AC Power.(attention : not supported by use of RF4CE remote due to the fact this application is not running yet at the time of the “CURSOR-DOWN” request).

3. The back-up software upgrade application will start.

5.9.3 Standby Software Upgrade via USB

Service Modes, Error Codes, and Fault Finding

In this chassis it is possible to upgrade the Standby software via a USB stick. The method is similar as upgrading the main software via USB. Use the following steps:

1. Create a directory “UPGRADES” on the USB stick.

2. Copy the Standby software (one-zip file StandbyUpgrade, e.g. StandbyFactory_61.0.0.00_13.00.00.upg) into this directory.

3. Insert the USB stick into the TV.

4. Start the download application manually (see section “

Manual Software Upgrade”.

5. Select the appropriate file and press the “OK” button to upgrade.

5.9.4 Content and Usage of the One-Zip Software File

Below the content of the One-Zip file is explained, and instructions on how and when to use it.

• BLCtrlFPGA_QF1EU_x.x.x.x.zip. Contains the BLCtrlFPGA software in “upg” format.SW version available in CSM 2.5 FPGA video version.Attention : no power interruption allowed during the upgrade process (upgrade not full proof).

• FUS_QF1EU_x.x.x.x.zip. Contains the “autorun.upg” which is needed to upgrade the TV main software and the software download application.

• StandbyUpgrade_QF1EU_x.x.x.x.zip. Contains the StandbyFactory software in “upg” format.

• ProcessNVM_QF1EU_x.x.x.x.zip. Default NVM content. Must be programmed via ComPair or can be loaded via USB, be aware that all alignments stored in NVM are overwritten here.

5.9.5 UART logging 2K12 (see section “5.8 Fault Finding and

Repair Tips, 5.8.6 Logging)

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6. Alignments

Index of this chapter:

6.1 General Alignment Conditions

6.2 Hardware Alignments

6.3 Software Alignments

6.4 Option Settings

6.5 Reset of Repaired SSB

6.6 Total Overview SAM modes

6.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region): – AP-NTSC: 120 VAC or 230 V – AP-PAL-multi: 120 - 230 V – EU: 230 V

/ 50 Hz ( 10%).

AC

– LATAM-NTSC: 120 - 230 V – US: 120 V

/ 60 Hz ( 10%).

AC

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to AUDIO_GND). Caution: It is not allowed to use heat sinks as ground.

• Test probe: Ri > 10 M, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform alignments.

6.1.1 Alignment Sequence

• First, set the correct options: – In SAM, select “Option numbers”. – Fill in the option settings for “Group 1” and “Group 2”

according to the set sticker (see also paragraph 6.4

Option Settings).

– Press OK on the remote control before the cursor is

moved to the left.

– In submenu “Option numbers” select “Store” and press

OK on the RC.

•OR: – In main menu, select “Store” again and press OK on

the RC.

– Switch the set to Stand-by.

• Warming up (>15 minutes).

6.2 Hardware Alignments

Not applicable.

6.3 Software Alignments

Put the set in SAM mode (see Chapter 5. Service Modes, Error

Codes, and Fault Finding). The SAM menu will now appear on

the screen. Select ALIGNMENTS and go to one of the sub menus. The alignments are explained below. The following items can be aligned:

• White point

• Ambilight.

• TCON alignment : not applicable

• Reset TCON alignment : not applicable

To store the data:

• Press OK on the RC before the cursor is moved to the

left

• In main menu select “Store” and press OK on the RC

• Switch the set to stand-by mode.

For the next alignments, supply the following test signals via a video generator to the RF input:

• EU/AP-PAL models: a PAL B/G TV-signal with a signal strength of at least 1 mV and a frequency of 475.25 MHz

• US/AP-NTSC models: an NTSC M/N TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

/ 50 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

/ 50 Hz ( 10%).

AC

Alignments

6.3.1 White Point

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EN 39QFU1.1E LA 6.

• LATAM models: an NTSC M TV-signal with a signal strength of at least 1 mV and a frequency of 61.25 MHz (channel 3).

• Choose “Home”, “Setup”, “TV Settings” and then “Picture” and set picture settings as follows:

Picture Setting

Contrast 100 Brightness 50 Colour 0 Light Sensor Off Picture format Unscaled

• In menu “Picture”, choose “Pixel Precise HD” and set picture settings as follows:

Picture Setting

Dynamic Contrast Off Dynamic Backlight Off Colour Enhancement Off Gamma (advanced) 0

• Go to the SAM and select “Alignments”-> “White point”.

White point alignment LCD screens:

• Use a 100% white screen (format: 720p50) to the HDMI input and set the following values: – “Colour temperature”: “Cool”. – All “White point” values to: “127”.

In case you have a colour analyser:

• Measure, in a dark environment, with a calibrated contactless colour analyser (Minolta CA-210 or Minolta CS-200) in the centre of the screen and note the x, y value.

• Change the pattern to 90% white screen. If a Quantum Data generator is used, select the “GreyAll” test pattern at level = 230.

• Adjust the correct x, y coordinates (while holding one of the White point registers R, G or B on 127) by means of decreasing the value of one or two other white points to the correct x, y coordinates (see Table 6-1 White D alignment

values - LED - Minolta CA-210, or 6-2 White D alignment values - LED - Minolta CS-200). Tolerance: dx:  0.002, dy:

 0.002.

• Repeat this step for the other colour temperatures that need to be aligned.

• When finished press OK on the RC and then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-1 White D alignment values - LED - Minolta CA-210

Value Cool (9800K) Normal (8250K) Warm (6190K)

xtbd tbd tbd ytbd tbd tbd

Table 6-2 White D alignment values - LED - Minolta CS-200

Value Cool (11000K) Normal (9000K) Warm (6500K)

xtbd tbd tbd ytbd tbd tbd

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production.

• Select a COLOUR TEMPERATURE (e.g. COOL, NORMAL, or WARM).

• Set the RED, GREEN and BLUE default values according to the values in Table 6-3

.

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EN 40 QFU1.1E LA6.

Alignments

• When finished press OK on the RC, then press STORE (in the SAM root menu) to store the aligned values to the NVM.

• Restore the initial picture settings after the alignments.

Table 6-3 White tone default settings 40"

White Tone e.g. 40PFLx007/x Colour Temp R G B

Normal 127 99 95 Cool 127 107 115 Warm 127 90 58

Table 6-4 White tone default settings 42"

White Tone 42PFL6907 Colour Temp R G B

Normal 123 125 101 Cool 115 124 118 Warm 127 116 58

Table 6-5 White tone default settings 46"

White Tone e.g. 46PFLx007/x Colour Temp R G B

Normal 127 92 95 Cool 127 100 113 Warm 127 83 59

Table 6-6 White tone default settings 46"

4. Select the number of the module that have to be aligned. Module 1 is the first one which will come across according the wiring path, starting at the small signal panel, proceeding towards the ambient light modules one by one after the other. The first module will be attached to the next module 2. Module number 2 to number 3 etc. Herewith the way to define the ambilight module numbering.

5. Align the brightness, use as reference the neighbouring modules output. Adjust now by eye side, the brightness is automatically stored.

6. Select one of 10 matrixes which color matches most with the neighbouring modules. (see table “6-10 Overview

matrix correction table).

7. The alignment is stored automatically (tip: don’t switch off the set immediately after the alignment is done, automatic storage can require a time frame of 10 seconds).

Table 6-10 Overview matrix correction table

Matrix # fR fG fB

Matrix 0 1 1 1 Matrix 1 1 0.9 0.9 Matrix 2 0.9 1 0.9 Matrix 3 0.9 0.9 1 Matrix 4 0.9 1 1 Matrix 5 1 0.9 1 Matrix 6 1 1 0.9 Matrix 7 0.95 1 1 Matrix 8 1 0.95 1 Matrix 9 1 1 0.95

White Tone e.g. 46PFL9707/x Colour Temp R G B

Normal 127 111 87 Cool 125 121 106 Warm 127 98 55

Table 6-7 White tone default settings 47"

White Tone 47PFL6907 Colour Temp R G B

Normal 127 89 92 Cool 127 94 116 Warm 127 77 50

Table 6-8 White tone default settings 55"

White Tone e.g. 55PFLx007/x Colour Temp R G B

Normal 127 90 88 Cool 127 97 110 Warm 127 78 50

Table 6-9 White tone default settings 60"

White Tone e.g. 60PFL9607/x Colour Temp R G B

Normal 126 119 99 Cool 119 122 122 Warm 127 102 63

6.3.2 Ambilight

Each ambient light module is aligned by a matrix and by the brightness. After replacement of a spare module, the brightness/color can be adjust/fine-tuned according the neighbouring modules.

1. Go to SAM.

2. Select “Alignments”.

3. Select “Ambilight”. A white test pattern shall be displayed by the ambilight modules.

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6.3.3 TCON alignment (not applicable)

6.4 Option Settings

6.4.1 Introduction

The microprocessor communicates with a large number of I ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address.

Notes:

• After changing the option number(s), save them by pressing the “OK” button on the RC before the cursor is moved to the left, select “STORE” in the SAM root menu and press “OK” on the RC.

• The new option setting is only active after the TV is switched “off” / “stand-by” and “on” again with the mains switch (the NVM is then read again).

6.4.2 (Service) Options

From 2011 onwards, it is not longer possible to change individual option settings in SAM. Options can only be changed all at once by using the option codes as described in section

.

6.4.3

6.4.3 Opt. No. (Option numbers)

Select this sub menu to set all options at once (expressed in two long strings of numbers). An option number (or “option byte”) represents a number of different options. When you change these numbers directly, you can set all options very quickly. All options are controlled via eight option numbers. When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set both option number lines. You can find the correct option numbers on the rearcover sticker from the TV set. Example: The options sticker gives the following option numbers:

• Group 1 : 08192 00133 01387 45160

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• Group 2 : 12232 04256 00164 00000 The first line (group 1) indicates hardware options 1 to 4, the second line (group 2) indicate software options 5 to 8. Every 5-digit number represents 16 bits (so the maximum value will be 65536 if all options are set). When all the correct options are set, the sum of the decimal values of each Option Byte (OB) will give the option number.

Diversity

Not all sets with the same Commercial Type Number (CTN) necessarily have the same option code! Use of Alternative BOM => an alternative BOM number usually indicates the use of an alternative display or power supply. This results in another display code thus in another Option code. Refer to Chapter 2. Technical Specs, Diversity, and

Connections.

6.4.4 Option Code Overview

Refer to the rearcover sticker in the set for the correct option codes. Important: after having edited the option numbers as described above, you must press OK on the remote control

before the cursor is moved to the left!

6.5 Reset of Repaired SSB

A very important issue towards a repaired SSB from a Service repair shop (SSB repair on component level) implies the reset of the NVM on the SSB. A repaired SSB in Service should get the service Set type “00PF0000000000” and Production code “00000000000000”. Also the virgin bit needs to be set. To set all this, you can use the ComPair tool or use the “NVM editor” and “Setup => TV settings => General settings => Reinstall TV” (virgin mode).

access to the Smart TV portals. The loading of the CTN and production code can also be done via ComPair (Model number programming).

After a SSB repair, the original channel map can be restored, provided that the original channel map was stored on a USB stick before repair was commenced and that basic functionality of the TV, needed for this procedure, was not hampered as a result of the defect. The procedure of “channel map cloning” is clearly described in the (electronic) user manual.

6.5.1 SSB identification

Whenever ordering a new SSB, it should be noted that the correct ordering number (12nc) of a SSB is located on a sticker on the SSB. The format is <12nc SSB><serial number>. The ordering number of the correct “Service” SSB is the one preceded by the letter “S” in case 2 or more ordering numbers are present on the bar code sticker.

After a repaired SSB has been mounted in the set (set repair on board level), the type number (CTN) and production code + 12NC’s (SSB, display and supply) of the TV has to be set according the type plate of the set (no info on 12NC’s here). For this, you can use the NVM editor in SAM. This action also ensures the correct functioning of the “Smart TV” feature and

Figure 6-1 SSB identification

6.6 Total Overview SAM modes

Table 6-11 SAM mode overview

Main Menu Sub-menu 1 Sub-me nu 2 Sub-menu 3 Description

Hardware Info A. SW version e.g. “QF1EU_0.9.1.0 Display TV & Stand-by SW version and CTN serial

B. Stand-by processor version e.g. “STDBY_83.84.0.0” C. Production code e.g. “see type plate”

Operation hours Displays the accumulated total of operation hours.TV

Errors Displayed the most recent errors Reset error buffer Clears all content in the error buffer Alignment White point Colour temperature Normal 3 different modes of colour temperature can be

Warm

Cool White point red LCD White Point Alignment. For values, White point green White point blue

Ambilight Select module

Brightness Select matrix

Option numbers Group 1 e.g. “00008.00001.15421.02239” The first line (group 1) indicates hardware options 1

Group 2 e.g. “44816.34311.33024.00000” The second line (group 2) indicates softwa re options

Store Store after changing Initialise NVM N.A. Store Select Store in the SAM root menu after making any

number

switched “on/off” & every 0.5 hours is increase one

selected

see Table 6-3 White tone default settings 40" to 6-5

White tone default settings 46"

to 4

5 to 8

changes

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EN 42 QFU1.1E LA6.

Main Menu Sub-menu 1 Sub-menu 2 Sub-menu 3 Description

Software maintenance Software events Display Display information is for development purposes

Hardware events Display Display information is for development purposes

Test setting Digital info Current frequency: 538

Install start frequency 000 Install start frequency from “0” MHz Install end frequency 999 Install end frequency as “999” MHz Default install frequency Installation Digital only Select Digital only or Digital + Analogue before

RF4CE pairing tables Clear paired remote control Development file

versions

Upload to USB Channel list Item “Channel list” removed from the user interface

Download from USB Channel list Item “Channel list” removed from the user interface

NVM editor Type number NVM editor; key-in and update Type number,

Development 1 file version Display parameters DISPT6.0.23.18 Display information is for development purposes

Development 2 file version 12NC one zip software Display information is for development purposes

Personal settings Option codes Alignments Identification data History list All (options included)

Personal settings Option codes Alignments Identification data All (options included!)

Production code 12NC SSB 12NC display 12NC supply

Alignments

Clear Test reboot Test kernel crash Test application crash

Clear

QAM modulation: 64-qam Display information is for development purposes Symbol rate: Original network ID: 12871 Network ID: 12871 Transport stream ID: 2 Service ID: 3 Hierarchical modulation: 0 Selected video PID: 35 Selected main audio PID: 99 Selected 2nd audio PID: 8191

Digital + Analogue

Acoustics parameters SNDPR0.0.3.6 PQ - FUSIO 6.1.4.13 Ambilight parameters PRFAM 6.1. 0.2 Temp comp parameters 2.0

Initial main software QF1EU_0.4.5.0 NVM version QF1EU_0.4.5.0 e-Sticker software

installation

Production code and 12NC’s after SSB repl a c em en t

2012-Sep-14

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7. Circuit Descriptions

USB

HUB

64/48

DDR 1GB

4 × 2Gb

FLASH

1GB

DVBC/T2

DVB-S2

Tuner

DVB-S2

Hybrid

Tuner

HDMI

9385

CI+

ETH

PHY

USB

DVB-T/C

ISDB-T

Analogue

NVM

Skype

Analogue

Inputs

USB

NR

DEI

PQ Enhancement

FRC

3D: Active

2D-3D conversion

Cell

FHD@240 CIN@240

8 × V-by-1 RGB

BL

3D

Backlight

8 ×

PWM

3D goggle drive

FPGA

Spartan 6

LX4

BL-PWM BL-I-CTRL

3D_LR

-LED

3D-IR

19210_064_120504.eps

120504

Index of this chapter:

7.1 Introduction

7.2 Power Supply

7.3 General Power Architecture

7.4 Back-End Processing

Notes:

•Only new circuits (circuits that are not published recently) are described.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the wiring-, block- (see chapter

9. Block Diagrams

10. Circuit Diagrams and PWB Layouts

necessary, you will find a separate drawing for clarification.

) and circuit diagrams (see chapter

). Where

Circuit Descriptions

7.1 Introduction

The QFU1.1E LA chassis is part of the FUSION platform and covers sets in the 69xx, 7xxx, 8xxx and 9xxx range.

7.1.1 FUSION 2011 Architecture Overview

For details about the chassis block diagrams refer to chapter 9. Block Diagrams architecture can be found in Figure 7-1

EN 43QFU1.1E LA 7.

. An overview of the FUSION 2012

and Figure 7-2.

Figure 7-1 Architecture of FUSION platform 2012 (69xx, 7xxx, 8xxx range)

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2012-Sep-14

EN 44 QFU1.1E LA7.

USB

HUB

64/48

DDR 1GB

4 × 2Gb

FLASH

1GB

DVBC/T2

DVB-S2

Tuner

DVB-S2

Hybrid

Tuner

HDMI

9385

CI+

ETH PHY

USB

DVB-T/C

ISDB-T

Analogue

NVM

Skype

Analogue

Inputs

USB

NR DEI

PQ Enhancement

FRC

3D: Active

2D-3D conversion

Cell

FHD@240 CIN@240

8 × V-by-1 RGB

BL

3D-IR

3D goggle

drive FPGA

Spartan 6

LX4

BL

3D_LR

3D-LED

BL-SPI

VS

BL - HDR

19210_063_120504.eps

120504

Circuit Descriptions

Figure 7-2 Architecture of FUSION platform 2012 (9xxx range)

2012-Sep-14

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7.1.2 SSB Cell Layout

19280_099_120503.eps

120503

VGA out

Scart dongle Hybrid tuner DVBS tuner

USB TS

HDMI ARC

HDMI

USB

CA+

Phones

Temperature sensor

Class D

DC-DC

Vx1 SC BL

Fusion SOC

DC-DC

HDMI

MUX

LAN

SPDIF

1M95 (PSU)

+12V AL (PSU)

BL dim (PSU)

To AL

(power + SPI)

UART

usb SKYPE

usb WIFI

analogue inputs

dongles

CTRL

SiS

L,R Subw

Circuit Descriptions

EN 45QFU1.1E LA 7.

Figure 7-3 SSB layout cells (top view)

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2012-Sep-14

EN 46 QFU1.1E LA7.

19280_100_120503.eps

120503

FPGA

Set NVM

SDM

CA+

Circuit Descriptions

Figure 7-4 SSB layout cells (bottom view)

2012-Sep-14

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7.2 Power Supply

19280_103_120504.eps

120504

AC-in

1M99/1M11

1M95

1M09

1308

1316 1319

Display

Ambi-light

SSB

1M54

19210_075_120504.eps

120504

PSU

STANDBY

+12V

PLF

Fusion

SoC

12V

Undervoltage

detect

POWER-OK

3V3stby

DETECT12V

AC in

Tcon

DC-DC

LCD-PWR-ONn

DC-DC

converters

LED driver

+3V3-STANDBY

Ethernet

PHY

switch +3V3-LAN

SPLASH-ON

STANDBYn

ENABLE-WOLAN

internal

Wifi dongle

AL

+3V3ALswitch

+3V3

ENABLE-3V3-AMBI

7.2.1 Power Supply Unit

All power supplies are a black box for Service. When any of these power supplies is defective, a new board must be ordered and the defective one must be returned, unless the main fuse of the board is broken. Always replace a defective fuse with one with the correct specifications! This part is available in the regular market. Consult the Philips Service web portal for the order codes of the boards.

7.3 General Power Architecture

For the power architecture refer to figure 7-5 and 7-6. For start-up steps (for trouble-shooting), refer to figure 7-7 start-up sequence is marked with numbers in red.

Circuit Descriptions

. The

EN 47QFU1.1E LA 7.

Figure 7-5 General power architecture

Figure 7-6 Functional supply overview

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2012-Sep-14

EN 48 QFU1.1E LA7.

10000_000full_090126.eps

091118

Circuit Descriptions

Figure 7-7 Functional power overview - power sequence

7.4 Back-End Processing

For the configuration, refer to Figure 7-8 to Figure 7-11.

2012-Sep-14

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Circuit Descriptions

19210_065_120504.eps

120507

EN 49QFU1.1E LA 7.

Figure 7-8 Back-end configuration xxPFL6xxx/xx series

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2012-Sep-14

EN 50 QFU1.1E LA7.

19210_066_120504.eps

120504

Circuit Descriptions

Figure 7-9 Back-end configuration xxPFL7xxx/xx & xxPFL8xxx/xx series

2012-Sep-14

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div. table

Circuit Descriptions

19210_067_120504.eps

120504

EN 51QFU1.1E LA 7.

Figure 7-10 Back-end configuration xxPFL9xxx/xx series

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2012-Sep-14

EN 52 QFU1.1E LA7.

19210_068_120504.eps

120504

Circuit Descriptions

Figure 7-11 Back-end configuration Platinum (Cinema) series

2012-Sep-14

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8. IC Data Sheets

This chapter shows the internal block diagrams and pin configurations of ICs that are drawn as “black boxes” in the electrical diagrams (with the exception of “memory” and “logic” ICs).

IC Data Sheets

EN 53QFU1.1E LA 8.

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2012-Sep-14

EN 54 QFU1.1E LA8.

19220_025_120227.eps

120227

Block diagram

Pinning information

TSIF

I2C IF

SCL SDA

RFAIN

TTUSCL TTUSDA

TAINP (IF)

TAINM (IF)

GPIO1 (PWM)

TIFAGC

XTALI

XTALO

41MHz or

20.5 MHz

IF+ IF-

(RFAGC-MON)

(RFAGC)

IFAGC

SCL

SDA

TUNER

MPEG

Decoder

TSCLK

TSVALID

TSSYNC

TSDATA7-0

TSCLK

TSVALID

TSSYNC

TSDATA7-0

SCL SDA

DVB-T2

Demodulator

LDPC/BCH

Decoder

Stream

Processor

RS Decoder

TS

Smoothing

DVB-T

Demodulator

DVB-C

Demodulator

OSC

PLL

10-bit

ADC

12-bit

ADC

AGC

GPIO

IC Data Sheets

8.1 Diagram 10-2-7 B02A, Tuner-channel decoder B02A, CXD2834 (IC7KC0)

2012-Sep-14

Figure 8-1 Internal block diagram and pin configuration

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9. Block Diagrams

Panel

1G51 51p

1M95

14 p

1M09

1M21

1M20

1316

1M99

8P

6p

20p

8M54

1M21

1M54

9p

/1M11 (4p)

1M95

1M99

14 p

1C21

FFC 18 p

SPI

FFC 15p

8P

1 F 53

1T71

1F00

1 G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

1C20/1C21 Local control

HDMI

Opto

SP

DIF

9p

5p 1.25mm

1D

35

3p

4p

Fan control or temp

sensor

41p

1G50 /

1G55

1E01

1R00

1A04 1A05

18p 18p

1D02

3p

Sub woofer

1C30

5p 1.25mm

4p

1

D 01

Speakers

1D11

8316

2p3

1308

inlet

Wifi

8C31

8G51

8M95

8308

8M99

8M20

8M21

8D01

Keyboard Control Panel

(1012)

E

A

MAIN POWER SUPPLY

(1050)

B

SSB

(1111)

Sensor

(1010)

J

(1004)

8801

8802

19210_097_120514.eps

120514

7000 series, 2 sided AmbiLight 40"

Board Level Repair

Component Level Repair

Only for authorized workshops

8A01

1A05 1A041A01

1

A

011A04

8A02

AmbiLight

(1164)

AL

AmbiLight

(1163)

AL

9.1 Wiring diagram 7000 series 40"

Block Diagrams

EN 55QFU1.1E LA 9.

2012-Sep-14

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9.2 Wiring diagram 8000 series 40"

Panel

1G51 51p

1M95

14 p

1M09

1M21

1M20

1316

1M99

8P

6p

20p

8M54

1M21

1M54

9p

/1M11 (4p)

1M95

1M99

14 p

1C21

FFC 18 p

SPI

FFC 15p

8P

1 F 53

1T71

1F00

1 G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

1C20/1C21 Local control

HDMI

Opto

SP

DIF

9p

5p 1.25mm

1D

35

3p

4p

Fan control or temp

sensor

41p

1G50 /

1G55

1E01

1R00

1A04 1A05

18p 18p

1D02

3p

Sub woofer

1C30

5p 1.25mm

4p

1

D 01

Speakers

1D11

8316

2p3

1308

inlet

Wifi

8C31

8G51

8M95

8308

8M99

8M20

8D01

Keyboard Control Panel

(1012)

E

A

MAIN POWER SUPPLY

(1050)

B

SSB

(1111)

Sensor

(1010)

J

(1004)

1

A

05

1A

04

1A01

1

A

01

1

A04

1A01 1A011A03 1A03

8A03

8A02

8A01

8A04

AmbiLight

(1163)

AL

AmbiLight

(1164)

AL

AmbiLight

(1172)

AL

AmbiLight

(1170)

AL

8802

8801

8M21

19210_098_120515.eps

120515

Board Level Repair

Component Level Repair

Only for authorized workshops

8000 series, 3 sided AmbiLight 40"

Block Diagrams

EN 56QFU1.1E LA 9.

2012-Sep-14

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9.3 Wiring diagram 6000 series 42"

1M95

1M99

14 p

1C21

FFC 18 p

SPI

FFC 15p

8P

1

F

53

1T71

1F

00

1G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

1C20/1C21 Local control

HDMI

Opto SP DIF

9p

5p 1.25mm

1D

35

3p

4p

Fan control or temp

sensor

41p

1G50/1G55

1E01

1R00

1A04 1A05

18p 18p

1D02

3p

Sub woofer

1C30

5p 1.25mm

4p

1 D 01

Speakers

1D11

B

SSB

(1111)

A

MAIN POWER SUPPLY

(1050)

Sensor

(1010)

J

1G51

51p

Woofer

Tweeter

8316

8M20

8308

Tweeter

1M21

11p FH52

1M20

3p HL

41p

1G50

1316

2p3

1308

245

× 245

6p

1M 09

8M95

8M99

13p

1M 9

5

14 p

1319

13p

8319

to Panel

8G50

8G51

inlet

1M 99

4p

Wifi

8C31

Panel

(1004)

8801

8802

1M21

8M21

Keyboard Control Panel

(1012)

E

19212_026_120913.eps

120913

6000 series, 2 sided AmbiLight 42"

Board Level Repair

Component Level Repair

Only for authorized workshops

8A01

1A05 1A041A01

1

A

011A04

8A02

AmbiLight

(1164)

AL

AmbiLight

(1163)

AL

Block Diagrams

EN 57QFU1.1E LA 9.

2012-Sep-14

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9.4 Wiring diagram 7000 series 46"

Sensor

(1010)

J

1G51 51p

8D01

8M20

1M21

8801

1M 21

1M95

1M99

14 p

1C 21

FFC 18 p

SPI

FFC 15p

8P

1

F 53

1T71

1F00

1 G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

5p

1C20/1C21 Local control

HDMI

Opto SP DIF

9p

5p 1.25mm

1D35

3p

4p

Fan control or temp

sensor

41p

1G50/

1 G 55

1E01

1R00

1A04

1A05

1D02

3p

Sub woofer

1C30

5p

4p

1D01

Speakers

1 D11

For possible

extra Audio

amplifier

inlet

Wifi

5p 1.25mm

8M99

8M95

1M95

14 p

1M09

1316

1M99

8P

6p

20p

8M54

1M54

9p

/1M11 (4p)

2p3

1308

8C31

8802

Panel

(1004)

A

MAIN POWER SUPPLY

(1050)

B

SSB

(1111)

8M21

8308

8G51

Keyboard Control Panel

(1012)

E

1M20

19210_099_120515.eps

120515

Board Level Repair

Component Level Repair

Only for authorized workshops

7000 series, 2 sided AmbiLight 46"

1A05

1A041A01

1

A01

1A

03

8A01

8802

8A02

AmbiLight

(1164)

AL

AmbiLight

(1163)

AL

Block Diagrams

EN 58QFU1.1E LA 9.

2012-Sep-14

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div. table

9.5 Wiring diagram 8000 series 46"

Sensor

(1010)

J

1G51 51p

8D01

8M20

1M21

8801

1M 21

1M95

1M99

14 p

1C 21

FFC 18 p

SPI

FFC 15p

8P

1

F 53

1T71

1F00

1 G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

5p

1C20/1C21 Local control

HDMI

Opto SP DIF

9p

5p 1.25mm

1D35

3p

4p

Fan control or temp

sensor

41p

1G50/

1 G 55

1E01

1R00

1A04

1A05

1D02

3p

Sub woofer

1C30

5p

4p

1D01

Speakers

1 D11

For possible

extra Audio

amplifier

inlet

Wifi

5p 1.25mm

8M99

8M95

1M95

14 p

1M09

1316

1M99

8P

6p

20p

8M54

1M54

9p

/1M11 (4p)

2p3

1308

8C31

8802

Panel

(1004)

A

MAIN POWER SUPPLY

(1050)

B

SSB

(1111)

8M21

8308

8G51

Keyboard Control Panel

(1012)

E

1M20

19210_100_120515.eps

120515

Board Level Repair

Component Level Repair

Only for authorized workshops

8000 series, 3 sided AmbiLight 46"

1A05

1A041A01

1A011A03

1A01

1A03

03

8A03

8A01

8802

8A028A04

AmbiLight

(1164)

AL

AmbiLight

(1170)

AL

AmbiLight

(1172)

AL

AmbiLight

(1163)

AL

Block Diagrams

EN 59QFU1.1E LA 9.

2012-Sep-14

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9.6 Wiring diagram 9000 series 46"

Keyboard Control Panel

(1012)

E

Sensor

(1010)

J

Board Level Repair

Component Level Repair

Only for authorized workshops

inlet

8408

1M95

14 p

1M09

2p3

1308

1319

1316

1M99

6p

12p

14p

1

M 21

8p

Wifi

5p 1.25mm

1G51

51p

1316

I 2S

1319

15p FFC 0.5 mm Hirose

14p

8801

8802

8M20

1M21

1M20

8319

8316

8M99

8M95

8F53

1M95

1M99

14 p

FFC 18 p

SPI

FFC 15p

8P

1 F 53

1T71

1F

00

1G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

1C20/1C21 Local control

HDMI

Opto

SP DIF

9p

5p 1.25mm

1D

35

3p

4p

Fan control or temp

sensor

41p

1G50/1G55

1E01

1R00

1A04 1A05

18p 18p

1D 02

3p

Sub woofer

1C30

5p 1.25mm

4p

1 D 01

Speakers

1D11

B

SSB

(1111)

8151

1C21

A

MAIN POWER SUPPLY

(1050)

B

8121

8C31

19212_027_120913.eps

120913

9000 series, 3 sided AmbiLight 46"

W

5

25

1

A

05

1A

04

1A01

1

A

01

1

A04

1A01 1A011A03

1A03

8A03

8A02

8A01

8A04

AmbiLight

(1163)

AL

AmbiLight

(1164)

AL

AmbiLight

(1172)

AL

AmbiLight

(1170)

AL

Block Diagrams

EN 60QFU1.1E LA 9.

ifi

2012-Sep-14

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9.7 Wiring diagram 6000 series 47"

Sensor

(1010)

J

11p FH52

3p HL

1G51

51p

Woofer

Tweeter

8M20

Tweeter

41p

8319

inlet

Temp sensor

1T02

1M21

1M20

1316

2p3

1308

6p

1 M09

13p

1 M 95

14 p

1319

13p

1 M99

4p

41p

1G50

Wifi

1M95

1M99

14 p

1C21

FFC 18 p

SPI

FFC 15p

8P

1 F 53

1T71

1F

00

1G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

1C20/1C21 Local control

HDMI

Opto SP DIF

9p

5p 1.25mm

1D

35

3p

4p

Fan control or temp

sensor

41p

1G50/1G55

1E01

1R00

1A04 1A05

18p 18p

1D02

3p

Sub woofer

1C30

5p 1.25mm

4p

1 D 01

Speakers

1D11

B

SSB

(1111)

Panel

(1004)

A

MAIN POWER SUPPLY

(1050)

8801

8316

8G50

8G51

8802

8C31

8M99

8M95

8T71

8308

19212_028_120914.eps

120914

6000 series, 2 sided AmbiLight 47"

Board Level Repair

Component Level Repair

Only for authorized workshops

8A01

1A05 1A041A01

1

A

011A04

8A02

AmbiLight

(1164)

AL

AmbiLight

(1163)

AL

1M21

Keyboard Control Panel

(1012)

E

8M21

Block Diagrams

EN 61QFU1.1E LA 9.

soTemp se

2012-Sep-14

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9.8 Wiring diagram 7000 series 55"

Keyboard Control Panel

(1012)

E

Sensor

(1010)

J

2p3

1308

6p

1M09

1M95

1

M 99

14 p

8P

8M99

8M95

1M95

1M99

14 p

1C 2

1

SPI

FFC 15p

8P

1F53

1T71

1F00

1G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

5p

HDMI

Opto

SP DIF

9p

1D35

3p

4p

Fan control or temp

sensor

41p

1

G50/1G55

1E01

1R00

1A04 1A05

.

1 D02

3p

Sub woofer

1C30

6p

4p

1D01

Speakers

1D 11

For possible extra Audio

amplifier

8G51

8308

1M54

9p

1316

20p

1

M 21

1G51 51p

1M20

1M21

inlet

8M20

Wifi

5p 1.25mm

8D01

8316

8M54

8C31

8801

8M21

8802

Panel

(1004)

B

SSB

(1111)

A

MAIN POWER SUPPLY

(1050)

19210_101_120515.eps

120515

Board Level Repair

Component Level Repair

Only for authorized workshops

7000 series, 2 sided AmbiLight 55"

AmbiLight

(1164)

AL

AmbiLight

(1163)

AL

1A05

1A04

1A01

1 A05

1A041

A01

8A02

8A01

Block Diagrams

EN 62QFU1.1E LA 9.

2012-Sep-14

back to

div. table

9.9 Wiring diagram 8000 series 55"

Keyboard Control Panel

(1012)

E

Sensor

(1010)

J

2p3

1308

6p

1M09

1M95

1

M 99

14 p

8P

8M99

8M95

1M95

1M99

14 p

1C 2

1

SPI

FFC 15p

8P

1F53

1T71

1F00

1G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

5p

HDMI

Opto

SP DIF

9p

1D35

3p

4p

Fan control or temp

sensor

41p

1

G50/1G55

1E01

1R00

1A04 1A05

.

1 D02

3p

Sub woofer

1C30

6p

4p

1D01

Speakers

1D11

For possible extra Audio

amplifier

8G51

8308

1M54

9p

1316

20p

1

M 21

1G51 51p

1M20

1M21

inlet

8M20

Wifi

5p 1.25mm

8D01

8316

8M54

8C31

8801

8M21

8802

Panel

(1004)

B

SSB

(1111)

A

MAIN POWER SUPPLY

(1050)

19210_102_120515.eps

120515

Board Level Repair

Component Level Repair

Only for authorized workshops

8000 series, 3 sided AmbiLight 55"

1A01

1A03

1A01

1A03

1A05

1

A

01

1A

03

1

A01

1A

03

1

A

05

1A01 1A03

1A05

1A01

1A03

1A05

1A01

1A03

1A05

8A03

8A06

8A07

8A01

8A02

8A04

8A05

AmbiLight

(1176)

AL AL

AmbiLight

(1175)

AL

AmbiLight

(1172)

AL

AmbiLight

(1171)

AL

AmbiLight

(1170)

AL

AmbiLight

(1173)

AL

Block Diagrams

EN 63QFU1.1E LA 9.

2012-Sep-14

back to

div. table

9.10 Wiring diagram 9000 series 60"

Keyboard Control Panel

(1012)

E

Sensor

(1010)

J

1M95

1M99

14 p

1C 2

1

SPI

FFC 15p

8P

1F53

1T71

1F00

1G 51

Conditionnal access

HDMI

VGA

Phono

HDMI

USB

HDMI

51p

1M54

1C31

To Wifi USB

5p

HDMI

Opto SP DIF

9p

1D35

3p

4p

Fan control or temp

sensor

41p

1G50/1G55

1E01

1R00

1A04 1A05

.

1 D02

3p

Sub woofer

1C30

6p

4p

1D01

Speakers

1D 11

For possible extra Audio

amplifier

1

M 21

1M20

1M21

B

SSB

(1111)

1G51

51p

inlet

I 2S

14p 1.25mm

15 FFC 0.5 mm Hirose

1319/CN101

1316/CN102

1M95

14 p

1M09

2p3

1308

8121

1319

1316

6p

12p

14p

Wifi

5p 1.25mm

LED drivers

1M99

8p

8C31

12p 1.5mm

8F53

8D01

8319

8316

8408

8120

8151

8M95

8M99

Panel

(1004)

19212_029_120914.eps

120914

Board Level Repair

Component Level Repair

Only for authorized workshops

9000 series, 3 sided AmbiLight 60"

1A041A05

1A02

1A04

1A02

1A05

1

A

02

1A

03

1A

04

1

A04

1A

05

1

A

02

1A04 1A02

1A05

1A04

1A03

1A05

1A04

1A02

1A05

AmbiLight

(1176)

AL

AmbiLight

(1174)

AL

AmbiLight

(1175)

AL

AmbiLight

(1172)

AL

AmbiLight

(1171)

AL

AmbiLight

(1170)

AL

AmbiLight

(1173)

AL

A

C

3

o

8A02

8A01

8A03

8A04

8A05

8A06

8A07

A

MAIN POWER SUPPLY

(1050)

Block Diagrams

EN 64QFU1.1E LA 9.

n

2012-Sep-14

back to

div. table

VIDEO

B02B

DVBS-FE

B02A

TUNER-CHANNEL DECODER

B02A

TUNER-CHANNEL DECODER

B06M

FE

ONLY **PFL***7/K**

ONLY **PFL***7/T**

B06A

HDMI

B03x

FUSION

B05B

ANALOGUE EXTERNALS

B06G

ANALOGUE EXTERNALS

B04F

AUDIO-VIDEO

B07D

CI

B06L

CONDITIONAL ACCESS

B04B

V-BY-ONE OUT

B06C

USB

B07C

USB INTERN

NO SKYPE

WITH SKYPE

UMAC 0 DDR3

B03D

UMAC 1 DDR3

B03C

19210_002_120313.eps

120419

M1-MA(0-15)

D(8-15)

M1-MD(0-15)

M0-MA(0-31)

D(0-15)

D(16-31)

M0-MD(0-15)

TS-CHDEC-VALID

TS-CHDEC-SOP TS-CHDEC-CLK

TS-CHDEC-DATA

TS-CHDEC-VALID TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

TS-INT-VALID

TS-INT-SOP

TS-INT-CLOCK

TS-INT-DATA

IP IM

XTAL

QP

QM

AGC

IF_AGC IF-N-DVBT2 IF-P-DVBT2

SOC-IF-AGC

IF-IN-P

IF-IN-N

ERX2+

ERX2-

ERX1+

ERX1-

ERX0+

ERX0-

ERXC+

ERXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

HDMIF-RXC+ HDMIF-RXCHDMIF-RX0+

HDMIF-RX0-

HDMIF-RX1+

HDMIF-RXC+

HDMIF-RX1-

HDMIF-RX2+

HDMIF-RX2-

SC1-R

SC1-B

SC1-G

SC1-CVBS

PB1-IN

Y1-IN

PR1-IN

R1-VGA G1-VGA B1-VGA

H-SYNC-VGA

V-SYNC-VGA

PR-R3 Y-G 3 PB-B3 CVBS3

SC1-STATU S

FS1

SC1-BLK

FB1

PR-R1 Y-G1

PB-B1

PCHS PCVS

Y-G2

DRXC-

DRX0-

PR1-IN

PB-B2

PR-R2

CVBS1

CVBS1 CVBS

+5VCA

+3V3

CA-MDO(0-7)

MDO(0-7)

CA-MDI(0-7)

CA-D(0-7)

CA-A(0-13)

MDI(0-7)

USB-MAIN-DM

USB-MAIN-DP

USB-PORTA-DM USB-PORTA-DP

+5V-PORTA

USB-PORTB-DM

USB-PORTB-DP

+5V-PORTB

USB-SET-DM USB-SET-DP

USB1-DM

USB1-DP

USB-MAIN-DM

USB-MAIN-DP

USB2-DM USB2-DP

cEC0

cEC1

+5V-HDD

USB-WIFI-DM USB-WIFI-DP

+3V3-LAN

USB-CAM-DM

USB-CAM-DP

+5V

D(0-7)

SDRAM 256Mx8

7J01 H5TQ2G83BFR

SDRAM 256Mx8

7J02 H5TQ2G83BFR

SDRAM

128Mx16

7J03 H5TQ2G63BFR

SDRAM

128Mx16

7J04 H5TQ2G63BFR

AC29 AC30

2VWB

7HA0 SII9387ACT

HDMI

SWITCH

R1X

R4X

R2X

R3X

6 5 4

3

2 1

100

99

15 14 13 12 11 10

9

8

24 23 22 21 20 19 18 17

33 32 31 30

29 28 27 26

19

1

18 2

HDMI 5

CONNECTOR

19

1

18 2

HDMI 2

CONNECTOR

19

1

18 2

HDMI 3

CONNECTOR

19

1

18 2

HDMI 4

CONNECTOR

TXC_N

TXC_P

TX0_N

TX0_P

TX1_N

TX1_P

TX2_N

TX2_P

1

1H05

3

4

7

9 10 12

6

1

1H04

3

4

7

9 10 12

6

1

1H03

3

4

7

9 10 12

6

1

1H02

3

4

7

9 10 12

6

21

7RA0 STV6110A

DVB-S

TUNER

7RA1 STV0903BAC

DVB-S

CHANNEL

DECODER

7

SAT IN

20

8

48

37

32

122

18

12

19

11

2

16

78 75 74 73

4

3

5

8

4

2FS2

3FA3

1F00 SUT-RE214Z

IF2-_P

MAIN HYBRID

TUNER

7

8

RF IN

1RA0

16M

31

30

9RC2-1

9RC2-4

9RC2-2

9RC2-3

1R01

7KC0 CXD2834R

DVBT2

CHANNEL

DECODER

38

9

5FA4

5FA5

AGC2

2FS1

IF2-_N

3FA4

3KA1

5KC9

5KC8

3KA0

IF1-_N

IF1-_P

2

3

5KC0

5KC1

2KCE

2KCF

3KCB 3KCA

AGC1

4

7FA1,2

EF

5FS1

5FS2

R0X

97 96 95 94 93 92 91 90

19

1

18 2

HDMI 1

CONNECTOR

1

1H01

3

4

7

9 10 12

6

7J00 FUSION240

TS_TSB_MCU

B03A

TSSDEN TSSSYNC TSSCLK TSSDI

T26 U30 U29 U28

IN_P

F30

IN_N

F29

TAGCO_IF

F27

80 81

`82

87

83

85

86

84

B30 C30 A29 B29 A28 B28 A27 B27

AV_IN_OUT

B03E

RXC_P

RXC_N RX0_P RX0_N RX1_P RX1_N RX2_P RX2_N

SCART

YPBPR

1

6

10

11

5

15

VGA

CONNECTOR

18

14

5

1VA1

9

17

10

1VA5

2

3

14

13

1VA8

2VW9 2VWA 2VW2

C18 C20 C19 B16

PR-R3 Y-G 3

PB-B3 CVBS3

9VW4

FS1

C17

3VWW

B17

FB1

2VW5 2VW3 2VW4

9VW1 9VW2

PR_R1 Y_G1

PB_B1

A18 A20 A19

TS_TSB_MCU

B03A

PCHS PCVS

J28 J27

3VA9 3VAD

3VAH 3VAJ

2VW6

2VW7

2VW8

AV_IN_OUT

B03E

Y_G2

B20

cVC4

cVC5

C2S2

C2S8

PB_B2

B19

PR_R2

B18

CVBS

2VW1

1VA4

CVBS1

C15

PCMCIA

CONDITIONAL

ACCESS

20

7PA1,2 74LVC245APW

BUFFER

1P00

68P

51 52

18

17

3PW2,3

FLASH CI_GPIO

B03A

FRDx_PODDx

FRDx_PODAx

TS_TSB_MCU

B03A

TS1Dx

TS2ODx

PANEL_USB LAN_IO

B03E

TX0,1

TX2,3

TX4,5

TX6,7

VbyOne

TO DISPLAY

1G55

41

8

PANEL_USB LAN_IO

B03E

AB29

AB30

D1_P

D1_N

1

11

10

2

6

3

4

2

1

3

1E03

4

7EA0 CY7C65632

USB

HUB

1EA0

12M

7

2

1

3

1E02

4

12 13

PANEL_USB LAN_IO

B03E

cEC2

cEC4

D2_P

D2_N

2

1

3

1E01

4

11

10

7EH1 CY7C65634

1EH1

12M

6 7

2

1

3

1C31

4

USB HUB

1 2

3

4

2

1

3

1C30

4

9EHA

9EHB

1

FUSION

UMAC

CONTROLLER

M1-MD

M1-MA

M0-MD

M0-MA

DDR3

B03B

PIN NUMBERING

PANEL DEPENDANT

9.11 Block Diagram Video

Block Diagrams

EN 65QFU1.1E LA 9.

2012-Sep-14

back to

div. table

AUDIO

B02B

DVBS-FE

B02A

TUNER-CHANNEL DECODER

B02A

TUNER-CHANNEL DECODER

B06M

FE

ONLY **PFL***7/K**

ONLY **PFL***7/T**

B06A

HDMI

B03x

FUSION

B05B

ANALOGUE EXTERNALS

B06G

ANALOGUE EXTERNALS

B04F

AUDIO-VIDEO

B07D

CI

B06L

CONDITIONAL ACCESS

B06C

USB

B07C

USB INTERN

NO SKYPE

WITH SKYPE

UMAC 0 DDR3

B03D

UMAC 1 DDR3

B03C

19210_004_120412.eps

120412

B05A

CLASS-D AMPLIFIER

PASSIVE 2.1

ACTIVE 2.1

B07B

HEADPHONE

B06Q

CONTROL

B01A

B06Q

B05A

B07B

B06B

HDMI-ARC

B06B

B06Q B06Q

B06Q

B06P

HDMI

B06K

AUDIO

SOUND

IN

STAND

B06B B06B

B06B

+3V3

SPDIFO

HARC0

M1-MA(0-15)

D(8-15)

M1-MD(0-15)

M0-MA(0-31)

D(0-15)

D(16-31)

M0-MD(0-15)

TS-CHDEC-VALID

TS-CHDEC-SOP TS-CHDEC-CLK

TS-CHDEC-DATA

TS-CHDEC-VALID TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

TS-INT-VALID

TS-INT-SOP

TS-INT-CLOCK

TS-INT-DATA

IP IM

XTAL

QP

QM

AGC

IF_AGC IF-N-DVBT2 IF-P-DVBT2

SOC-IF-AGC

IF-IN-P

IF-IN-N

ERX2+

ERX2-

ERX1+

ERX1-

ERX0+

ERX0-

ERXC+

ERXC-

BRX2+

BRX2-

BRX1+

BRX1-

BRX0+

BRX0-

BRXC+

BRXC-

CRX2+

CRX2-

CRX1+

CRX1-

CRX0+

CRX0-

CRXC+

CRXC-

DRX2+

DRX2-

DRX1+

DRX1-

DRX0+

DRX0-

DRXC+

DRXC-

ARX2+

ARX2-

ARX1+

ARX1-

ARX0+

ARX0-

ARXC+

ARXC-

HDMIF-RXC+ HDMIF-RXCHDMIF-RX0+

HDMIF-RX0-

HDMIF-RX1+

HDMIF-RXC+

HDMIF-RX1-

HDMIF-RX2+

HDMIF-RX2-

SC-RIN

SC-LIN

AR-4 AL-4

VGA-RIN

+5VCA

+3V3

CA-MDO(0-7)

MDO(0-7)

CA-MDI(0-7)

CA-D(0-7)

CA-A(0-13)

MDI(0-7)

USB-MAIN-DM

USB-MAIN-DP

USB-PORTA-DM USB-PORTA-DP

+5V-PORTA

USB-PORTB-DM

USB-PORTB-DP

+5V-PORTB

USB-SET-DM USB-SET-DP

USB1-DM

USB1-DP

USB-MAIN-DM

USB-MAIN-DP

USB2-DM USB2-DP

+5V-HDD

USB-WIFI-DM USB-WIFI-DP

+3V3-LAN

USB-CAM-DM

USB-CAM-DP

+5V

D(0-7)

WSI2SOUT

SCKI2SOUT

SDI2SOUT1

AUDIO-MUTEn

DETECT12V

HPHOL HPHOR

L+

L-

R+

R-

L+

L-

R+

R-

L+

L-

R+

R-

RESET-FUSION-OUTnSTB_RST0

RESET-FUSION-OUTn

VGA-LIN

AL-3 AR-3

HARC3

HARC2

HARC1

HARC0

HARC4

HARC1 HARC2 HARC3 HARC4

ARC-SEL0 ARC-SEL1 ARC-SEL2

HDMI-ARC

HEAC

SPEAKER-DETECTn

ARC-SEL0 ARC-SEL1 ARC-SEL2

cEC0

cEC1

3D81

1J50

1

2

3

SPDIF OUT

13

5XXX

9xxx

SDRAM 256Mx8

7J01 H5TQ2G83BFR

SDRAM 256Mx8

7J02 H5TQ2G83BFR

SDRAM

128Mx16

7J03 H5TQ2G63BFR

SDRAM

128Mx16

7J04 H5TQ2G63BFR

AC29 AC30

2VWE

7HA0 SII9387ACT

HDMI

SWITCH

R1X

R4X

R2X

R3X

6 5 4

3

2 1

100

99

15 14 13 12 11 10

9

8

24 23 22 21 20 19 18 17

33 32 31 30

29 28 27 26

19

1

18 2

HDMI 5

CONNECTOR

19

1

18 2

HDMI 2

CONNECTOR

19

1

18 2

HDMI 3

CONNECTOR

19

1

18 2

HDMI 4

CONNECTOR

TXC_N

TXC_P

TX0_N

TX0_P

TX1_N

TX1_P

TX2_N

TX2_P

1

1H05

3

4

7

9 10 12

6

14

21

7RA0 STV6110A

DVB-S

TUNER

7RA1 STV0903BAC

DVB-S

CHANNEL

DECODER

7

SAT IN

20

8

48

37

32

122

18

12

19

11

2

16

78 75 74 73

4

3

5

8

4

2FS2

3FA3

1F00 SUT-RE214Z

IF2-_P

MAIN HYBRID

TUNER

7

8

RF IN

1RA0

16M

31

30

9RC2-1

9RC2-4

9RC2-2

9RC2-3

1R01

7KC0 CXD2834R

DVBT2

CHANNEL

DECODER

38

9

5FA4

5FA5

AGC2

2FS1

IF2-_N

3FA4

3KA1

5KC9

5KC8

3KA0

IF1-_N

IF1-_P

2

3

5KC0

5KC1

2KCE

2KCF

3KCB 3KCA

AGC1

4

7FA1,2

EF

5FS1

5FS2

R0X

97 96 95 94 93 92 91 90

19

1

18 2

HDMI 1

CONNECTOR

7J00 FUSION240

TS_TSB_MCU

B03A

TSSDEN TSSSYNC TSSCLK TSSDI

T26 U30 U29 U28

IN_P

F30

IN_N

F29

TAGCO_IF

F27

80 81

`82

87

83

85

86

84

B30 C30 A29 B29 A28 B28 A27 B27

AV_IN_OUT

B03E

RXC_P

RXC_N RX0_P RX0_N RX1_P RX1_N RX2_P RX2_N

SCART

19

1VA1

23

2VWF

E23 D23

AR_4 AL_4

3VA8

AUDIO

VGA/DVI

1VA6

AR_3

A23

PCMCIA

CONDITIONAL

ACCESS

20

7PA1,2 74LVC245APW

BUFFER

1P00

68P

51 52

18

17

3PW2,3

FLASH CI_GPIO

B03A

FRDx_PODDx

FRDx_PODAx

TS_TSB_MCU

B03A

TS1Dx

TS2ODx

AV_IN_OUT

B03E

PANEL_USB LAN_IO

B03E

AB29

AB30

D1_P

D1_N

1

11

10

2

6

3

4

2

1

3

1E03

4

7EA0 CY7C65632

USB

HUB

1EA0

12M

7

2

1

3

1E02

4

12 13

PANEL_USB LAN_IO

B03E

cEC2

cEC4

D2_P

D2_N

2

1

3

1E01

4

11

10

7EH1 CY7C65634

1EH1

12M

6 7

2

1

3

1C31

4

USB HUB

1 2

3

4

2

1

3

1C30

4

9EHA

9EHB

FUSION

UMAC

CONTROLLER

M1-MD

M1-MA

M0-MD

M0-MA

DDR3

B03B

1D01

1

2

SPEAKER L

3

4

SPEAKER R

SPEAKER

WOOFER

1D02

1 2

3

7D60 TAS5731

CLASS D

POWER

AMPLIFIER

1

46

39

36

5D78

5D75

20 22

9D52

9D54

21

15

19

7D50-2

25

7D50-1

5D80

5D72

1D01

1

2

SPEAKER L

3

4

SPEAKER R

SPEAKER

WOOFER

1D02

1 2

3

5D71

5D81

5D77

5D83

7DH1 TPA6111

AMPLI-

FIER

12 76

7DH0-1,2

5

HEADPHONE

OUT 3.5 mm

1DH4

Y27

WSI2SOUT

AA30

SDI2SOUT1

Y26

SCKI2SOUT

TS_TSB_MCU

B03A

H26

MUTE

3D63

7D70

TS_TSB_MCU

B03A

J29

STB_RSTO

3CUC

AV_IN_OUT

B03E

HPHOL HPHOR

B21 A21

3VA7

3VW9

3VW7

3VC7

2VWK

3VWK

AL_3

B23

3VC6

2VWJ

3VWH

1

1H04

3

4

7

9 10 12

6

14

1

1H03

3

4

7

9 10 12

6

14

1

1H02

3

4

7

9 10 12

6

14

1

1H01

3

4

7

9 10 12

6

14

5XXX

9xxx

15

5XXX

9xxx

12

5XXX

9xxx

1

5XXX

9xxx

7HD0 74HC4052

11 10

9

3

3HW1

T27

PANEL_USB LAN_IO

B03E

HEAC

AV_IN_OUT

B03E

E26

SPDIFO

1D35

1 2

3

FLASH_CI_ GPIO

B03A

R30

HPD

MUX

7CW1 PCA9554

I/O

EXPANDER

7

8

9

9.12 Block Diagram Audio

Block Diagrams

EN 66QFU1.1E LA 9.

2012-Sep-14

back to

div. table

9.13 Block Diagram Control & Clock Signals

CONTROL + CLOCK SIGNALS

19210_021_120424.eps

120424

B03x

FUSION

B01A

CONNECTORS AND PROTECTIONS

B04B

B06Q

B04A B07F B07E

B04A

B01F

MISCELLANEOUS

B07F

B06Q

B07F

B06Q

B04A

B03A

B06Q

SEE I2C DIAGRAM

B02B

DVBS FE

B02A

TUNER-CHANNEL DECODER

ONLY **PFL***7/T**

B06Q

UMAC 0 DDR3

B03D

UMAC 1 DDR3

B03C

B03A

V-BY-ONE OUT

B04B

B03A

CONNECTOR - BACKLIGHT

B04D

B03E

ONLY 7000/8000 SERIES

B04A

ONLY 9000 SERIES

B06A

HDMI

B04A

B06C

USB

B07C

USB INTERN

NO SKYPE

WITH SKYPE

B06Q

SERVICE

B06D

MAINSTREAM TV

ONLY

HOTEL TV ONLY

B04A

B06E

ETHERNET

B06Q

NAND-FLASH + EEPROM

B06F

B06L

CONDITIONAL ACCESS

B07D

CI

B04A

CONTROL

B01A

B04D

B06Q

CONTROL

B01A B01F

B01F

B01F B01F B02A B06C

B07C

B06E

B01A

B01F

B01A B04B

B06A

SERIAL FLASH

B06N

B07E

FPGA - POWER & CONTROL

RES

B07F

FPGA - I/O BANKS

B01F

B07F

B04B

B03A

FUSION

B01F B04B B04B

B03E

FUSION

B04D B04D B04D

B04B

B06Q

B01A

KEYBOARD_IRQ2-SRFn

STANDBYn

BL-ON BL-DIM

BL-DIM1

BL-I-CTRL

POWER-OK

BL-DIM(1-8)

LIGHT-SENSOR

3D-LED_3D-RF LED2

KEYBOARD_IRQ2-SRFn +3V3-STANDBY

RC_IRQ-RF4CEn

+5V

TXD-RF4CE

RXD-RF4CE

LED1

SPEAKER-DETECTn

RESET-RF4CE

TS-INT-VALID

TS-INT-SOP

TS-INT-CLOCK

TS-INT-DATA

IP IM

XTAL

QP QM

AGC

TS-CHDEC-VALID

TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

TS-CHDEC-VALID TS-CHDEC-SOP

TS-CHDEC-CLK

TS-CHDEC-DATA

RESET-FUSION-OUTn

M1-MA(0-15)

M1-MD(0-15)

D(0-7)

D(8-15)

M0-MA(0-31)

D(0-15)

M0-MD(0-15)

D(16-31)

M1-CONTROL

M0-CONTROL

CTRL-DISP1

CTRL-DISP2

CTRL-DISP3

BL-SPI-CLK-FUS BL-SPI-SDO-FUS BL-SPI-CS_BL-I-CTRL-FUS

BL-SPI-CS_BL-I-CTRL

BL-SPI-CLK BL-SPI-SDO

BL-DIM

ARX-HOTPLUG BRX-HOTPLUG CRX-HOTPLUG DRX-HOTPLUG ERX-HOTPLUG

PCEC-HDMI HDMI-CEC

HDMIF-RX

RESET-HDMI-MUXn

USB-MAIN-DM

USB-MAIN-DP

USB-PORTA-DM

USB-PORTA-DP

+5V-PORTA

USB-PORTB-DM USB-PORTB-DP

+5V-PORTB

USB-SET-DM

USB-SET-DP

USB1-DM

USB1-DP

USB-MAIN-DM

USB-MAIN-DP

USB2-DM

USB2-DP

+5V-HDD

USB-WIFI-DM

USB-WIFI-DP

+3V3-LAN

USB-CAM-DM

USB-CAM-DP

+5V

RESET-FUSION-OUTn

+3V3

RXD-SERVICE

TXD-SERVICE

EN-MDIO

EN-MDC

ETH-TXD

ETH-RXD

RESET-ETHERNETn

EN-RXC

EN-RXEN

EN-TXEN

IRQ-WOLANn

FRA(0-12)

F-READY

F-OEn F-CEn

NAND-ALE NAND-CLE

F-WEn

+5VCA

+3V3

CA-MDO(0-7)

MDO(0-7)

CA-MDI(0-7)

CA-D(0-7)

CA-A(0-13)

MDI(0-7)

BL-DIM-FUS

BL-DIM

PWRON LGSEN KYBRD IR

STB-P8 STB-RSTO STB-P7

HP-DETECT

STANDBYn

LIGHT-SENSOR

RC_IRQ-RF4CEn

RESET-RF4CE

RESET-FUSION-OUTn

RESET-ETHERNETn

IRQ-WOLANn

GPIO20

GPIO0 GPIO1

GPIO8 GPIO22

POWER-OK TXD-RF4CE

RXD-RF4CE CTRL-DISP3

RESET-HDMI-MUXn

SF-CLK

SF-WP

SF-CS

SF-SDI

SF-HOLDn

SF-SDO

AMBI-SPI-CCLK-FUS

AMBI-SPI-CCLK

AMBI-SPI-MOSI-FUS

AMBI-SPI-MOSI

MISO

MOSI CCLK

CSO-B

FPGA-SYS-CLK

AMBI-SPI-CCLK

AMBI-SPI-MOSI

AMBI-SPI-OUT-CCLK

AMBI-SPI-OUT-MOSI

3D-LR-FUS

3D-LR

AMBI-SPI-OUT-MOSI

FPGA-SYS-CLK

MISO

MOSI CCLK

CSO-B

AMBI-SPI-OUT-CCLK

3D-LR

BL-DIM(1-8)

3D-LED_3D-RF

3D-LR-DISP

3D-LR

SPEAKER-DETECTn

CTRL-DISP1 CTRL-DISP2

BL-SPI-CLK-FUS BL-SPI-SDO-FUS BL-SPI-CS_BL-I-CTRL-FUS

STB-P6

SPLASH-ON

BL-ON

1E06

3

2 1

Y29

Y28

UART

SERVICE

CONNECTOR

3CS4-3

3CS3

3CS4-1

3CS4-23CS2

3CS4-4

3CS1

3CS0

LEVEL

SHIFTER

11

12 13

14

1H01-13 1H02-13 1H03-13 1H04-13 1H05-13

TO

LIGHT

SENSOR/

TOUCH

CONTROL

7J00 FUSION240

2 11

14

13

12

1M95

TO

POWER

SUPPLY

3UA0

7UA3

3UA1 3UA2 3UAA 3UA3 3UA4

2

9

1M54

1 2

6

4

3

1C20

5

7

8

9 10 11

1 2

6

4

3

1C21

5

7

8

9 10 11 12 13 14 15 16 17 18

3CYA

3CYB 3CYC

9CY2

3CYD

3CYE 3CYF

3CYK

3CYM

3CYN

9CY1

3CYP 3CYT

TO

POWER

SUPPLY

21

7RA0 STV6110A

DVB-S TUNER

7RA1 STV0903BAC

DVB-S

CHANNEL

DECODER

7

20

8

32

122

18

12

19

11

2

16

78 75 74 73

4

3

5

8

1RA0

16M

31

30

9RC2-1

9RC2-4

9RC2-2

9RC2-3

7KC0 CXD2834R

TS_TSB_MCU

B03A

TSSDEN TSSSYNC TSSCLK TSSDI

T26 U30 U29 U28

29

SDRAM 256Mx8

7J01 H5TQ2G83BFR

SDRAM 256Mx8

7J02 H5TQ2G83BFR

SDRAM

128Mx16

7J03 H5TQ2G63BFR

SDRAM

128Mx16

7J04 H5TQ2G63BFR

FUSION

UMAC

CONTROLLER

M1-MD

M1-MA

M0-MD

M0-MA

DDR3

B03B

M0-CONTROL

M1-CONTROL

1KC0

41M

34

35

VbyOne

TO DISPLAY

1G55

4

7

3

6

3GVB

3GWG

3GWF

1G53

5

11

7

13

3GD3-3 3GD3-2

3GD5 3GD3-1

3GD8 3GD9

3GD6

TO

POWER

SUPPLY

7HA0 SII9387ACT

46

55 74

50

1H04-19

1H01-19 1H02-19 1H03-19

TO PIN:

59

1H05-19

5x HDMI

CONNECTOR

1

2

19

18

PANEL_USB LAN_IO

B03E

TS_TSB_MCU

B03A

CEC

M28

HDMI

SWITCH

9HA1

68

DVBT2

CHANNEL

DECODER

cEC0

cEC1

AC29 AC30

AB29

D1_P

D1_N

1

11

10

2

6

3

4

2

1

3

1E03

4

7EA0 CY7C65632

USB HUB

1EA0

12M

7

2

1

3

1E02

4

12 13

PANEL_USB LAN_IO

B03E

cEC2

cEC4

D2_P

D2_N

2

1

3

1E01

4

11

10

7EH1 CY7C65634

1EH1

12M

6 7

2

1

3

1C31

4

USB HUB

1 2

3

4

2

1

3

1C30

4

9EHA

9EHB

AB30

17

7CS1 ST232C

UART_JTAG I2C

B03E

TXD RXD

B03E

PANEL_USB LAN_I/O

Y30

GBE_MDC

W25

GBE_MDIO

GBE_RXD GBE_TXD

40 39

1

7EF0 AR8030

ETHERNET

CONNECTOR

RJ45

1EF0

25M

4

5

1E00

V25

GBE_RXC

33

3EF5

9EF1

W30

GBE_RXEN

30

V30

GBE_TXEN

32

7EF1

20

5EF7-1,2

FLASH

512kx16

7JA0 MT29F8G08

MAIN

SW

FRA_AD

FLASH_CI GPIO

B03A

AG23

FREADY

7

AK29

FOE

8

AJ24

BOOTCS

9

AK22

FRA14_ALE

17

AE23

FRA13_CLE

16

AK24

FWE

18

PCMCIA

CONDITIONAL

ACCESS

20

7PA1,2 74LVC245APW

BUFFER

1P00

68P

51 52

18

17

3PW2,3

FLASH CI_GPIO

B03A

FRDx_PODDx

FRDx_PODAx

TS_TSB_MCU

B03A

TS1Dx

TS2ODx

3CV3

3CV7 3CVM

3CVP

3CV1 3CVA

3CUB 3CW4

3CW3 3CWM 3CW5

3CUC

3CUA

3CWK

TS_TSB_MCU

B03A

K27

HP_DETECT

N26

STB_P7

J29

STB_RSTO

N25

STB_GP8

M29

IR

KYBRD

J30

M30

LGSEN

PWRON

R29

PANEL_USB LAN_IO

B03E

BOOST

E3

FLASH_CI GPIO

B03A

A12

A11

B10

B7

E11

GPIO20

GPIO0 GPIO1

GPIO8

GPIO22

7CT3 M25P05-AVMN6

FLASH 128kx8

6

3

1 5 7

STANDBY

SW

3CTU 3CT2 3CTZ 3CT0 3CT9

2

3CTH

3CV4

C12

GPIO15

3CV5

D12

GPIO16

SFCLK

L30

SFWPn

K30

SFCES

L29

SFSI

L28

SFHOLDn

L27

SFSO

L26

2

FPGA

SW

7GG2 M25P40

FLASH

16Mbit

5 6 1

7GG4

1GGA

12M

9GG1-4 9GG1-2

3CV2

E4

PWM0

7GF1 XC6SLX4

FPGA

27 26 43 50 65 64

70

38

45

3GWH

46

R30

FLASH CI_GPIO

B03A

HPD

C10

GPIO2

C9

GPIO3

A8

PANEL_USB LAN_IO

B03E

H_BK_LITE

C8

TCON_ON

D2

PWM1

3CWG

N27

STB_GP6

3GV9

9GV1

1J00

24M

H30

H29

XTLO24M

XTLI24M

Block Diagrams

EN 67QFU1.1E LA 9.

2012-Sep-14

back to

div. table

I²C

NAND-FLASH + EEPROM

B06F

RES

RES RES

RES

TUNER CHANNEL DECODER

B02A

DVBS SUPPLY

B01C

UMAC 0 DDR3

B03D

CONTROL

B04A

TEMPERATURE SENSOR

B06R

LPC DEBUG

B07A

FPGA I/O BANKS

B07F

CONTROL

B06Q

TUNER CHANNEL DECODER

B02A

SERIAL FLASH

B06N

CONTROL

B06Q

HDMI

B06A

V-BY-ONE OUT

B04B

DVBS-FE

B02B

FE

B06M

CLASS-D AMPLIFIER

B05A

CONTROL

B06Q

NAND-FLASH + EEPROM

B06F

ANALOGUE EXTERNALS

CONTROL

B06Q

B05B

MISCELLANEOUS

B01F

SERVICE

B06D

UMAC 1 DDR3

B03C

RES

CONNECTOR - BACKLIGHT

B04D

FUSION

B03x

19210_001_120313.eps

120419

CONTROL

B06Q

MISCELLANEOUS

B01F

CONTROL

B06Q

RES

M0-MA(0-31)

D(0-15)

D(16-31)

FRA(0-12)

AA28 AA27

SCL-M1 SDA-M1

Y29

RXD-SERVICE

Y28 TXD-SERVICE

M1-MA(0-15)

D(0-7)

D(8-15)

+3V3

AA26 AA25

SCL-M3 SDA-M3

+3V3

E2 D1

SCL-M2 SDA-M2

+3V3

SCL-FE SDA-FE

+3V3

U26 U27

SCL-S SDA-S

+3V3

SCL-SSB SDA-SSB

SCL-SRF SDA-SRF

SFB-CLK SFB-WPn

SFBI-CS

SFB-SI

SFB-SDO

SCL-TUNER SDA-TUNER

DIN-5V

CIN-5V

SCLT

SDAT

CIN-5V

AIN-5V

ARX-DDC-SDA

ARX-DDC-SCL

BRX-DDC-SDA

BRX-DDC-SCL

CRX-DDC-SDA CRX-DDC-SCL

ERR

14

ERR

13

ERR

18

SCL-BE SDA-BE

SCL-DISP SDA-DISP

SCL-BL SDA-BL

+3V3

CRX-DDC-SDA CRX-DDC-SCL

VGA-SDA-EDID-HDMI

VGA-SCL-EDID-HDMI

+3V3-STANDBY

+5V-VGA+5V-EDID

LED1

LED2

BIN-5V

M1-MD(0-15)

M0-MD(0-15)

P26 P27

STB-SCL STB-SDA

SCLMC SDA-MC

3CVG

13

1CV1

DEBUG

ONLY

1

3

3CVF

12

7CW1

PCA9554

I/O

EXPANDER

3CUW

3CUY

ERR

41

56

7JA2

M24C64

EEPROM

(NVM)

3JA2

3JA3

ERR

35

MAIN NVM

SW

2324

7D60

TAS5711

AUDIO

AMPLIFIER

3D56

3D55

ERR

37

71 70

7HA0

SII9387

HDMI

MUX

3HAV

3HAW

HDMI

CONNECTOR 1

HDMI

CONNECTOR 2

1H01

16 15

44 45

1H02

16 15

48 49

1H03

16 15

53 54

3HAB-4

3HAB-3

3HAB-2

3HAB-1

3HAA-4

3HAA-3

ERR

23

HDMI

CONNECTOR 3

19

1

18 2

19

1

18 2

19

1

18 2

1H04

16 15

72 73

3HAC-1

3HAC-2

HDMI

CONNECTOR 4

19

1

18 2

1H05

16 15

57 58

3HAA-2

3HAA-1

HDMI

CONNECTOR 5

19

1

18 2

1VA5

61 62

3HAL-1

3HAL-2

3HAL-1

3HAL-2

12 15

1

6

10

11

5

15

VGA

CONNECTOR

12

7TW0 LM75

TEMPERATURE

SENSOR

3TW1

3TW0

ERR

42

2524

7NA2

LPC1768

3NAJ

3NAH

9NA9

9NAA

12

7GF1

XC6SSLX4

FPGA

BL

3GF8

3GF9

ERR

38

3TA1

3TA2

1C21

3

1

TO

LIGHT SENSOR

TOUCH CONTROL

3CYG

3CYH

1110

1F00

SUT-RE214Z

TUNER

3FA2

3FA1

ERR

34

9897

7RA1

STV0903

DVB-S CHANNEL DECODER

3RA7

3RA8

ERR

28

19 18

1312

7RA0

STV6110

SATELLITE

TUNER

ERR

36

2120

7KC0

CXD2834

DVB-T2

CHANNEL

DECODER

3KC2

3KC3

ERR

27

87

7UP2

LNBH25

DVB-S CHANNEL DECODER

3UPB

3UPD

ERR

31

5FA6

5FA7

3CWJ

3CWF

5 4

3GM2

3GM1

3GM4

3GM3

8

7

9GM4 9GM3

12

7GM1

PCA9540B

2 CHAN.

MULTIPLEX.

9GM2

1CW6

3

1

DEBUG

ONLY

1CV8

3

1

7J00 FUSION240

SDRAM 256Mx8

7J01 H5TQ2G83BFR

SDRAM 256Mx8

7J02 H5TQ2G83BFR

FUSION

UMAC

CONTROLLER

B03B

M1-MD

M1-MA

SDRAM

128Mx16

7J03 H5TQ2G63BFR

SDRAM

128Mx16

7J04 H5TQ2G63BFR

M0-MD

M0-MA

B03E

JTAG

I2C

UART

FLASH

512kx16

7JA0 MT29F8G08

MAIN

SW

B03A

FLASH

CI

GPIO

FRA_AD

7CT3 M25P05-AVMN6

FLASH

128kx8

6

3

1 5 2

STANDBY

SW

B03A

TS TSB MCU

3CUH 3CUJ

3CUG

3CUF

DEBUG

ONLY

3CUG

3CUF

4

5

3CWU

3CWV

3CWY

3CWW

7

8

2

1

7CW0

PCA9540B

2 CHANNEL MULTIPLEX.

ERR

24

1CW7

3

1

DEBUG

ONLY

1T71

3

1

SET

TEMPERATURE

SENSOR

1FA0

3

1

DEBUG

ONLY

cFS1

cFS2

3CR7

3CR6

UART

SERVICE

CONNECTOR

1E06

3

2 1

3CS4-33CS3

3CS4-1

3CS4-23CS2

3CS4-4

3CS1

3CS0

7CS1

ST232C

LEVEL

SHIFTER

11

12 13

14

HOTEL TV ONLY

MAINSTREAM TV

ONLY

3GM5

3GM6

1CWA

3

1

DEBUG

ONLY

1CWB

3

1

DEBUG

ONLY

1G55

1

2

9GM1

3GVD 3GVE

TO DISPLAY

PANEL

1G53

2

3

3GD2 3GD1

TO DISPLAY

PANEL

7CY6

PCA9633

PWM

3CU8

3CU9

3CR7

3CR6

3CYS 3CYR

6

7

1

2

3CYU

3CYV

EF

7CY1

EF

7CY2

1CWD

3

1

DEBUG

ONLY

1C21

3

16

TO

LIGHT SENSOR

TOUCH CONTROL

3CYN

3CYC

9.14 Block Diagram I2C

Block Diagrams

EN 68QFU1.1E LA 9.

2012-Sep-14

back to

div. table

9.15 Supply Lines Overview

B07D

CI

B06C

USB

B06F

NANDFLASH + EEPROM

B06P

HDMI

B06N

PNX85500: STANDBY CONTROLLER

B05B

ANALOGUE EXTERNALS

B06K

AUDIO

B04A

CONTROL

B06I

DC-DC

B06D

SERVICE

B06Q

CONTROL

B01B

FUSION SUPPLY

SUPPLY LINES OVERVIEW

PSU

B01A

CONNECTORS AND PROTECTIONS

B04C

OUTPUT - VDISP

B06A

HDMI

B04B

V-BY-ONE OUT

19210_061_120426.eps

120426

B06Q

B06H

DC-DC

B01C

DVBS-SUPPLY

B01D

POWER SEQUENCING

B03F

FUSION POWER SUPPLY

B07A

LPC-DEBUG

VGA

CONNECTOR

B05A

CLASS-D AMPLIFIER

B07E

FPGA - POWER & CONTROL

B07F

FPGA - I/O BANKS

B02B

DVBS-FE

B07G

CPLD

B04A B07F B07E B04A

2-SIDED AMBILIGHT

3-SIDED AMBILIGHT

B01F

MISCELLANEOUS

RES

B02A

TUNER-CHANNEL DECODER

B03B

FUSION UMAC CONTROLLER

B03C

UMAC 1 DDR3

B03D

UMAC 0 DDR3

B04D

MISCELLANEOUS

B06B

HDMI-ARC

B06E

ETHERNET

B04H

SECOND SOURCE DC-DC CONVERTERS

RES

B06M

FE

B06R

TEMP-SENSOR

B06S

STRAP-OPTIONS

RES

B07B

HEADPHONE

B07C

USB INTERN

B07H

AMBILIGHT

RES

DDR-MVREF12

DDR-MVREF11

STANDBYn

+3V3-STANDBY

+12Va

+12V-AUDIO

+12V

+3V3

B01a

+12Va

+1V1-FD

+12Va

+1V1-FA+3V3

B06h

+1V2-FA

B03f

+3V3

+2V5

+2V5-F

+1V5

+3V3-STANDBY

B01a

+3V3

B06h

+5V

B06h

+3V3

+3V3-STANDBY

B01a

+3V3

B02b

B06h

B01a

+3V3-STANDBY+3V3-STANDBY

+3V3

+5V-VGA

+3V3

B06h

+VDISP

+12V

+3V3+3V3

B01a

+2V5+2V5

B01a

+3V3-STANDBY

+12V-AUDIO+12V-AUDIO

B01a

+3V3D

+3V3

+5V

+5V-PORTB

+5V-PORTA

+5V-HDD

+3V3

+3V3+3V3

+5V-EDID

+3V3-STANDBY+3V3-STANDBY

+5V-VGA+5V-VGA

+5V

DIN-5V

CIN-5V

EIN-5V

BIN-5V

+3V3

B06h

+3V3

VCCINT

VAUX

VCCO3

VCCO2

VCCO1

VCCO0

B07f

VAUX

B07e

+3V3

+2V5

VCCINT

B07e

VCC03

VCCO3

B07e

VCCO2

B07e

VCCO1

B07e

VCCO0

B07e

+3V3-DVBS+5V

+2V5-DVBS+3V3

+3V3-DEMOD

+3V3RF

+1V0-DVBS+1V0-DVBS

B06a

+VDISP+VDISP

+3V3+3V3

B04b

+3V3

B06h

+3V3

VINT

VID

+V-LNB+V-LNB

VDD33

+5V

+5VCA

+3V3

+3V3-WIFI

+12Vb

BL-DIM

BL-DIM1

BL-I-CTRL

POWER-OK

GND-AL

AMBI-POWER

+12V

+12V-AL

+3V3-AL

+1V5

+Vb

+1V2-MIPS

+12V-DVBS

+12V

B01a

+5V

+2V5-DVBS

+1V0-DVBS

+V-LNB

+12V+12V

B01a

+3V3-STANDBY+3V3-STANDBY

B01a

+2V5+2V5 +3V3+3V3

+3V3-STANDBY+3V3-STANDBY

B01a

+5V+5V

+3V3+3V3

+12V

B01a

+VCC-TUNER+5V

+3V3-DVBT2-D+3V3

+1V2-DVBT2-C+1V2-FE

+1V2-DVBT2-P

B01a

+1V5-M1

+1V5-M0

+1V5-M1

DDR-MVREF02

DDR-MVREF01

+1V5-M0

B03f

B03b,B03d

+1V5-M1

B03b,B03c

+1V2-MIPS

+1V2-FA

+1V1-FA

+1V1-FD

B04c

+3V3

B01b

B01c

B03f

B05a

+3V3

AIN-5V

B05b

B01a

EPWR33

SBVCC5

+1V5+1V5

+1V2-FE

VDD12 TVDD12 AVDD12

+5V-ARC

+3V3-ARC

+5V

+3V3

VDD33-PHY+3V3-LAN

B07c

VDDH-2V5

AVDDL-1V1

+12Vb

B01a

+5V

+3V3

+2V5

+12Vb

B01a

+5V

+3V3

B06h

B03f

B06i B06i

+3V3

B06h

+3V3-STANDBY

B01a

+5V-LPC

+3V3-LPC

+3V3-LPC-ANA

+12Vb

B01a

B06h

B01a

+3V3-STANDBY+3V3-STANDBY

+3V3

B06h

+5V+5V

+3V3

B01a

+3V3-WIFI

B07c

B06h B06h

B01a

+3V3AL+3V3AL

AMBI-POWER

B07h

B06h

B01c

B02b

B03f

B06h B06h

B06h

B06a

B02a

B06h

B01a

+2V5-F

B03f

B06h B01b

B06h

B06h B06h

B06h

B01b

B06h

B06h B06h

B06h

B01d,B01f, B03f,B04a, B05a,B06a, B06n,B06q, B06s,B07b

B04h,B06h, B07a

B01c,B01d, B01f,B04c

B01b

B03f,B06a

B01c,B01f, B02a,B02b, B06a,B06b, B06c,B06p, B07c,B07d

B01a,B01d,B01f, B02a,B02b,B03f, B04a,B04b,B04c, B04d,B05a,B06a, B06b,B06c,B06d, B06f,B06i,B06k, B06m,B06p,B06q, B06r,B07b,B07c, B07d,B07e,B07g

B01d,B03f, B04c

+3V3-LAN

B06e

TEMP

SENSOR

(OPTIONAL)

1T71

4

3

HDMI 4

CONNECTOR

HDMI 3

CONNECTOR

HDMI 5

CONNECTOR

HDMI 2

CONNECTOR

5J0P

3J2V 3J30

3J11 3J14

5TA1

1TA1 T 1.0A

5TA2

SYNCHRONOUS

STEP DOWN

CONVERTER

7UP1 TPS54227

8

6

3UD2

6UAF

5GC1

5GC2

5RA1

3EAC

+T

3EA7

+T

3PA1

+T

7UC0 RT8228

3

1

5U02

5UC0

Synchronous

Buck PWM Controller

7UC3

7UC2

1M95

11

66

77

88

1M95

14 14

99

13 13

10 10

22

33

44 55

11 11

1UA0 T 3.0A

7GS3

LCD-PWR-ONn

7GS2

1P03

18

1P02

18

1P04

18

5HA5

6HA0

1VA5

9

12 12

7UV0

VOLT.

REG.

1GS1 T 3.0A

5D85

3ECH

+T

1P05

18

7GG6

IN OUT

COM

5GG1

5GG2

5GG3

5GG4

5GG5

5RC0

7RC1

IN OUT

COM

7RC0

IN OUT

COM

5RA0

1UA1 T 3.0A

1M99

1

6

2

3

4 5

8

7

1

6

2

3

4 5

8

7

1UA2

T 2.0A

7UAC

HIGH SIDE

POWER SWITCH

7UAE RT9715

ENABLE-3V3-AMBI

5

4

1

SYNCHRONOUS

STEP DOWN

CONVERTER

7UB5 TPS54429

ENABLE+1V5+1V1

7

10

5UB7

5UB5

13 14

11

ENABLE+1V5+1V1

8

5

5UC2

7UC7

7UC4

7UC8

ENABLE+1V5+1V1

1UP1 T 3.0A

5UP1

5UP2

7UP2 LNBH25PQ

20

LNB

CONTROLLER

17

5UP6

ENABLE-3V3 ENABLE-2V5

CONTROL

ENABLE-1V5-1V1

5FA0

7FA0

IN OUT

COM

5KC6

5KC7

3KCE

5J0R

BACK LIGHT

1G53

9

1GD1 T 1.0A

HDMI 1

CONNECTOR

1P05

18

5HA6

3HAS

7HA1 RT9025

6

5HA2 5HA3 5HA4

5HD6

5HD5

1E03

9

1E02

9

1E01

9

5EF4

ETHERNET

7EF0 AR8030

8,27

6,11,17

SYNCHRONOUS

STEP DOWN

CONVERTER

7UW0 TPS54426

DETECT12V

7

10

5UB2

5UW0

13

11

SYNCHRONOUS

STEP DOWN

CONVERTER

7UW1 TPS54426

ENABLE+3V3

7

10

5UB4

5UW3

13

11

14

ENABLE+2V5

7UW2 RT9025

6

3

2

DETECT12V

SYNCHRONOUS

BUCK

CONVERTER

7URA RT8288

2,3

1

5

ENABLE+3V3

7UR6 RT8293

1,2

2

7

5UR1

5UR5

LOW

DROP OUT

CONVERTER

LOW

DROP OUT

CONVERTER

7UV1 RT9025

15

LOW

DROP OUT

CONVERTER

SYNCHRONOUS

BUCK

CONVERTER

1NA2

1

7NA0

VOLT. REG.

5J20

ENABLE-WOLAN

7EH4 TPS61200

2

5

6

LOW

DROP OUT

CONVERTER

Block Diagrams

EN 69QFU1.1E LA 9.

2012-Sep-14

back to

div. table

Circuit Diagrams and PWB Layouts

19210_005_120424.eps

120424

Connectors and protections

B01A B01A

2011-12-16

6

8204 000 9215

Connectors and protections

VIN

VOUT

GND

EN

FLG

EN

*

+12V DETECTION

AMBILIGHT 3-SIDED PROTECTION

RES

OPTIONAL

INSTEAD 1M99

IUAV

2

3

4 5 6 7

8

9

1-2041145-4

1M95

1

10 11 12 13 14

2UA5

3UAT-4

2K2

10n

2

3

1n0

2UA7

SI4778DY-GE3

567

8

4

1

7UAC

220K

3UAB

FUA7

3UAA

100R

8

3UAH-1

22K

1

10K

3UAV-4

IUAK

2UAM

1u0

+12V

5UAA

3u0

100R

3UA4

2UAK

100p

1X05

REF EMC HOLE

3UAF-3

36

FUAT

T 32V3.0A

1UA0

10K

RES

3 6

3UAN-3

4K7

6

1

3UAD

3K3

7UAA-1

BC857BS(COL)

2

FUA0

3UAJ

4K7

FUA1

+3V3-WIFI

390R

3UAR

+12Va

IUAG

RES 2UAV

330u 6.3V

FUAB

9UA1-4 RES

+3V3-WIFI+3V3-STANDBY

RES

9UA1-2 RES 9UA1-3

RES

+12V

9UA1-1

1UA2

2.0A 63VT

FOR DUAL SIDE AL ONLY

2K2

3UA6

FUA8

RES

1u0

2UAJ

RES

IUAB

2K2

3UAT-2

FUA3

3UA1

100R

0R1

3UAW

100p

2UA4

AMBI-POWER

2UA6

100p

IUAJ

RES

100K

3UA8

10n

2UA1

1

10K

3UAV-3

RT9715EGB

7UAE

4

3

2

5

+12VAL

T

+12VAL

GND-AL

32V3.0A

1UA1

BC847BPN(COL)

7UA0-2

5

3

4

2UAN

100p

B230LA-M3

PDZ15B(COL)

6UAC

6UAF

RES

1 8

FUA2

3UAN-1

4K7

3UAE

1K0

1 8

+12VAL

10K

3UAF-1

RES

1 8

FUAK

3

4

4K7

3UAP-1

1M11

2041145-4

*

1 2

4K7

+12VAL

45

3UAG

3UAF-4

10K

IUAM

3UA0 100R

10K

3UA7

100p

2UAL

+3V3-STANDBY

6UAB

S1D

RES

4

7UA2 PMV31XN

BC857BS(COL)

7UAA-2

5

3

3UAP-2

4K7

RES

27

9UA0

BC847BPN(COL)

7UA0-1

2

6

1

RES

+12V-AUDIO

IUAC

5

IUAR

3UAP-4

4K7

RES

4

FUA5

IUAE

IUAF

+22V

RES

6.3V 330u

2UA9

10u

2UAR

45

FUA4

22K

3UAH-4

+3V3AL

1X00

EMC HOLE

7

8

AMBI-POWER

1M99

2041145-8

1 2

3

4 5 6

+3V3-STANDBY

+12VAL

+12V

GND-AL

6

FUAA

4K7

3UAP-3RES

3

FUAR

2UA8

10n

IUA0

2

6

1

+12Vb

+3V3-STANDBY

7UA1-1

BC847BS(COL)

10K

3UAS

FUAL

GND-AL

IUAL

RES

2UAS

10u

100n

2UA3

100R

3UAY

+3V3

1R0

3UAC

IUA1

A

3

K

1

R

2

1u0

2UA2

RES

TS2431

7UAF

1u0

2UAP

3UAF-2

10K

72

100R

3UA2

2K2

3UAT-3

FUAN

3UAT-1

10K

3UAV-2

2K2

16V

100u

2UAT

IUAP

2UA0

1u0

2UAB

100n

RES

BC847BS(COL)

7UA1-2

5

3

4

IUAD

PDZ6.2B(COL)

6UAA

1u0

2UAA

FUA9

RES

45

FUA6

4K7

3UAN-4

RES

IUAT

10K

3UAK

10K

3UA9

AMBI-POWER

3UA3

100R

FUAJ

+12VAL

GND-AL

FUAP

RES

1K5

3UA5

DBG

330R

3UAM

+3V3

1

3

2

1X03

EMC HOLE

BC847BW

7UAB

10K

3UAV-1

3UAH-2

22K

27

+12VAL

+12V

6UAD

+12V

FUAH

PDZ15B(COL)

DBG

6UAE

LTST-C190KGKT

100n

2UAD

IUAS

3 6

FUAS

22K

3UAH-3

IUAA

7UA3

BC847BW

IUAN

100n

2UAU RES

RES

27

BL-DIM1

4K7

3UAN-2

DETECT12Vn

STANDBYn

STANDBY

DETECT12V

ENABLE-3V3-AMBI

STANDBY

BL-ON

BL-DIM

BL-I-CTRL

POWER-OK

10. Circuit Diagrams and PWB Layouts

10.1 B 310431365554

10-1-1 B01A, Connectors and protections

EN 70QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-2 B01B, Fusion supply

19210_006_120424.eps

120424

Fusion supply

B01B B01B

2011-12-16

6

8204 000 9215

Fusion supply

VIN2

SS

EN

VFB

VO

VIN1

PG

VBST

SW2

VREG5

SW1

GND_HS

PGND

GND

VIA

PGOOD

DRI

FB

VCC

EN

GND

TON

GND_HS

GND

BOOT

UGATE

FB

PHASE

LGATE

MODE

PGOOD

CS

EN

VCC

CORE VOLTAGE SUPPLY MIPS FUSION

DDR3 SUPPLY FUSION

CORE VOLTAGE SUPPLY FUSION

IUBF

GND-1V1F

RES

470K

3UB9

1M0

3UCR RES

GND-1V5

IUC0

100K

3UB7 RES

27

GND-1V2

3UC3-2

10R

1%

220K

3UCN

3UC2

2K2

RES

5UB7

2u0

GND-1V2

22u

2UCB

RES

+12Va

2UCL

220u 2.5V

3UC0

10R

270K

3UCK

+12Va

RES

2UCP

10u

45

IUC2

3UCH-4

4K7

5UC0

IUC9

2u0

3UC5

1M0

1%12K

3UCJ

9UC0

+1V1-FD

4K7

3UD1

30R

3UD2

22R

5UC1

IUCD

PDZ5.6B(COL)

RES

IUC5

6UC1

GND-1V5

22K

FUC0

3UCW

RES

2UBS

1n0

1%22K

3UB6

22u

2UCW

GND-1V5

IUBC

IUCA

2UBV

100n

2UCA

22u

10R

3UCD

RES

30R

5UB5

3UCL

GND-1V5

RES

1%33K

2UBK

100n

3UCE

120K 1%

RES

9UC1

+1V2-MIPS

A

3

K

1

R

2

TS2431

7UC4

3UC7

270K 5%

10R

3UC3-1

1 8

22u

RES

2UCY

GND-1V2

2UCM

22p

100n

2UC2

7UC3

567

8

4

123

GND-1V2

SI4172DY-GE3

DBG

GND-1V1F

2

1

84

3UC9

2K2

LM833

7UC8-1

3

IUCJ

2UCF

1n0

RES

22u

2UBN

3

4

10u

2UBL

7UC6-2 BC847BS(COL)

5

7UC1 RES

22K

3UB8

BC847BW

45

1%

100K

3UCT-4

2UCS

10u

+5V

+Vb

4K7

3UCH-1

1 8

IUCB

IUCC

10R

3UC3-3

3 6

220K

3UCZ

22u

2UCC

IUC1

IUBE

FUB5

2UC0

1u0

IUC3

LTST-C190CKT

6UC0

DBG

22 23 24

13

14

1

3

11

12

2

16

25 26

17 18 19 20 21

7

5

15

6

8

9

4

10

IUC6

7UB5

TPS54429PWP

1%12K

3UCP

680K

IUCE

3UC6

+1V5

IUCK

2K2

3UCM

RES

2UBW

22p

RES

2UBY

3n3

2UBM

10u

1u0

GND-1V2

2UCG

10u

+12Va

2UCE

1%

IUCL

+1V5

3UCB

22K

GND-1V2

FUC3

GND-1V5

1n0

2UC4

+Vb

5

6

7

84

IUCH

LM833

7UC8-2

IUC4

3UCY

IUC7

+1V1-FD

22K

1 8

GND-1V1F

2UCR

100K

3UCT-1

RES

1n0

1%180K

3UCG

8

4

123

GND-1V1F

7UC2 SI4778DY-GE3

567

5

1 3

2

4

6

GND-1V2

RES

RT9194GE

7UC5

IUBG

1M0

3UCV

RES

2UCD

220p

1%

1n0

2UCT

150K

3UCA

2UC1

1n0

+5V

GND-1V2

3R3

IUCG

IUBD

3UC1

4K7

3UCH-3

3 6

45

GND-1V1F

10R

3UC3-4

3R3

3UC8

13

1

7

2

9

311

5

4

10

68

12

2u0

5UC2

7UC0

RT8228BGQW

IUCM

IUBB

IUC8

GND-1V1F

2UBP

22u

7UC7 PHD38N02LT

3UCS

1%47K

2UCN

1u0

10R

3UD0

22u

2UCK

RES

GND-1V2

6UC2

B340A-M3

cUP9

GND-1V1F

2UCH

100n

2UCV

1n0

RES

22K

1%

330p

2UC3

3UCF

2

6

1

BC847BS(COL)

7UC6-1

FUC2

RES

GND-1V2

2UCU

1u0

2UCJ

22u

IUCF

3UC4

100K 1%

10R

3UCC

7

+5V

IUBA

4K7

3UCH-2

2

+1V5

22u

2UBT

IUCP

ENABLE+1V5+1V1

IUCN

DVS1

ENABLE+1V5+1V1

DVS2

ENABLE+1V5+1V1

SENSE+1V1-FD

Circuit Diagrams and PWB Layouts

EN 71QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-3 B01C, DVBS supply

19210_007_120424.eps

120424

DVBS supply

B01C B01C

2011-12-16

6

8204 000 9215

DVBS supply

VIA

ADDR

VOUT

VUP

VBYP

SCL

SDA

DETIN

IN OUT

FLT

BPSW

ISEL

GND

PGND

GND_HS

DSQ

NC

VCC

LX

SW

VREG5

GNDGND_HS

VFB

VIA

EN

VIN

SS

VBST

LNB SUPPLY

CORE VOLTAGE SUPPLY FOR DVBS DEMODULATOR

IUP6

100n

2UP4

470n

FUP1

+2V5-DVBS

2UPJ

+12V-DVBS

2UP7

1u02UPE

10u

IUP3

1K0

3UP3

DEBUG

IUP1

+1V0-DVBS

+V-LNB

2UP9

10n

5UP5

10u

B230LA-M3

6UP4

2UPG

47u 25V

+12V-DVBS

2UP0

10u

IUPG

GND-1V0

3UP2

8K2 1%

29

30 31 32 33

20

21

RES

13 14 24

4

7

8

16

17

26 27 28

2

15

25

9

3

1

5 10 11 12

Φ

LNBH25PQ

7UP2

6

18

19

22 23

3UP4

22K 1%

47R

3UPD

47R

IUP9

3UPB

FUPA

1u0

3UP7

2UPH

+5V

68K

IUPE

100n

2UPL RES

IUP8

GND-1V0

220n

2UPK

IUPF

cUP1

10u

2UPD

IUP4

+V-LNB

RES

470K

3UP5

3u0

5UP2

6UP6

B230LA-M3

47u

2UPF

8K2

3UP6

25V

1%

3UPE

22K

2UPC

100n

2UP8RES

1n0

22p

2UPB RES

2UPA

22p

22u

RES

5UP6

2UP6

30R

100n

2UP2

GND-1V0

9

4 6

72

10

11

8

3

TPS54227DDA

Φ

STEP DOWN

1

5

2UP1

10u

7UP1

3UP1

68K

RES

2UP5

GND-1V0

22u

+12V

IUP7

25V10u

2UPM

30R

5UP1

RES

RS1D

6UP5

T 32V3.0A

1UP1

+12V-DVBS

IUPJ

IUP2

GND-1V0

6UP1

LTST-C190KGKT

DEBUG

F22-DISECQ-TX

SENSE+1V0-DVBS

SCL-FE

SDA-FE

Circuit Diagrams and PWB Layouts

EN 72QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-4 B01D, Power sequencing

19210_008_120424.eps

120424

Power sequencing

B01D B01D

2011-12-16

6

8204 000 9215

Power sequencing

3K3

3UGE

3UGF

100R

IUF6

BC847BPN(COL)

7UF5-1

2

6

1

+12V

IUFJ

2UF9

100n

IUF2

22K

3UG1-3

22K

3UG2-2

3UFV-1

1 8

IUFS

RES

100R

3

4

RES

2UF4

10n

7UF5-2

BC847BPN(COL)

5

3UF7-3

100K

36

3UGC

120K

IUFN

IUFR

IUFM

27

3UG1-1

22K

3UF7-2

100K

3UFA

100K RES

5

3

4

+2V5

7UF3-2

BC847BPN(COL)

2

6

1

IUF0

7UF3-1

6

1

+12V

7UF6-1

BC847BPN(COL)

2

3UG0-2

22K

3UG0-4

3UFF

12K

IUFL

IUFG

27

5

3

4

RES

3UFV-2

100R

7UF8-2

BC847BS(COL)

IUFK

IUFC

3UG2-1

22K

100K

22K

3UG1-4

IUFE

RES3UF2

+12V

2UF2

1u0

+12V

5

3

4

IUF3

1

BC847BPN(COL)

7UF6-2

BC847BPN(COL)

7UF7-1

2

6

100n

2UF5

81

3UF7-1

100K

47K

3UFGRES

22K

3UG2-4

+3V3-STANDBY

IUFP

3UGB

100K

22K

3UG2-3

54

IUF7

3 6

100K

3UF7-4

RES

100R

3UFV-3

3UG0-1

22K

+3V3

1

3UG1-2

22K

BC847BS(COL)

7UF8-1

2

6

100K

3UF1

5

3

4

IUFD

7UF7-2

BC847BPN(COL)

45

3UG0-3

22K

+2V5

RES

3UFV-4

100R

IUF5

IUF1

+5V

IUFA

+12V

IUF8

ENABLE+2V5

DETECT12V

DETECT12Vn

ENABLE+1V5+1V1

ENABLE+2V5

ENABLE+3V3

ENABLE+1V5+1V1

ENABLE+3V3

Circuit Diagrams and PWB Layouts

EN 73QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-5 B01E, -

19210_009_120424.eps

120424

-

intentionally blank

B01E B01E

2011-12-16

6

8204 000 9215

-

Circuit Diagrams and PWB Layouts

EN 74QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-6 B01E, Miscellaneous

19210_010_120424.eps

120424

Miscellaneous

B01F B01F

2011-12-16

6

8204 000 9215

Miscellaneous

VIA

SCL

SDA

VDD

VSS

GND_HS

LED0

LED1

LED2

LED3

+T

SENSOR

+3V3-STANDBY

TEMPERATURE

10R

3CYD

FCYA

7CY1 BC847BW

RES

10R

3CYG

100R

3CYJ

3CYU

47R

RES

9CY3

RES

10K

3CY5 RES

FCY2

4

6

7

8

10 11 12 13

5

RES

Φ

9

1

2

3

PCA9633TK

7CY6

RES

3CYH

10R

FCY3

FCYB

FTA7

1R0

3CYL

+5V

RES

100R

3CYA

10p

RES

2CY5

10p

2CY6

ICY4

RES

3CYR

47R

RES

30R

5TA2

2CY8

10p

10K

3CY8

RES

10p

2TA1

1n0

2GYG

FCY4

RES

FCYD

3CY9

10K

2GYD

1n0

10p

2CYL

FCY8

1TA1

1.0A

RES

FCY9

FTA1

63VT

100p

2CYE

FTA3

+3V3

19 20

ICY1

17 18

2

3

4 5 6 7

8

9

FH52-18S-0.5SH

1

10 11 12 13 14 15 16

1C21

ICY7

FGY4

100p

2CYA

10K

3CY2

1n0

2GYC

1u0

2TA3

FGY6

RES

9CY1 RES

+3V3

3CYF

0R4

FTA4

RES

10R

3CYM

47R

3CYS

7CY2

RES

100p

2CY7

+5V

BC847BW

1u0

RES

2CYF

RES

100K

3CY7

100R

3GY3

FCY6

3CY3

10K

47R

2GYB

1n0

3CYV

FCYC

FGY3

2GYE

1n0

3CYC

100R

3GY7

10p

2CY9

3CY1

10K

RES

3

4

502386-0470

1T71

1 2

3

4 5 6 7

8

9

RES

2041145-9

1M54

100p

2CYC

+3V3

FTA2

100R

3GYD

FGY7 100R

3GY9

3GYC

100R

9CY2

+3V3-STANDBY

100R

3CYP

RES

3CYT

100R

+5V

2GYF

1n0

FTA6

+3V3-STANDBY

100R

1n0

2GYJ

3CYN

+12V

3GY8

100R

3TA2

RES

10R

100n

2CY3

100R

3GYA

RES

1n0

2GYH

FTA5

FGY2

RES

2CYK

100n

100p

ITA1

2CY4

5TA1

30R

RES

FCY7

10K

3CY4

FGY9

FCYE

3TA1

RES

+3V3-STANDBY

ICY2

10R

FCY1

1u0

2CY1

+3V3-STANDBY

47n

2CY2RES

ICY3

3CYK

10R

2CYD

100p

3CYB 100R

3GYB

100R

FGY8

FGYA

2CYB

100p

2TA2RES

10p

RES

3CY6

10K

FCY5

ICY6

100R

3CYE

8

9

12 13

FGY5

1C20

1

10 11

2

3

4 5 6 7

FH52-11S-0.5SH

IRQ-SRFn

KEYBOARD_IRQ-SRFn

LED1

LED2

LED1 SCL-MC

LED2 SDA-MC

SDA-MC

RESET-RF4CEn

SCL-MC

SCL-SRF SDA-SRF

IRQ-SRFn TXD-RF4CE

RXD-RF4CE LED1-OUT SPEAKER-DETECTn

LED2-OUT

LED1

LED2

LIGHT-SENSOR 3D-LED_3D-RF

LED2-OUT KEYBOARD_IRQ-SRFn

RC_IRQ-RF4CEn

SCL-SRF

SDA-SRF

LED1

LED1-OUT

LED2

BL-DIM1 BL-DIM2 BL-DIM3

BL-DIM5

BL-DIM7

BL-DIM4

BL-DIM6

BL-DIM8

Circuit Diagrams and PWB Layouts

EN 75QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-7 B02A, Tuner channel decoder

19210_011_120424.eps

120424

T uner channel decoder

B02A B02A

2011-12-06

5

8204 000 9218

Tuner channel decoder

COM

OUTIN

PVDD

DVDDCVDD

VSS

GND_HS

TSDATA

SDA

VIA

TSCLK TSVALID TSSYNC

0 1 2

3

4 5 6 7

SCL

XTALO

TAINP TAINM

RFAIN

GPIO0 GPIO1 GPIO2

TIFAGC

TTUSCL TTUSDA

TESTMODE

SLVADR0

OSCEN_X

RST_X

SLVADR3

NC1 NC2

XTALI

7FA1

2FAD

22K

-

3FAD

3FAA

3FA9

3FAC

TV550-R4

=

-

100nF

2K7

FUSION

BC857BS

100R

Position Nr

I2C

0XD8

470R

3FA7

ADDRESS

_

2K7

470R

-

22nF

-

3FAB

47R

3KA1

10K

IKC4

2FAB

10p

FFAB

3KC0-1

47R

8

1

FFA8

5FA7

30R

FFAA

2FA5

22u

100n

2KCE

22R

3KCE

9RC2-3

3 6

DKC1

IFA3

3K3

3KC8

+1V2-DVBT2-C

5FA5

330n

9RC2-1

1 8

2KCH

10n

10K

3FAB

VCC-TUNER

+3V3

FFAC

AFA5

IKC5

IKC9

2FAH

10p

AFA3

10u

2KCS

1

IKC3

1FA2

U.FL-R-SMT-1(10)

2

3

VCC-TUNER

3KCB

47R

3FAC

470R

2

6

1

RES

7FA1-1

BC857BS(COL)

2KCK

6p8

2KCC

12p

330n

5KC9

IKC7

470R

3FAA

IKC6

27

AFA2

9RC2-2

2KCP

1u0

RES

6.3V330u

2FA0

DKC0

5KC6

30R

5FA6

30R

72

3K3

47R

3KC0-2

5KC8

3KC9

330n

30R

5KC5

2FAF

100n

2KC3

10p

22K

3KCC

100R

+1V2-DVBT2-P

3FA7

2FAE

10p

47R

3KA0

IKC8

AFA4

100R

3FA2

22u

2FA6

+3V3-DVBT2-D

47R

+1V2-DVBT2-P

3FA4

2FAD

22n

2KC0

100n

10p

FFA5

4

2FAJ

7FA1-2 BC857BS(COL)

5

3

9KC1

3FA1

100R

2K7

3FA9

12p

2KCB

+1V2-DVBT2-C

2KC2

100n

2KC1

+1V2-DVBT2-C

9FA0

100n

AFA1

2FA2

3KA4 100R

AFA0

RES

FFA7

FFA3

2KCF 100n

+1V2-FE

FFA6

100R

3KA3

10p

2FAG

10p

2FAC

22K

+3V3-DVBT2-D

3FAD

2KCJ

100n

IKC2

2FA8

100n

FFA4

2KC5

100n

0R1

3FA0

FKC1

3KC2

47R

3KCA

18232731363943

35

34

74

52 53 54 55 56 57 58

6

11

64 65 66 67 68

51

69 70 71 72 73

17

3

4

46 45

50

59 60 61 62 63

24

48

5

8

9 12 13 14 15 16

32

41

29

20 21

25

30

37

38

44719

42

49

1 47 2

33

40

26

7KC0

CXD2834ER

102228

47R

3KC3

IFA5

2FA7

10p

2KCR

1u0

2

4

13

15

16

NC1

5

NC2

6

1KC0

41M

I2C_SCL

11

I2C_SDA

IF1_N

3

IF1_P

2

8

IF2_N

IF2_P

7

12

4131

1F00

SUT-RE214Z

TUNER

A3.3V

1

AGC1

4

AGC2

9 10

3 2

5FA1

30R

7FA0

LD1117DT33

1

9KC0

2KCD

10p

1FA0

BM03B-SRSS-TBT

1 2

3

45

DBG

5KC7

30R

RES

PDTA114EU

7KA0

9RC2-4

45

IFA0

10K

3KC7

U.FL-R-SMT-1(10)

1FA1

2

3

1

FFA2

1K0

3KC4

100n

2KC7

5FA0

30R

+3V3-DVBT2-D

5KC0

4u7

IFA4

4u7

5KC1

VCC-TUNER

47R

3KC1

2FAA 10p

3KA2

6K8

47R

3FA3

RES

FFA9

2FAK

10p

330n

5FA4

100n

2KC6

RES3FA8

6K8

2FA4

1n0

IKC1

+5V

IKC0

1K0

3KC6

IFA6

VCC-TUNER

IFA1

100n

2KC4

10p

2KCG

10p2FA9

2FA1

10u

FFA0

FFA1

9FA1

47R

3KC0-36 3

IF-N-DVBT2

TS-CHDEC-DATA

TS-CHDEC-SOP

TS-CHDEC-VALID

TS-CHDEC-CLK

SOC-IF-AGC

IF-AGC

T2-AGC

SDA-TUNER

SCL-TUNER

SOC-IF-P

SOC-IF-N

IF-P-DVBT2

SDA-FE

TS-INT-CLK

TS-INT-VALID

TS-INT-SOP

TS-INT-DATA

RESET-FUSION-OUTn

IF-N-DVBT2

IF-P-DVBT2

T2-AGC

IF-AGC

SCL-FE

Circuit Diagrams and PWB Layouts

EN 76QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-8 B02B, DVBS Front-end

19210_012_120424.eps

120424

DVBS Front-end

B02B B02B

2011-12-06

5

8204 000 9218

DVBS Front-end

VCO

XTAL_OUT

VIA

IP

NC

RF_OUT

QN

QP

IN

RFLNALTMIXDIGBB SYN HS

GND

VCOLNALT MIXDIGBB SYN

VSS

XTAL_IN

XTAL_CMD

SCL SDA

AGC

AS

RF_IN

NC

COM

OUTIN

EN BP

6

5

4

3

DISEQCOUT1

TRST

VS

FSKRX_IN FSKRX_OUT

13

12

11

10

9

XTALI

XTALO

DIRCLK CLKI CLKI2 CLKOUT27

P

3

4 5

N

0 1 2

ERROR

DPN

STROUT

CLKOUT

7

6

P

Q1

RESETB

I1

TMS

0 1

CS

NC

GPIO

2

1

SCLT SDAT

1

TDO

TDI

TCK

AGCRF1

D

1

0

COMP

STDBY

SCL SDA

8

7

DISEQCIN1

N

VIA

VDDA2V5

VDDA1V0

GNDA

GND_HS

VDD1V0

VDD3V3

COM

OUTIN

NC

68P

Affected Pin

2RCB

I2C-ADDRESS : C6

STV6111

NC

-

27

2RBY

NC

4N7

9RB6

-

2RBM

27

NC

9RB8

27

X

Diversity Matrix (Satellite Tuner dependant)

Default Value

STV6110

3RB3

25

NC

I2C-ADDRESS : D0

NC

7

-

X

27

4R7

-

2RBV

NC

2K2

-

27

-

X

27P

100P

X

-

2RB7

9RB7

4,5

NC

2RBU

27P

-

X

NC

4,5

X

JUMP

NC

X

-

NC

9RB9

-

4,5

NC

Position Nr

NC

JUMP

NC

X

NC

10U

NC

-

33N

NC

JUMP

NC

10p

2RBE

NC

4,5

2RBW

100n

2RA2

FRA1

47R

3 6

FRA5

3RA0-3

2RAU

100n

2RA0

10n

2RA6

0p56

2RBG

+3V3RF

RES

+3V3-DEMOD

IRA3

2RAH

100n

2RAF

100n

3RA8

47R

+3V3-DEMOD

2RAN

10n

NX3225GA

16M

24

1

3

1RA0

2RA5

100n

2RBC

10p

2RAE

10n

RES 2RB1

6p8

+3V3RF

RES

2RC7

10p

+2V5-DVBS

10n

2RBK

2RC4

10n

38 39

40 41 42

1

30

31

32

14 82118627

34 35 36 37

18

23 24

20

21

5

4

7

12 13

22

17 3351920193 25 26

19

Φ

SATELLITE

TUNER

STV6110AT

2

16

7RA0

2RB3

1n0

2RBF

10p

1n0

2RB2

100R3RB1-1

1 8

10n

2RAC

2RA8

10n

2RA9

100n

3RA4

1K0

+1V0-DVBS

10n

2RAA

2RC6

22u 16V

1K0

3RA2

IRA9

2RBA

10p

2RB9

43

2

15

7RC0

RT9193-25GB

IRC2

IRC1

RES 2RBT

47p

2RB5

100n

FRA6

100n

2RAT

2RBM

27p

*

2RBD

10p

2RC5

100n

47n

2RB0

2RAY

22u

2RC9

47p

RES

100n

2RAL

100n

2RA4

47R

3RA7

6RA0

SM15T

+2V5-DVBS

IRA2

IRA1

2RAW

100n

2RA7

100n

3RA1

47R

10n

2RAP

135 136 137 138

157 158

132

159 160 161 162 163 164 165

133 134

148

131

149 150 151 152 153 154 155 156

130

139 140 141 142 143 144 145 146 147

96 106

2

3

5 9 13 114 118 123 127

31 33 36 39

21

38

54 76 80 92

85 88

93 99 102 105 110 112

22 25 28

48 51 53 57 61 66 69 72

17

77 81

10

14 113 117 121 125

129

15

42 45

7RA1-2

STV0903BAC

POWER_VIA

Φ

1 4 6

26 23 24 29 27

52122

124

94

8

7

62

97

19

98

18

58

75

111 115 116 119 120

83 84 86 87 89

90 91

44 43

37 35

11 12

82

95 108 109

107

101

34

32

30

55

50

49

47

46

68

70

71

73

59

128 20

78

79

126

103

74

100

40

41

60 56

63

64

65

67

Φ

MAIN

STV0903BAC

7RA1-1

16

104

2RBR

10p

IRA4

22u

2RAG

+3V3

10p

2RBB

1n0

2RBJ

120K

3RA3

2RB8

100p

1K0

9RB0

RES

3RB0

2RAS

100n

2RC3

10K

3RC1

10n

2RAM

2RCA

2p2

100n

2RB6

RES

5RA0

30R

+3V3-DVBS

100n

2RAR

+3V3-DVBS

FRA7

*

3RB3

4R7

FRA8

+3V3-DVBS

2RC0

30R

5RA1

1u0

100p

2RBH

+3V3-DVBS

+3V3RF

1n0

2RB4

100n

2RAV

2RBL

IRA8

22u

30R

5RC0

27n

5RA2

10p

2RBS

+3V3RF

100n

2RAB

2

3

4

5

6 7

8

9 10

1R01

1

3 6

+3V3-DVBS

5

100R3RB1-3

3RB1-4 100R

4

2RA3

10n

2RA1

1 8

3RA0-1

47R

2RC2

1u0

IRC0

+3V3-DVBS

3RC2

10K

RES

22u

2RCE

2RAD

IRC3

27

100n

47R

3RA0-2

10p

2RC8 RES

100n

2RAJ

FRA4

2RBW

FRA3

IRA0

*

33n

100n

9RB6

+1V0-DVBS

2RAK

*

7RC2 BC847BW

1

3 2

7RC1

LD1117DT33

FRC0

FRC1

10p

2RBP

2RBN

10p

*

27p

2RCB

+1V0-DVBS

*

9RB9

IRA7

2RCC

22u

RES

22u

2RCD

FRA2

7

*

2RB7

10u

3RB1-2 100R

2

4n7

2RBU

10K

3RA6

*

1u0

2RC1

FRA0

+5V

+1V0-DVBS

*

9RB8

*

9RB7

2RBY

100p

*

68p

2RBV

RESET-DVBS

SCLT SDAT

AGC

XTAL

*

IM

IP

QM

QP

+V-LNB

AGC

TS-DVBS-DATA

TS-DVBS-CLK

TS-DVBS-SOP

TS-DVBS-VALID

SCL-FE SDA-FE

TS-INT-DATA

TS-INT-VALID

TS-INT-CLK

TS-INT-SOP

F22-DISECQ-TX

QM QP

IM IP

SCLT SDAT

SENSE+1V0-DVBSXTAL

Circuit Diagrams and PWB Layouts

EN 77QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-9 B03A, LVDS fanout

19210_013_120424.eps

120424

LVDS fanout

B03A B03A

2011-12-22

3

8204 000 9237

LVDS fanout

FRA13_CLE FRA14_ALE FRA15_PODA14

FOE FWE

BOOTCS FCE2N FINT1 FINT2 FCLK FAVD_PODA6 FREADY

FRD0_PODD0 FRD1_PODD1 FRD2_PODD2 FRD3_PODD3 FRD4_PODD4 FRD5_PODD5

PODA4

PODA5 POD_A7 POD_A8

FRD10_PODA2 FRD11_PODA3 FRD12_PODA10 FRD13_PODA11 FRD14_PODA12 FRD15_PODA13

FRA0_AD0 FRA1_PODWE FRA2_PODIORD FRA3_PODIOWR FRA4_PODREG FRA5_AD1 FRA6_AD2 FRA7_AD3 FRA8_AD4 FRA9_PODOE FRA10_AD5 FRA11_AD6

POD_A9

PODIREQ

PODRST

PODVS1

PODWAIT

POD_DIR

PODCE1 PODCE2 PODCD1

POD_CD2

POD_VCC_EN POD_VPP_EN

HPD

FRA12_AD7

FRD6_PODD6 FRD7_PODD7 FRD8_PODA0 FRD9_PODA1

LGSEN

CEC

PWRON

PCVS

XTLI24M

XTLO24M

TSSDEN

TSSSYNC

TSSCLK

TSSDI

TS1CLK TS1SYNC TS1DEN

TESTMOD

STB_EN

SPI_EN SFSI SFSO

N

PD

P N

IN

0 1 2

3

SFWPN SFHOLDN SFCES SFSCK

STB_SDA STB_SCL

LED

IR

KYBRD

5 6 7

TS1D

TS2OD

1 2

AVLINK

MUTE

HP_DETECT

STB_RSTO

PCHS

STB_RXD

STB_TXD

0 1 2

3

4 5 6 7

8

DGPIO2

DGPIO1

TAGCO_RF

TAGCO_IF

TS2ODEN

TS2OSYNC

TS2OCLK

RSTN

TESTCON

9

10

STB_GP

P

4 5 6 7

0 1 2

3

4

2FZ5

4n7

4

1 3

2FZ3

100n

24M

1J00

2

FJ14

FJ10

AF22

AJ23

AH23

AD30

AE30

AE29 AD29

GPIO9

A10

R30

AJ22

AH22

AF29

AD28 AD27

AE27

AG30

AF30 AE28

GPIO23

B13

GPIO24

D10

GPIO3

C9

GPIO4

B9

GPIO5

B8

GPIO6

A7

GPIO7

B11

GPIO8

A11

GPIO16

D12

GPIO17

C13

GPIO18

E10

GPIO19

D11

GPIO2

C10

GPIO20

E11

GPIO21

B12

GPIO22

A12

AG23

AK24

GPIO0

B7

GPIO1

B10

GPIO10

C11

GPIO11

A9

GPIO14

A13

GPIO15

C12

AH28 AF24

AF26 AE24 AK25 AH25 AH27 AK27 AJ25 AF25 AG26

AF28 AH30 AG28 AJ30 AJ28 AJ27

AK23

AK26 AG25 AE25 AH26

AG29

AF27 AG27 AG24 AE23 AK22 AJ26

AD26 AH29 AJ29

AJ24

AG22

AE26

AH24

AF23 AK28

AK29

7J00-6

FUSION240

FLASH_CI_GPIO

100n

2FZ4

FJ16

33R

3FZ1

2J11

18p

2J10

18p

FJ15

2FZ1

10p

H30

H29

AE19

AF19 AG19 AH19

AJ19

AF20

AE20

U29

T26

U28

U30

AK20 AE21 AF21 AG21 AH21

AE22

AK21

AK19

AH18

AJ18 AK18

P27

R27

F27

G26

P30 P29

AJ21

AG20 AH20 AJ20

M25

N30 N29 N28 N27 N26 N25 P25

J29

R28

P28

L29

L27

L30

L28 L26 K30

K28

H25

M27 M26

P26

J30

J25

M3

0

H26

J28

J27

E27

E28

R29

J26

K25 K26

M28

T28 T29

K27

F29

F30

M29

TS_TSB_MCU

FUSION240

7J00-7

47p

2FZ6

100R

3FZ0

10p

2FZ2

RESET-STANDBYn

CA-CE2n

CA-CE1n

SDIO1-CLK

MDI1 MDI2 MDI3 MDI4 MDI5 MDI6 MDI7

MIVAL

MISTRT

TS-CHDEC-CLK

TS-CHDEC-VALID

TS-CHDEC-DATA

TS-CHDEC-SOP

F-CEn

SOC-IF-AGC

STB-SCL

STB-SDA

STB-TXD

TEST-CON TEST-MOD

CA-MOCLK

CA-MDO0 CA-MDO1 CA-MDO2 CA-MDO3 CA-MDO4 CA-MDO5 CA-MDO6 CA-MDO7

CA-MOVAL

CA-MOSTRT

MICLK

MDI0

IF-IN-P

IR

KYBRD

LED

LGSEN

AUDIO-MUTEn

PCHS

PCVS

PWRON

SF-CS

SF-HOLDn

SF-CLK

SF-SDI SF-SDO SF-WP

SPI-EN

ENABLE-STANDBY

STB-GP0 STB-GP1

STB-GP10

STB-GP2 STB-GP3 STB-GP4 STB-GP5 STB-GP6 STB-GP7 STB-GP8 STB-GP9

STB-RSTO

STB-RXD

GPIO8

SDIO1-D0

SPEAKER-DETECTn

CA-A04 CA-A05

CA-CD1n

CA-RDY CA-RST

CA-VS1n

CA-WAITn

CA-A07 CA-A08 CA-A09

CA-CD2n

AVLINK1

AMBI-TEMP-FUS

HDMI-CEC

HP-DETECT

IF-IN-N

F-WEn

GPIO0 GPIO1

SDIO1-CMD

AMBI-SPI-CCLK-FUS AMBI-SPI-MOSI-FUS

GPIO18 GPIO19

CTRL-DISP1

GPIO20

ENABLE-3V3-AMBI-FUS

GPIO22 GPIO23 GPIO24

CTRL-DISP2

SDIO1-D1

SDIO1-WP

SDIO1-D2 SDIO1-D3

CA-OEn

CA-D00

CA-A02 CA-A03 CA-A10 CA-A11 CA-A12 CA-A13

CA-D01 CA-D02 CA-D03 CA-D04 CA-D05 CA-D06 CA-D07 CA-A00 CA-A01

F-RDY

CA-A06

TS-DVBS-DATA

TS-DVBS-CLK

TS-DVBS-VALID TS-DVBS-SOP

F-OEn

FRA0

FRA10 FRA11 FRA12 NAND-CLE NAND-ALE

CA-A14

CA-WEn CA-IORDn CA-IOWRn CA-REGn

FRA5 FRA6 FRA7 FRA8

Circuit Diagrams and PWB Layouts

EN 78QFU1.1E LA 10.

2012-Sep-14

back to

div. table

19210_014_120424.eps

120424

UMAC controller

B03B

2011-12-22

3

8204 000 9237

UMAC controller

N

P

N

P

N

P

3

MM1ODT

MM1RESETN

MM1CSN

8

7

6

5

4

3

2

P

N

0 1

MZQ1

MM1ANA_TEST

DDR_RETN

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

N

P

MM1DM

MM1DQS0

MM1DQS1

MM1DQS2

MM1DQS3

MM1A

MM1BA

2

1

0

31

MM1RASN

MM1WEN

MM1CKE

26

25

24

23

22

21

20

19

18

17

16

15

14

13

12

11

10

9

13 14 15

0 1 2 MM0CASN

1

0

MM0ANA_TEST

MZQ0

2

1

0

N

0 1

MM0DQ

MM0DM

MM0A

MM0BA

MM0CK

MM0VREF

MM0DQS0

MM0DQS1

P N

MM0DQS2

P N

MM0DQS3

MM1DQ

21 22 23 24 25 26 27

MM1CK

MM1VREF

MM1CASN

30

29

28

27

3

P N P N

0 1 2

3

4 5 6 7

8

9 10 11 12

31

0 1 2

MM0RASN MM0WEN MM0CKE MM0ODT MM0RESETN MM0CSN

P

3

4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 20

28 29 30

FJ02

3J03

1K0

3J00

240R

AA3

V3

V4

N1

M3

H4

U7 U6

N2

AE7 T7

R3 U1

P1

U3

L5

R4

T3

T2

N4

N3

AA2

AC1

U5

AA4

T5 Y5

U4

W5

V1

V5 Y4

R5 M4

P4

W1

AB1

Y3

AB3

R1

Y1

AC2

Y2

J1

J4

T1 P3

AA1

W3

P2 V2

L4 P5

M5

H2 G3

F4

E1

M1

J5 K1 L3

K3

J2

K5

G1

L1

G5

F1 K2

H1 H3

F3

H5

F5

AF2

AG4

AH4

AG11

AF12

AG15

AE11 AE12

AF11

L2 F2

AH6 AJ8 AK5 AK11 AF9

AK6

AK7

AK10

AJ10

AF1

AD2 AK4 AG3 AJ3 AK2 AK3 AJ2

AJ5

AG5 AJ1

AK8

AG8 AH10 AH9 AG1 AF3 AE3 AH1

AH7

AH2 AD3 AD1

AG14

AJ6 AK9 AE1 AH3

AH8 AH5

AJ11 AG9 AF10

AJ15 AH16 AG17

AD18

AG12 AF14 AK13 AH12

AH13

AJ14

AK14

AF13 AK16 AK12 AF16 AK17 AJ13

AK15 AH15 AH17 AF15 AF17

7J00-8

FUSION240

DDR3

AA7

AJ12 AJ17

FJ05

FJ04

2J02

100n

3J06

1K0 1K0

3J05

FJ03FJ01

DB72

DB71

DB47DB16

DB46DB14

2J03

DB76

100n

DB78

DB77

DB74

DB79

DB73

DB84

DB83

DB82

DB81

FJ00

DB88

DB89

DB87

+1V5-M1

DB86

DB85

100n

2J05

DB80

+1V5-M0

DB75

3J02

1K0

+1V5-M1

2J07

100n

2J06

100n

2J04

240R

3J01

2J00

100p

1K0

3J04

M0-MA0

M0-MVREF0

M1-MVREF1

M0-MA2

M0-MA15

M0-MA14

M0-MA13

M0-MA12

M0-MA11

M0-MA10

M0-MA1

MM0ANA

M0-MA9

M0-MA8

M0-MA7

M0-MA6

M0-MA5

M0-MA4

M0-MA3

M0-CS#

M0-MCLK0 M0-MCLK0#

M0-CKE

M0-CAS#

M0-BA2

M0-BA1

M0-BA0

M0-MD15

M0-MD14

M0-MD1

M0-MD0

M0-DQM3

M0-DQM2

M0-DQM1

M0-DQM0

M0-DQS#2

M0-DQS1 M0-DQS#1

M0-DQS0 M0-DQS#0

M0-MD31

M0-MD2

M0-MD11

MM1ANA

M0-WE#

M0-RESET#

M0-RAS#

M0-ODT

M0-DQS3 M0-DQS#3

M0-DQS2

M0-MD8

M0-MD7

M0-MD6

M0-MD5

M0-MD4

M0-MD3

M0-MD13

M0-MD12

M0-MD20

M0-MD19

M0-MD18

M0-MD17

M0-MD16

M0-MD10

M0-MD9

M0-MD28

M0-MD27

M0-MD26

M0-MD25

M0-MD24

M0-MD23

M0-MD22

M0-MD21

M1-MA13

M1-MA12

M1-MA11

M1-MA10

M1-MA1

M1-MA0

M0-MD30

M0-MD29

M1-MA7

M1-MA6

M1-MA5

M1-MA4

M1-MA3

M1-MA2

M1-MA15

M1-MA14

M1-MCLK0#

M1-CKE

M1-CAS#

M1-BA2

M1-BA1

M1-BA0

M1-MA9

M1-MA8

M1-MD0

M1-DQM3

M1-DQM2

M1-DQM1

M1-DQM0

M1-CS#

M1-MCLK0

M1-DQS#1

M1-DQS0

M1-DQS#0

M1-MD31

M1-MD2

M1-MD15

M1-MD14

M1-MD1

M1-RAS#

M1-ODT

M1-DQS3

M1-DQS#3

M1-DQS2

M1-DQS#2

M1-DQS1

M1-MD5

M1-MD4

M1-MD3

M1-MD13

M1-MD12

M1-MD11

M1-WE#

M1-RESET#

M1-MD18

M1-MD17

M1-MD16

M1-MD10

M1-MD9

M1-MD8

M1-MD7

M1-MD6

M1-MD26

M1-MD25

M1-MD24

M1-MD23

M1-MD22

M1-MD21

M1-MD20

M1-MD19

MM0ANA MM1ANA

M1-MVREF1

DDR-RTN

M0-MVREF0

M1-MD30

M1-MD29

M1-MD28

M1-MD27

10-1-10 B03B, UMAC controller

Circuit Diagrams and PWB Layouts

EN 79QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-11 B03C, UMAC 1 DDR3

19210_015_120424.eps

120424

UMAC 1 DDR3

B03C B03C

2011-12-22

3

8204 000 9237

UMAC 1 DDR3

7

15

8

9 10 11 12 13 14

VREFDQ VREFCA

ZQ

BA0 BA1 BA2

RAS

DQSL

ODT

2

1

0

DMU

DML

RESET

WE

CS

6

5

NC

4

3

CK CK CKE

7

BC AP

VSS

VSSQ

VDD VDDQ

0 1 2

3

4 5 6

DQSU

DQU

0 1 2

3

4 5 6 7

DQL

A

CAS

DQSU

DQSL

7

15

8

9 10 11 12 13 14

VREFDQ VREFCA

ZQ

BA0 BA1 BA2

RAS

DQSL

ODT

2

1

0

DMU

DML

RESET

WE

CS

6

5

NC

4

3

CK CK CKE

7

BC AP

VSS

VSSQ

VDD VDDQ

0 1 2

3

4 5 6

DQSU

DQU

0 1 2

3

4 5 6 7

DQL

A

CAS

DQSU

DQSL

100R

3J1G

100R

3J1F

2J17

100n

2J1R

DB97

DB90

100n

2J1N

100n

2J1M

DB98

10u

2J24

3J2N

100R

3J2M

100R

DBA1

DBA2

DBA8

+1V5-M1

3J15

1K0

DB91

10u

DB66

2J22

DB39

DB65

DB44

DB43

DB42

100R

3J2K

DB31

FJ08

DBA6

DB45

DBA5

DB48

2J1T

100n

DB34

DB32

DB96

DB94

DB95

DB93

DB35

3J2R

100R

100n

2J16

3J1V

100R

3J2D

100R

3J1Y

DB56

DB57

100R

3J1L

3J2L

DBA7

100R

DB40

2J1F

+1V5-M1

10n

100n

2J1Z

100R

3J2P

2J86

10n

3J26

100R

100n

2J20

DB55

DB54

100n

2J1U

3J11

1K0

100n

2J1S

DBA3

DB49

DB01

DB99

2J1J

10n10n

2J1K

100R

3J2G

100R

3J2F

3J1E

100R

100n

2J15

100R

3J28

100R

3J1K

DB38

2J1V

100n

100R

3J2Q

2J1P

100n

3J10

240R

DB36

100R

3J2B

DBA4

3J1J

100R

DB33

3J2S

100R

3J1P

3J1N

100R

3J1M

100R

DB92

75R

3J16

3J1H

100R

3J1B

10n

2J1G

2J1C

DB60

+1V5-M1

10n

2J12

RES

DB52

2J1Q

100n

G1

G9

L3

L8

J8

M1

M9

P1

B1

B9

D1

D8

E2

E8

F9

M8

H1

A9

P9

T1

T9

B3

E1

G8

J2

R9A1A8C1C9D2E9F1H2

H9

K1

J3

T2

B2D9G7K2K8N1N9

R1

C3 C8 C2 A7 A2 B8 A3

J1 J9 L1 L9

F8 H3 H8

G2

H7

F3

G3

C7 B7

D7

M3

K3 J7

K9

K7

L2

E7 D3

E3 F7 F2

M7

P3 N2 P8 P2 R8 R2 T8 R3

M2 N8

N3 P7

L7 R7 N7 T3 T7

7J02

H5TQ2G63BFR-PBC

100R

3J1C

2J1W

100n

FJ09

2J1D

10n

100n

2J14

B9

D1

D8

E2

E8

F9

G1

G9

L3

L8

T1

T9

B3

E1

G8

J2

J8

M1

M9

P1

B1

C9D2E9F1H2

H9

M8

H1

A9

P9

G7K2K8N1N9R1R9A1A8

C1

B8 A3

J1 J9 L1 L9

K1

J3

T2

B2

D9

H7

F3

G3

C7

B7

D7 C3 C8 C2

A7 A2

L2

E7 D3

E3 F7 F2

F8 H3 H8 G2

R8 R2 T8 R3

M2 N8 M3

K3 J7

K9

K7

P7

L7 R7 N7 T3 T7 M7

P3 N2 P8 P2

7J01

H5TQ2G63BFR-PBC

N3

DB58 DB59

DB50

+1V5-M1

2J21

100n

2J81

10n

1K0

3J12

3J2E

100R

DB62

DB41

2J82

10n

100n

2J19

2J1L

100n

240R

3J13

3J19

100R

DB53

+1V5-M1

2J25

10u

100R

3J20

3J1W

100R

+1V5-M1

100R

3J18

2J1A

100n

DB63

DB64

100R

3J2C

2J1E

10n

+1V5-M1

2J18

100n

3J1R

100R

3J2J

100R

10n

2J87

DB51

100n

2J1B

10n

2J85

100R

3J1U

2J89

10n

3J1D

100R

3J17

75R

10n

2J88

3J1S

100R

2J83

10n

+1V5-M1

100R

3J1Z

3J1A

3J2H

100R

3J29

100R

3J24

100R

3J23

100R

3J27

10n

2J84

1K0

3J14

2J1H

10n

100R

3J2T

100R

+1V5-M1

3J22

2J27

47u 16V

+1V5-M1

3J21

100R

3J25

100R

3J2A

100R

3J1T

M1-MD17 M1-MD18 M1-MD19 M1-MD20

M1-DQM1

M1-MD26 M1-MD25 M1-MD24 M1-MD29

M1-MD21 M1-MD22 M1-MD23 M1-MD16

M1-MD0 M1-MD7 M1-MD2

M1-MA15

M1-MD28 M1-MD31 M1-MD30 M1-MD27

M1-DQS#1

M1-DQS0

M1-DQS#0

M1-MD1 M1-MD4 M1-MD3 M1-MD6 M1-MD5

M1-MD15 M1-MD12 M1-MD11

M1-MD8

M1-MD9 M1-MD10 M1-MD13

M1-DQS1

M1-CS#

M1-ODT

M1-CKE

M1-RESET#

M1-MD14

M1-MA8

M1-MA9

M1-MA10

M1-MA11

M1-MA12

M1-MA13

M1-MA14

M1-MA15

M1-BA0

M1-BA1

M1-BA2

M1-RAS#

M1-CAS#

M1-WE#

M1-MCLK0

M1-MCLK0#

M1-MA0

M1-MA1

M1-MA2

M1-MA3

M1-MA4

M1-MA5

M1-MA6

M1-MA7

M1-RESET#

DDR-MVREF12

M1-WE#

M1-RAS#

M1-DQM2

M1-DQM3

DDR-MVREF12

M1-CAS# M1-MCLK0

M1-CKE

M1-MCLK0#

M1-CS#

M1-DQS3

M1-DQS#3

M1-DQS2

M1-DQS#2M1-MA14

M1-ODT

M1-MA10 M1-MA11 M1-MA12 M1-MA13

M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9

M1-BA0 M1-BA1 M1-BA2

M1-ODT

M1-RESET#

DDR-MVREF11

M1-WE#

M1-RAS#

M1-DQM0

DDR-MVREF11

M1-MA0 M1-MA1

M1-MA10 M1-MA11 M1-MA12 M1-MA13 M1-MA14

M1-MA2 M1-MA3 M1-MA4 M1-MA5 M1-MA6 M1-MA7 M1-MA8 M1-MA9

M1-BA0 M1-BA1 M1-BA2

M1-CAS# M1-MCLK0

M1-CKE

M1-MCLK0#

M1-CS#

Circuit Diagrams and PWB Layouts

EN 80QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-12 B03D, UMAC 0 DDR3

19210_016_120424.eps

120424

UMAC 0 DDR3

B03D B03D

2011-12-22

3

8204 000 9237

UMAC 0 DDR3

7

15

8

9 10 11 12 13 14

VREFDQ VREFCA

ZQ

BA0 BA1 BA2

RAS

DQSL

ODT

2

1

0

DMU

DML

RESET

WE

CS

6

5

NC

4

3

CK CK CKE

7

BC AP

VSS

VSSQ

VDD VDDQ

0 1 2

3

4 5 6

DQSU

DQU

0 1 2

3

4 5 6 7

DQL

A

CAS

DQSU

DQSL

7

15

8

9 10 11 12 13 14

VREFDQ VREFCA

ZQ

BA0 BA1 BA2

RAS

DQSL

ODT

2

1

0

DMU

DML

RESET

WE

CS

6

5

NC

4

3

CK CK CKE

7

BC AP

VSS

VSSQ

VDD VDDQ

0 1 2

3

4 5 6

DQSU

DQU

0 1 2

3

4 5 6 7

DQL

A

CAS

DQSU

DQSL

DB18

3J3Z

100R

DB67

DB09

2J3H

10u

+1V5-M0

100R

3J3H

DB70

10n

2J2H

3J3K

100R

DB12

DB13

DB05

2J2L

10n

2J2P

10n

DB00

DB02

+1V5-M0

2J3G

10u

100R

3J45

3J4B

100R

100n

2J2C

10n

2J2Y

FJ0A

100R

3J4J

3J3F

100R

10u

2J3J

DB10

2J30

10n

DB17

2J2R

10n

2J2U

10n

2J2N

10n

100R

+1V5-M0

3J3P

2J2J

10n

100n

2J3E

100n

2J38

+1V5-M0

FJ0B

100R

3J49

DB27

10n

2J2S

100R

3J42

10u

2J3F

3J44

100R

3J3G

100R

+1V5-M0

3J3Y

100R

2J39

100n

DB20

DB19

DB11

100n

2J31

100R

3J39

DB69

DB30

100R

3J4N

3J4L

100R

3J4P

100n

2J34

2J2K

10n

3J3C

100R

DB61

2J2D

100n

100R

3J4A

100R

3J3J

100n

2J2B

3J32

75R

3J43

100R

+1V5-M0

100R

3J3D

2J33

100n

3J34

100R

3J4H

DB07

2J2A

100n

DBC2

DBC3

10n

2J2W

2J3K

47u 16V

10n

2J2T

3J4C

100R

3J30

1K0

2J2F

100n

G9

L3

L8

M1

M9

P1

B1

B9

D1

D8

E2

E8

F9

G1

H1

A9

P9

T1

T9

B3

E1

G8

J2

J8

A1A8C1C9D2E9F1H2H9

M8

J3

T2

B2D9G7K2K8N1N9R1R9

C8 C2 A7 A2 B8 A3

J1 J9 L1 L9

K1

H3 H8 G2 H7

F3 G3

C7 B7

D7 C3

K3 J7

K9

K7

L2

E7 D3

E3 F7 F2 F8

P3 N2 P8 P2 R8 R2 T8 R3

M2 N8 M3

N3 P7

L7 R7 N7 T3 T7 M7

+1V5-M0

H5TQ2G63BFR-PBC

7J04

+1V5-M0

3J47

100R

+1V5-M0

100n

2J29

100n

2J35

3J3L

100R

3J46

100R

3J3R

2J3D

100n

2J3C

100n

2J37

100n

2J36

100n

240R

3J2U

DBC6

10n

2J2Z

DBC5

3J37

100R

DBB8

DBB4

DBB0

DBB1

100R

3J4E

3J3T

100R

3J35

2J32

100n

100R

3J3W

100R

3J4G

3J4F

100R

1K0

3J2V

100R

3J48

100R

3J3S

2J28

100n

10n

2J2M

100R

3J3M

3J3B

100R

DB04

75R

3J33

DBC4

3J38

100R

DB68

DBB9

DBB5

3J2Z

240R

100R

3J3V

100R

3J4D

100n

2J2E

DB15

DB08

3J2W

1K0

DB26

2J2V

10n

100R

3J4M

DB25

DB29

100R

3J3A

G1

G9

L3

L8

100R

3J3N

J8

M1

M9

P1

B1

B9

D1

D8

E2

E8

F9

M8

H1

A9

P9

T1

T9

B3

E1

G8

J2

R9A1A8C1C9D2E9F1H2

H9

K1

J3

T2

B2D9G7K2K8N1N9

R1

C8 C2 A7 A2 B8 A3

J1 J9 L1 L9

F8 H3 H8 G2 H7

F3 G3

C7 B7

D7 C3

M3

K3 J7

K9

K7

L2

E7 D3

E3

F7

F2

P3 N2 P8 P2 R8 R2 T8 R3

M2 N8

N3 P7

L7 R7 N7 T3 T7 M7

7J03

H5TQ2G63BFR-PBC

100n

2J3B

10n

2J2G

DBC7

DBC0

DBC1

DB23

DBB6

DBB2

DBB3

DB22

DB21

3J3U

100R

DBA9

+1V5-M0

100R

3J3E

3J40

100R 100R

3J41

100n

2J3A

DB03

2J01

10n

RES

1K0

3J31

DB24

100R

3J36

DBB7

M0-MCLK0

M0-MCLK0#

3J4K

100R

M0-RESET#

M0-MA15

M0-DQM1

M0-MA10

M0-MA11

M0-MA12

M0-MA13

M0-MA14

M0-MA15

M0-BA0

M0-BA1

M0-BA2

M0-RAS#

M0-CAS#

M0-WE#

M0-CS#

M0-ODT

M0-CKE

M0-MA0

M0-MA1

M0-MA2

M0-MA3

M0-MA4

M0-MA5

M0-MA6

M0-MA7

M0-MA8

M0-MA9

M0-MD17 M0-MD21 M0-MD19 M0-MD22

M0-RAS#

M0-DQM2

M0-DQM3

DDR-MVREF02

M0-MA14

M0-ODT

M0-RESET#

DDR-MVREF02

M0-WE#

M0-MD16 M0-MD18 M0-MD20 M0-MD23

M0-MD27 M0-MD30 M0-MD31 M0-MD24

M0-DQS3

M0-DQS#3

M0-DQS2

M0-DQS#2

M0-BA1 M0-BA2

M0-CAS# M0-MCLK0

M0-CKE

M0-MCLK0#

M0-CS#

M0-MD29 M0-MD28 M0-MD25 M0-MD26

M0-MA0 M0-MA1

M0-MA10 M0-MA11 M0-MA12 M0-MA13

M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9

M0-BA0

M0-MD7 M0-MD2 M0-MD1 M0-MD6 M0-MD3

M0-RAS#

M0-DQM0

DDR-MVREF01

M0-DQS#1

M0-DQS0

M0-DQS#0

M0-MA14

M0-ODT

M0-RESET#

DDR-MVREF01

M0-WE#

M0-MD0 M0-MD5 M0-MD4

M0-MD12

M0-MD9 M0-MD10 M0-MD11 M0-MD14 M0-MD13

M0-MD8

M0-DQS1

M0-MA0 M0-MA1

M0-MA10 M0-MA11 M0-MA12 M0-MA13

M0-MA2 M0-MA3 M0-MA4 M0-MA5 M0-MA6 M0-MA7 M0-MA8 M0-MA9

M0-BA0 M0-BA1 M0-BA2

M0-CAS# M0-MCLK0

M0-CKE

M0-MCLK0#

M0-CS#

M0-MD15

Circuit Diagrams and PWB Layouts

EN 81QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-13 B03E, DDR fanout

19210_017_120424.eps

120424

DDR fanout

B03E B03E

2011-12-22

3

8204 000 9237

DDR fanout

PR_R3

Y_G4 PB_B4 PR_R4

FS1 FB1

FS2

AR_1 AL_1 AR_2 AL_2 AR_3

AOR2

AOL2

SCKI2SOUT

WSI2SOUT

I2SCLK

SPDIFO

FB2

AL_3 AR_4 AL_4 AR_5 AL_5 AR_6 AL_6

SCKIN WSI2SIN

SDI2SIN

SPDIFIN

GPANA1

CVBS CVBS2 CVBS3 CVBS4

C

Y_G1 PB_B1 PR_R1

Y_G2 PB_B2 PR_R2

Y_G3 PB_B3

1 2

3

1 2

SDI2SOUT

CVBS_OUT

HPHOL

HPHOR

SUBO

SPK_AOR1

SPK_AOL1

TXD

RXD

SDAM1

SCLM2

SDAM2

SCLM3

SDAM3

TCK TMS TDO TDI TRSTN

SCLS

SDAS

SCLM1

TX6_P TX6_N

TX7_P TX7_N

HTPDN LOCKN

IDP_HPD

H_BK_LITE

PWM0 PWM1

BOOST

BKLGON

TCON_ON

TX0_P TX0_N

TX1_P TX1_N

TX2_P TX2_N

TX3_P TX3_N

GBE_MDC GBE_MDIO

RX0_P RX0_N RX1_P RX1_N RX2_P RX2_N RXC_P RXC_N

HEAC

PWR5V

RREF

D1_P D1_N USBPPON1 TXRTUNE1

D2_P D2_N USBPPON2 TXRTUNE2

GBE_RXD0 GBE_TXD0 GBE_RXD1 GBE_TXD1 GBE_RXD2 GBE_TXD2 GBE_RXD3 GBE_TXD3

GBE_RXC GBE_TXC

GBE_RXEN GBE_TXEN

TX4_P TX4_N

TX5_P TX5_N

IJ12

FJ0H

3J09

10R

3J07

10R

IJ13

A20

B20

C20

D20

IJ11

AA30 AA29 AB28

A26

D26 E26

B25

A25

C21

Y27B26

A19

B19

C19

D19

A18

B18

C18

D18

Y26C26

A16

A14 B14

B17

A17

C17

D17

AC28

B21 A21

Y25

D25

A22

E22

A23

E23

A24

E24

C16

C15 A15 B16

B22

D22

B23

D23

B24

D24

C25

AV_IN_OUT

FUSION240

7J00-4

10R

3J52

10R

3J50

FJ0G

9GA2

10R

3J08

E12

D13

C14

Y28

Y29

AA28

D1

AA26

U26

AA27

E2

AA25

U27

D14

E13

I2C

UART_JTAG

7J00-9

FUSION240

3J51

10R

IJ10

FJ0J

AB26

AB25

C4

C5

A5

B5

B6

A6

C6

C7

AB27

AC27

C30

B30

C8

B2

A2

C2

C3

A3

B3

B4

A4

E5

E4 D2

T30

C29

B29

A29

B28

A28

B27

A27

U25

V29

V28

V27

V26

V30

T27

D4

A8

D5

AB30

AC29

AC30

W25 Y30

V25

W29

W28

W27

W26

W30

PANEL_USB

LAN_IO

FUSION240

7J00-5

D3

E3

AB29

FJ0F

CVBS-OUT2

SCKI2SOUT

WSI2SOUT

SDI2SOUT1 SDI2SOUT2 SDI2SOUT3

I2SCLK

USB1-RREF

USB2-RREF

RXD-SERVICE

SCL-M1

SCL-M2

SCL-M3

SCL-S

SDA-M1

SDA-M2

SDA-M3

SDA-S

EJT-TCK

EJT-TDI

EJT-TDO

EJT-TMS

EJT-TRSTN

TXD-SERVICE

CVBS-OUT2

V1-TX3N

V1-TX3P

V1-TX4N

V1-TX4P

V1-TX5N

V1-TX5P

V1-TX6N

V1-TX6P

V1-TX7N

V1-TX7P

HDMIF-RX2-

HDMIF-RX2+

HDMIF-RXC-

HDMIF-RXC+

BL-SPI-SDO-FUS

V1-TX0N

V1-TX0P

V1-TX1N

V1-TX1P

V1-TX2N

V1-TX2P

EN-TXD0

EN-TXD1

EN-TXEN

HEAC

V1-HTPDn

BL-SPI-CLK-FUS

V1-LOCKn

3D-LR-FUS

BL-SPI-CS_BL-I-CTRL-FUS

PWR5V

RREF

HDMIF-RX0-

HDMIF-RX0+

HDMIF-RX1-

HDMIF-RX1+

Y-G2

Y-G3

BKLGON-FUS

BL-DIM-FUS

USB1-DM

USB1-DP

USB2-DM

USB2-DP

EN-MDC EN-MDIO

EN-RXC

EN-RXD0

EN-RXD1

EN-RXEN

EN-TXC

AL-1

AL-3

AL-4

AL-6

AR-1

AR-3

AR-4

AR-6

CVBS

CVBS3

CVBS-OUT1

FB1

FS1

HPHOL

HPHOR

PB-B1

PB-B2

PB-B3

PR-R1

PR-R2

PR-R3

SPDIFO

Y-G1

Circuit Diagrams and PWB Layouts

EN 82QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-14 B03F, Fusion power supply

19210_018_120424.eps

120424

Fusion power supply

B03F B03F

2011-12-22

3

8204 000 9237

Fusion power supply

VDD_1V2

VDDM0

VDDF1

VDDF_STB

VDDF2

VDDCVDDC VDDC VDDM1

VSS VSS VSS

VDDC

AVSSH

DAC1

AVDDH

AVSSH

DAC2

AVSS

VSSA_LPLL

VDD25_LPLL

AVDDH_DRX

AVDD

AVDDL_DRX

VREFAU

SGNDAU

AVDDL_CH234

INN16

AVSSL_CH234

VDD33_XTAL

AVDDH_CH234

AVSS_STB

AVSSH_CH234

AVDD33_STB

AVDDL_CH516

AVDDH_CH516

AVSSL_CH516

AVSSH_DRX

AVSSH

AVSSH_CH516

2

34INN

AVDDH

VDDE2V5

VDD33A

GNDE2V5

VSS11A_2

VDD11A

VSS11A_1

AVDD25_HDMI

VSS11A_3

LDO11_CAP

VQPS

VDDA2V5

GNDA1V1

GNDA2V5

VDDA1V1

VDD2V5_M0P

VSS_M1P

VDD2V5_M1P

VSS_M0P

VDD25

VSSAC_1

VDD33

VSSAC_2

IJ02

IJ03

2J69

10n

+1V2-FA

+2V5

10n

2J68

IJ14

2J5T

100n

+1V1-FD

+3V3

+2V5-F

10u

2J59

120R

IJ0C

5J0G

IJ05

5J09

120R

2J7J

10u

2J7H

10u

2J73

100n

10u

2J92

2J99

10n

IJ0N

+2V5-F

2J98

10n

IJ0L

10u

2J7L

IJ0P

2J7K10n

2J6D

120R

5J0N

+3V3

2J6F

10n

+1V5

2J72

100n

10u

2J4Z

100n

2J78

2J7V

+2V5

10u

2J55

100n

10u

2J5P

2J62

100n

2J7R

10n

2J7Y

10n

2J6Z

100n

2J6W

100n

2J7C

100n

+1V1-FA

5J0F

120R

100n

2J4P

IJ0F

2J5G

5J0K

120R

10n

4n7

2J4R

10u

2J7E

2J46

4u7

IJ0D

100n

2J45

100n

2J76

1u0

2J4W

2J4H

+3V3

100n

5J04

120R

100n

2J7Z

2J7W

+3V3

100n

120R

5J0H

10n

2J7U

IJ01

100n

2J3T

2J5R

100n

+1V2-FA

2J3R

100n

IJ0H

120R

5J0B

100n

10n

2J23

2J4M

2J09

100n

2J4J

2J7G

2J4Y

10u

IJ0M

+1V2-FA

2J6H

10n

120R

5J00

2J6E

10u

2J4S

10n

2J7S

10n

100n

2J75

+2V5

2J74

100n

IJ04

2J60

2J80

10n

100n

10u

2J64

2J6B

10n

2J63

10u

2J4F

10n

2J6A

100n

IJ0E

10n

2J6C

5J0M

120R

+1V5-M0

2J67

10n

+3V3

2J47

100n

10u

2J7F

2J08

220u 2V0

+1V2-MIPS

2J77

100n

2J3Z

2J5S

+1V5-M1

100n

2J94

10n

5J0D

120R

+1V5

+3V3-STANDBY

2J95

10n

2J54

10n

2J53

100n

10u

2J4A

IJ00

10u

2J4E

100n

2J4D

10n

2J93

2J6G

120R

5J0E

10n

120R

5J0L

10n

2J4G

F24

E14

H28

D21

L15

K15

J24

E17

E18 E19 E20

C22 C23 C24 E25 F22 F23

K16

E30 G27 G28 H27

F20 G20

F15 F16

E21 F21

F28

G22 G23

F18 G18

G15 G16

L17

K17

L16

G17

B15

D15

E15

G29 G30F19

G19

D16 E16

E29

SUPPLY_1

FUSION240

7J00-1

K24

F17

120R

5J0A

100n

2J5V

RES

100n

2J49

120R

5J08

+2V5-F

100n

2J5Z

10n

2J66

9J03

2J7B

100n

IJ0B

2J4L

1u0

10u

120R

5J06

2J4N

2J4B

100n

+3V3

2J5L

10n

2J6J

10n

2J6Y

10n

2J6P

10n

2J97

K19

K20

AE2

N10

AA16

AA17

AA18

AA19

P24

AB2

U24

V24

W24

A30

AK30

K13

K14

K18

R18

W2

U18

Y18

L19

N19

R19

U19

Y19

AD20

AD21

AG16

U2

AJ16

N17

R17

U17

Y17

AD17

AE17

L18

N18

R2

U15

AD15

AE15

N16

R16

U16

Y16

AD16

AE16

M2

R13

U13

AG13

L14

N14

R14

U14

AH14

N15

R15

G2

AJ7

AJ9

AG10

N11

AH11

N12

R12

U12

L13

N13

L6

V6

W6

Y6

J7

K7

L7

V7

W7

Y7

AG2

J3

G4

T4

W4

AJ4

N5

AA5

J6

K6

AK1

AC5

G6

H6

M6

N6

W14

W15

W16

Y15

AA15

A1

P11

V11

P12

V12

P10

V10

AC4

W10

Y10

AB5

AB6

AC6

G7

H7

M7

N7

AB4

P7

R7

AB7

AC7

AF5

AE6

AF6

AG6

AF7

AG7

K4

P6

R6

T6

AA6

AF4

AD12

AD13

AE13

AD14

AE14

AA10

AA11

AA12

AE5

AE4

AD8

AE8

AF8

AD9

AE9

AD10

AE10

W11

Y11

AD11

AF18

AG18

AD19

AD22

AD23

G24

H24

T24

R24

R25

R26

F7

AE18

Y24

AA24

AD24

F25

G25

T25

AD25

F26

R21

T21

G8

U21

V21

W21

Y21

AA21

AA20

T10

D9

F6

P14

F8

K10

L10

M10

M21

K21

L21

N21

P21

E8

U20

V20

W20

Y20

G21

L24

M24

L25

T11

D8

P19

T19

V19

W19

L20

M20

N20

P20

R20

T20

E7

P17

T17

V17

W17

M18

P18

T18

V18

W18

M19

D7

M15

P15

T15

V15

M16

P16

T16

V16

M17

T12

E6

W12

M13

P13

T13

V13

W13

M14

T14

V14

D6

E9

F9

G9

F10

G10

F11

G11

M11

M12

7J00-3

FUSION240

PWR_GND

2J3S

10u

120R

5J0P

10u

+3V3

2J48

10u

2J40

IJ0J

10n

2J6V

10u

2J3U

10n

2J5Y

2J4C

IJ0K

10u

+2V5-F

2J61

100n

2J4V

10u

2J3N

2J5C

100n

2J5B

100n

1n0

5J01

120R

2J58

10u

2J56

U11 R10 U10

10n

2J5M

D27

C27

D28

AC25

AB24

Y12 Y13

Y14 AA13 AA14

R11

AD5

AC24

D30

G12

F12

G13

F13

B1 C1

N24

K12

F14 G14

K29

C28

AC26

AD6

AD7

AC3

AD4

SUPPLY_2

FUSION240

7J00-2

D29

L11

K11

L12

5J0R

120R

5J03

100n

2J4T

10n

2J96

+1V1-FA

2J52

10u

IJ0G

10u

2J42

2J5A

10u

2J41

100n

2J70

IJ06

IJ07

10n

2J6U

10n

2J6T

2J7T

10n

100n

2J91

2J5U

100n

2J65

10n

2J5K

10n

120R

5J05

100n

2J7D

IJ09

5J02

120R

2J3P

100n

2J5D

10n

2J6R

+3V3-STANDBY

2J3Y

10u

2J6N

10n

IJ0A

2J50

2J51

100n

2J5W

2J44

10u

2J3W

+3V3

2J3V

10u

100n

5J0C

120R

2J7A

IJ08

5J07

100n

+3V3-STANDBY

120R

10n

2J7P

+3V3

IJ0R

10n

2J6M

IJ0S

2J5H

10n

100n

2J3M

2J43

100n

2J4U

2J5N

10n

10u

2J79

100n

9J04

2J71

100n

2J90

100n

5J0J

120R

10n

2J5F

2J6L

10n

2J6S

10n

SENSE+1V1-FD

Circuit Diagrams and PWB Layouts

EN 83QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-15 B04A, Control

19210_019_120424.eps

120424

Control

B04A B04A

2011-12-22

4

8204 000 9229

Control

VSS

VDD

SCL

SDA

SC1

SD0 SC0

SD1

27

3CVH-2

47R

3CVJ

47R

3 6

47R

3CVM

47R

3CVH-3

BM03B-SRSS-TBT

1 2

3

45

ICV2

DBG

1CWB

1 2

3

45

RES

DBG

BM03B-SRSS-TBT

1CWC

3GM1

100K

10R

RES

10R

3CV9RES

3CV8

3CVK

47R

+3V3

3CVL

10K

47R

3CV3

3GM4

100K

3CVB

4K7

RES

4K7

3GM5

47R

3CVS

3CV5

10R

3CV7

47R

RES

10K

3CVN

RES

9CV0

6

3

1 8

4K7

3CVV-3

3CVH-1

47R

*

3CV1

47R

FCV9

4K7

3CVV-2

7

2

9GM1

*

9GM2

*

8

1

9GM3

RES

4K7

3CVV-1

3CV4

10R

1 2

3

4 5 6

7 8

DBG

1CV2

BM06B-SRSS-TBT

47R

3CV6

FCVA

3CVP

47R

FCV3

ICV1

47R

3CVG

3CVF

47R

FCV2

3CVA

47R

1 2

3

45

DBG

BM03B-SRSS-TBT

1CWA

FCV7

+3V3

4K7

3GM7

7GM2 PDTC114EU

1

3

2

RES

FCV4

4K7

3GM6

10K

3CVT

FCV1

100n

2CV7

FCV6

+3V3

4

10K

3CVU

4K7

3CVV-4

5

+3V3

47R

3CV2

3CVR

10K

+3V3-STANDBY

RES

FCV5

9GM4

9CV1

+3V3

1 2

3

45

DBG

1CV1

BM03B-SRSS-TBT

+3V3-STANDBY

4K7

FCV8

+3V3

3CVZ

100K

3GM3

100K

3GM2RES

47R

3CVH-4

45

4

7

2

36

+3V3

PCA9540BGD

5

8

1

SDA-BE

BL-DIM-FUS BL-DIM

BL-SPI-SDO-FUS AMBI-SPI-MOSI

BL-SPI-CLK-FUS AMBI-SPI-CCLK

7GM1

SCL-BL

SCL-BE

SDA-DISP

SDA-BL

SDA-BE

SDA-DISP SCL-DISP

SDA-BL SCL-BL

POWER-OK

SCL-BE

POWER-OK

TXD-RF4CE

RXD-RF4CE

SCL-BE SCL-BL

SDA-BE SDA-BL

SCL-BE SCL-DISP

SDA-BE SDA-DISP

SCL-DISP

SDA-DISP

SCL-BL

SDA-BL

SCL-DISP

GPIO24 IRQ-SRFn

GPIO0 TXD-RF4CE

GPIO1 RXD-RF4CE

GPIO23 IRQ-EXPANDERn

IRQ-SRFn

TXD-RF4CE

RXD-RF4CE

IRQ-EXPANDERn

3D-LR-FUS 3D-LR

ENABLE-3V3-AMBI-FUS ENABLE-3V3-AMBI

AMBI-SPI-CCLK-FUS AMBI-SPI-CCLK

AMBI-SPI-MOSI-FUS AMBI-SPI-MOSI

GPIO19

GPIO20

GPIO22 RESET-HDMI-MUXn

EJT-TRSTN

EJT-TMS

EJT-TDO

EJT-TCK

EJT-TDI

SCL-M2 SCL-BE

SDA-M2 SDA-BE

GPIO8 CTRL-DISP3

Circuit Diagrams and PWB Layouts

EN 84QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-16 B04B, V-by-One out

19210_020_120424.eps

120424

V-by-One out

B04B B04B

2011-12-22

4

8204 000 9229

V-by-One out

SHARP

SAMSUNG

SHARP

SAMSUNG

100R

3GVJ

RES

BGVN

FGVZ

BGVF

3GW8 100R

3GVC

100R

RES

2GWM 1n0

3GWE 10R

2GWF

100n

100R

3GVB

2GVM

100p

3GVH

1K0 RES

BGV6

IGV4

9GW0

9GV3-4

2GVK

10p

2GWB

100n

10p

2GWL

100n

2GV2

IGV8

10K

3GV1-2

RES

2GW6

100n

3GVE

10R

2GWE

100n

10R3GWD

100n

2GW4

BGVM

FGUE

3GV8

100R

BGVH

100n

2GV6

3GV5

10K

2GWJ

100n

RES

BGV9

3GV1-1

10K

100n

2GVC

100n

2GWD

9GV5

FGV1

10R

3GVD

BGVL

BGV4

3GV1-3

10K

RES

10K

3GV1-4

+3V3

BGV5

IGVA

2GVH

100n

100R

3GVG

2GV4

100n

BGV8

BGVG

FGV4

2GV1

1u0

RES

100R

3GV7

100n

2GWH

IGV7

BGVD

2GV3

100n

BGVA

BGV7

IGVD

+3V3

2GV8

100n

BGV3

3GV9

100R

IGV6

100n

2GWG

2GW3

100n

2GWC

FGV8

+VDISP

BGVE

10p

2GVL

10K

3GV6

2GWA

100n

100p

2GVN

58 59

60

BGVB

7

8

9

526153

54 55

56 57

43

44

45

46

47

48

49

5

50

51

6

34

35

36

37

38

39

4

40

41

42

24

25

26

27

28

29

3

30

31

32

33

14

15

16

17

18

19

2

20

21

22

23

20519-051E

1G55

1

10

11

12

13

IGVB

9GV4

9GV3-2

9GW1

3GWH

100R

3GW7 100R

2GVG

100n

2GVP

2GV9

100n

2GVR

100n

100R3GWF

FGV0

FGUB

FGV6

100R

3GVF

100n

2GVA

+3V3

100n

2GVB

IGVC

BGVJ

BGVC

BGV1

100n

2GW8

2GV5

100R

3GVA

2GWK

10p

FGV5

9GV1

FGUC

FGV7

IGV5

100n

2GW9

BGV2

FGV9

2GVD

100n

2GVF

2GW7

100n

3GWG

100R

100n

2GVJ

BGVK

FGUD

2GVE

100n

FGUA

9GV3-3

IGV3

100n

2GV7

IGVE

FGW0

100n

2GW5

3D-LR

V1-LOCKn

V1-HTPDn

CTRL-DISP3

BL-DIM

3D-LR-DISP

CTRL-DISP1

CTRL-DISP3

SDA-DISP

CTRL-DISP3

SCL-DISP

BL-ON

SPLASH-ON

3D-LED_3D-RF

SDA-DISP

SCL-DISP

CTRL-DISP2

V1-TX0N

V1-TX4N V1-TX4P

V1-TX0P

V1-TX1N V1-TX1P

V1-TX2N V1-TX2P

V1-TX5N V1-TX5P

V1-TX6N V1-TX6P

V1-TX7P

V1-TX7N

V1-TX3N V1-TX3P

Circuit Diagrams and PWB Layouts

EN 85QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-17 B04C, V-disp output

19210_022_120424.eps

120424

V-disp output

B04C B04C

2011-12-22

4

8204 000 9229

V-disp output

VDISP-SWITCH

5

3

4

PUMD12

7GS3-1

2

6

1

7GS3-2

PUMD12

27K

3GS6

3GS4

47K

RES

1 8

IGS4

1

2

3

9GS1-1

7GS1

5

6

7

8

4

+3V3

RES

SI4835DDY-GE3

3GS3

4K7

IGS3

1

2

5

6

3

4

IGS5

SI3443CDV

7GS2

1u0

IGS2

RES

2GS4

RES

3GS2

47R

+12V

RES

IGS7

+2V5

2GS3

22n

22K

2

RES

3GS7

PDTC114EU

7GS5

1

3

7GS4 PDTC114EU

1

3

2

RES

5

RES

3 6

9GS2-4

RES

4

RES

27

RES

9GS2-3

1 8

9GS2-2

9GS1-4

45

RES

9GS2-1

RES

3 6

RES

9GS1-2

27

9GS1-3

2GS5

RES

47R

3GS1

100n

T

IGS1

IGS6

32V3.0A

1GS1

2GS1

22u

RES

DBG

6GS1

LTST-C190KGKT

RES

220u 2V0

2JW1

2JW2

2V0220u

FGS2

+1V1-FD

DBG

3GS5

4K7

100n

RES

+VDISP

2GS2

FGS1

LCD-PWR-ONn

Circuit Diagrams and PWB Layouts

EN 86QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-18 B04D, Connector - Backlight

19210_023_120424.eps

120424

Connector backlight

B04D B04D

2011-12-22

4

8204 000 9229

Connector backlight

VIN

VOUT

GND

EN

FLG

EN

10p

2GD3

100R

3 6

FGDB

3GD3-3

2GD2

10p

FGD3

FGD7

FGDD

FGDG

4

3

2

5

1

RT9715EGB

7GD1

FGD5

+3V3

10p

2GD6

1u0

2GD5

FGDE

IGD3

10u

2GD8

FGDC

T63V1.0A

1GD1

3GD5

10R

3GD9

27

FGD4

1 8

100R

3GD3-2

100R

3GD3-1

FGD6

9GD1

FGDA

FGD8

100R

3GD6

8

9

16

17

3GD1

10R

11 12 13 14 15

2

3

4 5 6 7

FH52-15S-0.5SH

1

10

10R

1G53

10p

3GD2

2GD12GD4

10p

FGD9

2GD7

10p

2GD9

10u

3GD8

10R

330R

3GD7

DBG

6GD1

LTST-C190CKT

DBG

IGD2

BL-SPI-CLK-FUS

BL-SPI-CLK

BL-SPI-SDO-FUS

BL-SPI-SDO

BL-SPI-CS_BL-I-CTRL-FUS

BL-SPI-CS_BL-I-CTRL

BKLGON-FUS

IGD1

SDA-BL

BL-SPI-CLK

BL-SPI-SDO

BL-DIM

BL-SPI-CS_BL-I-CTRL

SCL-BL

Circuit Diagrams and PWB Layouts

EN 87QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-19 B04E, Tuner CVBS Debug

19210_024_120424.eps

120424

Tuner CVBS debug

B04E B04E

2011-12-22

4

8204 000 9229

Tuner CVBS debug

IFW5

33p

IFW1

RES

2FW3

2FW5

100p

1u8

5FW3

RES

150R

3FW5

RES

3FW8

75R

SERSER

+5V

RES

3FW7

150R

3FW4

470R

5

3

4

RES

1

RES

BC847BPN(COL)

7FW1-2

BC847BPN(COL)

7FW1-1

2

6

10K

3FW6

RES

3FW3

10K

RES RES

RES

2FW4

47u

DFW1

RES

2FW6

270p

DFW2

IFW2

IFW3

IFW4

CVBS-OUT1

Circuit Diagrams and PWB Layouts

EN 88QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-20 B04F, Audio - Video

19210_025_120424.eps

120424

Audio - video

B04F B04F

2011-12-22

4

8204 000 9229

Audio - video

IVW7

IVW4

IVW3

8K2

3VW5

150R

3VWM

+3V3

3VWV

150R

3VWL

33K

3VWT

150R

3VWS

9VW2

100n

2VW3

8K2

3VW9

2VW1

100n

2VW7

2VW6

100n

3VW7

8K2

3VW4

33K

2VWK

1u0

3VWK

8K2

150R

IVW2

3VWN

IVW8

8K2

3VWD

IVW5

RES

3VWF

4K7

3VWR

150R

33K

3VW6

1u0

2VWD

1u0

8K2

2VWC

3VW3

RES

33K

3VWJ

1u0

2VWF

2VW4

100n

33K

3VWA

9VW6

9VW5

100n

2VWB

100n

2VW9

2VW8

100n

2VW2

9VW1

2VW5

100n

3VWB

8K2

1u0

2VWJ

RES

3VW8

33K

3VWP

2VWE

1u0

150R

RES

1u0

2VWH

33K

3VWE

3VWW

10K

RES

IVW1

8K2

3VWH

9VW4

3VWC

33K

RES

RES2VWG

1u0

2VWA

100n

4K7

3VWG

RES

150R

3VWU

IVW6

AR-4

AL-4

AL-6

AUDIO-MUTEn

VGA-LIN AL-3

VGA-RIN AR-3

CVBS1

AL-1

SC-RIN

SC-LIN

V-SYNC-VGA

PCVS

H-SYNC-VGA PCHS

AR-6

PR-R2

Y-G3

PB-B3

PR-R3

SC1-G

SC1-B

SC1-R

SC1-STATUS FS1

SC1-BLK FB1

YPBPR-RIN

AR-1

YPBPR-LIN

CVBS

SC1-CVBS CVBS3

G1-VGA Y-G1

B1-VGA

PB-B1

R1-VGA

PR-R1

Y1-IN Y-G2

PB1-IN PB-B2

PR1-IN

Circuit Diagrams and PWB Layouts

EN 89QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-21 B04G, EMMC

19210_026_120424.eps

120424

EMMC

B04G B04G

2011-12-22

4

8204 000 9229

EMMC

DATA

CMD

CLK

RST

VDDI

VSS VSSQ

VCCQ VCC

0 1 2

3

4 5 6 7

NC

3EJ0

10K

100n

2EJ6

3EJ2-3

4K7

3 6

H10

2EJ7

100n

J10

C2

C4N2N5

P4

P6

G5

E7

K8

B5 B6

K5

C6M4N4P3P5E6F5

K9

M6

M5 A3

A4 A5 B2 B3 B4

+3V3

MAIN

H26M21001ECR

7EJ0-1

100n

2EJ4

100n

2EJ3

1 8

+3V3

3EJ2-1

4K7

+3V3

FEJ5 FEJ6

FEJ4

+3V3

FEJ3

+3V3

4K7

3EJ1

100n

FEJ0

2EJ2

4K7

3EJ2-4

45

27

+3V3

4K7

3EJ2-2

FEJ1

+3V3

FEJ2

+3V3

100n

2EJ1

+3V3

2EJ5

100n

L13 L14

M1 M2

M3M7M8M9M10

M11

K7 K10 K12 K13 K14

L1 L2 L3

L12

A12 J2

J3

J5 J12 J13 J14

K1 K2 K3

A11

K6

G13

G14

H1 H2 H3

H5 H12 H13 H14A10

J1

F10

F12

F13

F14

G1

G2

G3

G10

A9

G12

E5E8E9

E10

E12

E13

E14

F1

A8

F2

F3

D1

D2D3D4

D12

D13

D14

E1

A7

E2

E3

C5 C7 C8 C9 C10 C11 C12

A6

C13 C14

B7 B8 B9 B10 B11 B12 B13

A2

B14 C1 C3

P1P2P7

P8P9P10

B1

P11

P12

P13

P14

N6N7N8N9N10

A14

N11

N12

N13

N14

A1

A13

M12

M13

M14

N1

N3

NC

H26M21001ECR

7EJ0-2

VDDI

SDIO1-CMD SDIO1-D0

SDIO1-D1

SDIO1-D2

SDIO1-D3

SDIO1-CLK

SDIO1-D0 SDIO1-D1 SDIO1-D2 SDIO1-D3

RST

SDIO1-CMD

SDIO1-D3

VDDI

RST

SDIO1-CLK

Circuit Diagrams and PWB Layouts

EN 90QFU1.1E LA 10.

2012-Sep-14

back to

div. table

Circuit Diagrams and PWB Layouts

19210_027_120424.eps

120424

Second source DC-DC converters

B04H B04H

2011-12-22

4

8204 000 9229

Second source

DC-DC converters

COMP

FB

SW

BOOT

SS

EN

VIN

GND

GND HS

VIA

SW

BOOT

EN

VIN

GND

GND HS

VCC

FB

+12Vb

+3V3

100n

2UR1

33R

3UR3-2

33R

IUR4

3UR3-3

FUR1

22u

2UR8

IUR8

2UR2

1n0

+5V

2UR9

22u

2URH

100p

RES

3URF

13K

CUR5

IUR9

30R

5UR3

33R

GND-3V3r

3UR3-1

1n0

2URJ

1%

GND-3V3r

68K

3URA

+3V3

2URB

3UR4

1M0

100n

10u

5UR6

IURA

3UR6

12K 1%

10u

2UR7

+12Vb

FURA

IURE

1M0

RES

1%

3URC

100n

22K

3URB

2UR3

2UR0

1n0 1n0

2UR4

33R

3UR3-4

2UR5

10u

GND-3V3r

141516

17

18

GND-3V3r

19 20 21

2223242526

11 12 13

7UR6-2

RT8293AHGSP

10

1

6

7

5

4

9

8

3

2

7UR6-1

RT8293AHGSP

100n

2UR6

IURB

3u6

5UR2

IURF

GND-3V3r

IURC

30R

5UR5

IURK

IURD

3UR5

68K

1%

2URG

3n3

2URA

22u

4

5

6

8

9

2

3

7

1

151617

18

7URA-1

RT8288AZSP

21

2223242526

11 12 13

14

7URA-2

RT8288AZSP

10 19 20

IUR2

10n

GND-3V3r

2URF

5UR1

30R

IUR0

1M0

3UR7

2URE

IUR3

100n

22u

2URD

2URC

22u

ENABLE+3V3

DETECT12V

10-1-22 B04H, Second source DC-DC converters

EN 91QFU1.1E LA 10.

2012-Sep-14

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div. table

10-1-23 B04I, IR Debug

19210_028_120424.eps

120424

IR debug

B04I B04I

2011-12-22

4

8204 000 9229

IR debug

+3V3-STANDBY

ICVW

2CVW

1u0

10R3CVY

1

GND1

GND2

4

3

OUT

2

VS

100R3CVW

TSOP75236

7CVW

RC_IRQ-RF4CEn

Circuit Diagrams and PWB Layouts

EN 92QFU1.1E LA 10.

2012-Sep-14

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div. table

10-1-24 B05A, Class-D amplifier

19210_029_120424.eps

120424

Class-D amplifier

B05A B05A

2011-12-16

4

8204 000 9220

Class-D amplifier

VR_ANA

D

PVDD

AVDD DVDD

OUT

VR_DIG

VREG

RESET PDN

PLL_FLTP PLL_FLTM

PBTL

SSTIMER

C

OUT_A

BST_A

BST_B

OUT_B

OUT_C

BST_C

BST_D

OUT_D

OC_ADJ

OSC_RES

VIA

ADDOGND GND_HS

STEST

AGND

LRCLK SCLK MCLK

SDIN

SDA SCL

GVDD

AB CD

PGND

VSS

AB

A_SEL

Left+

TAS5731P1

LeftRight-

Right+

ID62

2D90

100n

ID69

RES

1

3

2

PUMH2

7D50-1

FD66

PDTC144EU

7D71

ID81

2D79

33n2D80

33n

16V100u

2D5D

2D55

220n

2D73

10n

ID50

2D98

10n

1D55

+3V3D

10u

2D72

5D80

30R

ID87

30R

5D81

RES

10R

3D63

ID96

2D70

10n

10K

3D82

3D51

470R

100n

2D74

10u

2D92

FD32

FD51

ID52

3D81

ID58

100R

10n

2D87

16V100u

2D49

ID84

RES

9D50

9D54

2D89

220n

330p

2D75

ID53

2D53

4n7

1u0

2D67

ID59

2D5B

100u 16V

2D88

330p

47R

3D56

5D74 10u

FD69

ID78

18K2

3D71

5D83

30R

5D72

+3V3D

30R

5D71

10K

3D79

18R

3D73

2

3

4

1D01

2041145-4

1

2D52

47n

RES

ID77

22K

3D70

ID89

+3V3D

ID54

ID75

FD52

5D51

30R

+3V3D

10n

2D81

ID90

1D50

10n

2D91

2D94

330p

10K

3D78

ID66

5D79

10u

9D52

10K

1D54

3D50

100n

2D69

ID91

ID98

FD30

FD50

4K7

3D80

16V100u

2D5A

100u16V

10n

2D76

2D48

3D58

1R0

2D84

10u

2D96

1u0

2D93

RES

10u

5D76

10u

2D86

ID85

2D99

10n

ID99

30R

5D75

FD67

ID57

REF EMC HOLE

1X02

1D56

10n

2D78

ID61

+12V-AUDIO

ID65

3D74

18R

220n

2D56

10u

2D59

4n7

2D50

10u

5D70

47n

2D51

ID51

2D97

10u

ID97

FD64

ID82

2D65

220n

ID55

5D00

30R

ID80

1D53

3D72

18R

9D53

RES

+3V3D

RES

+3V3D

1D52

9D55

FD33

33n

2D85

2D77

100n

470R

3D52

ID56

1 2

3

FD31

1D02

2041145-3

FD70

ID83

30R

5D50

FD65

ID79

220n

2D62

3D61 10R

+3V3D

10K

3D62

18R

3D75

2D58

10u

12

18

51

69

52 53 54 55 56 57 58

31

50

59 60 61 62 63 64 65 66 67 68

413435

25

24

21

23

22

6

26

483738

10

11

23444540

15

7

16

1

46

39

36

8

19

47

43

42

33

27

28

17

29

49

5

32

20

AUDIO

AMPLIFIER

30 13

9

14

4

TAS5711PHP

7D60

2D54

7D50-2 PUMH2

2n2

5D01

30R

2D64

220n

ID63

30R

5D77

330p

2D95

ID76

3D55

47R

30R

5D85

ID88

+3V3

9D51

FD63

ID94

10u

2D57

15K

3D77

2D60

10u

2D66

10u

100n

2D68

+3V3-STANDBY

CD00

45

3D60

10K

1D35

502386-0370

1 2

3

3D76

10K

RES

1R0

3D57

ID70

10K

3D83

10u

2D63

ID93

1D51

30R

5D78

3D54

33n

2D82

47K

2

7D70 PDTC144EU

1

3

2D61

+12V-AUDIO

220n

2D83

220n

2D71

2D5C

100u 16V

AUDIO-MUTE

SPEAKER-R+

SPEAKER-L+

SPEAKER-R-SPEAKER-L-

D-RESET

AUDIO-MUTE

DETECT12V

A-STBY

SDI2SOUT3

A-STBY

RESET-FUSION-OUTn

AUDIO-MUTEn

SCKI2SOUT

SPEAKER-DETECTn

SPEAKER-R-

SPEAKER-R+

SPEAKER-L-

SPEAKER-L+

I2SCLK

D-RESET

SPEAKER-L-

SPEAKER-R-

SCL-SSB

SDA-SSB

SDI2SOUT1

WSI2SOUT

Circuit Diagrams and PWB Layouts

EN 93QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-25 B05B, Analogue externals

19210_030_120424.eps

120424

Analogue externals

B05B B05B

2011-12-16

4

8204 000 9220

Analogue externals

VGA

SCART

1VAM

6n8

2VAB

6VAC

CDS4C12GTA

12V

RES

2VA3

47p

C2S1

FVA1

1VAB1VAC

RES

6VAH

47R

3VAK

CDS4C12GTA

12V

FVA6

FVA0

FVA7

3VA8

1K0

47p

2VA4

1K0

3VA7

2VA8

100p

FVA5

2VAC

100p

3VAG

75R

6VA3

RES

12V

CDS4C12GTA

3VA5

4K7

1VAD

12V

CDS4C12GTA

6VAD

RES

FVAB

FVAC

1VAN

FVA9

FVAF

RES

6VA9

CDS4C12GTA

12V

CDS4C12GTA

12V

6VAF

RES

6VA4

2VAJ

PDZ2.4B(COL)

100p

75R

3VAE

100p

2VAA

FVA2

1VAG

5 6 7

8

9

16

17

10 11 12 13 14 15

2

3

4

1VA5

1216-02D-15L-2EC

1

3VA3

150R

100p

2VAK

100p

2VAH

C2S4

PDZ2.4B(COL)

12V

CDS4C12GTA

6VA7

RES

6VAB

FVCF

FVA8

47p

2VA2

100R

3VAD

RES

6VA6

CDS4C12GTA

12V

1VAJ

150R

3VA2

3VAC

75R

FVAG

1VAH

RES

6VAE

CDS4C12GTA

12V

2VAD

1u0

C2S5

FVAD

FVAE

1VAP

3VA0

10K

IVA1

RES

IVA0

C2S2

6VA2

CDS4C12GTA

12V

12K

3VA9

RES

1VAF

FVAA

C2S7

FVCG

2VA6

FVCE

47p

2VA1

47p

12V

CDS4C12GTA

6VA5

RES

150R

3VAF

100p

2VAE

2VA9

6n8

1VAA

4K7

3VA6

FVAH

2VAG

100p

12V

CDS4C12GTA

6VAG

RES

10K

3VA1

FVA4

1VAK

150R

3VA4

FVA3

1VAL

100p

2VAF

3VAH

100R

C2S3

25 26

22

23

24

3

4

5

6

7

8

9

13

14

15

16

17

18

19

2

20

21

1VA1

49045-0011

1

10

11

12

12V

CDS4C12GTA

6VA8

RES

12V

CDS4C12GTA

6VA1

RES

2VA7

47p

RES

6VA0

CDS4C12GTA

12V

C2S6

1K5

3VAA

2VA5

47p 47p

2VA0

3VAJ 100R

1VAE

C2S8

75R

3VAB

12V

CDS4C12GTA

6VAA

RES

SC1-STATUS

DRX1+ DRX1-

DRX2+ DRX2-

DRXC+

GND

YPBPR-LIN

YPBPR-RIN

Y1-IN

PB1-INDRXC-

PR1-INPR1-IN

1SBVC1SBVC

VGA-SDA-EDID-HDMI

H-SYNC-VGA

V-SYNC-VGA

DRX0+ DRX0-

R1-VGA

G1-VGA

B1-VGA

VGA-SCL-EDID-HDMI

+5V-VGA

SC1-R

SC1-CVBS

SC1-DETECTn

SC1-BLK

SC-RIN

SC-LIN

SC1-B

SC1-G

Circuit Diagrams and PWB Layouts

EN 94QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-26 B06A, HDMI

19210_031_120424.eps

120424

HDMI

B06A B06A

2011-12-06

5

8204 000 9223

HDMI

R1X1P R1X2N R1X2P

DSDA2

R2X0P

R2X1N R2X1P R2X2N R2X2P

DSDA3

CEC_A

R0PWR5V R1PWR5V R2PWR5V R3PWR5V R4PWR5V R5PWR5V_VGA

HDMI_RSVD

CBUS_HPD0 CBUS_HPD1

R4X0P

R4X1N R4X1P R4X2N

CBUS_HPD2 CBUS_HPD3 CBUS_HPD4

HECN

21D

DV21DDVA33DDV

33 VCC33 VCC5

HECP

DSDA0 DSCL0

R0XCN R0XCP R0X0N R0X0P

R0X1N R0X1P R0X2N R0X2P

DSDA1 DSCL1

R1XCN R1XCP R1X0N R1X0P

R1X1N

GPIO_MCON

RESET

TPWR_CI2CA

INT

DSCL2

R2XCN R2XCP R2X0N

TXCN

TXCP TX0N TX0P

TX1N TX1P TX2N TX2P

RSVDL1 RSVDL2

DSCL3

R3XCN R3XCP R3X0N R3X0P

R3X1N R3X1P R3X2N R3X2P

DSDA4 DSCL4

R4XCN R4XCP R4X0N

R4X2P

DSDA5_VGA DSCL5_VGA

TVDD12

MICOM SBEPWR

GND_HS

VIA

ETH_RX1P ETH_RX1N

ETH_TX1P ETH_TX1N

SPDIF_IN

CSCL

CSDA

VIA

VIN

VOUT

GND

EN

FLG

EN

ADJ

VOUT

NC

EN

VIN

HSGND

GND

VDD

PGOOD

HDMI CONNECTOR 4

pin (43)

0XB2

HDMI CONNECTOR 3

HDMI CONNECTOR 2

pin (79)

pins (35,88)

pin (64)

pins (7,16,34,89)

pin (98)

HDMI CONNECTOR 5

pin (25)

I2C ADDRESS

1V2 DVB-T2 and HDMI 5-1 mux (8000 and 9000 series)

HDMI CONNECTOR 1

47K

1 8

75R

RES

3HAB-1

54

3HAU

EIN-5V

3HAB-4

47K

DIN-5V

1u0

2HA6

18

3HAL-1

47K

1 8

MICOM-VCC33

3HAC-1

3HA8

10R

2HAD

FHAE

10u

2K2

3HA6

3HAA-2

47K

72

100n

2HAS

SBVCC5

REF EMC HOLE

1X01

+3V3-STANDBY

AIN-5V

BC847BW

RES

7HA4

CIN-5V

+3V3-STANDBY

FHAA

BIN-5V

RES

3HB1

4K7

VDD12

+3V3

CIN-5V

47R

CIN-5V

3HAV

10R

3HAN

3HBJ

4R7

2HB3

100n

3HB9

4R7

DIN-5V

3 6

3HAA-3

47K

4K7

3HBM

6HA1

PDZ2.4B(COL)

1 8

100n

2HAU

3HAA-1

47K

30R

RES5HA0

27K

3HBS

+5V

FHAG

CIN-5V

FHAJ

FHAD

9

2021 2223

17 18 19

2

3

4 5 6 7

8

1

10 11 12 13 14 15 16

4R7

1H05

3HBD

FHB4

EIN-5V

+3V3

3HB5

4R7

100n

2HAV

27

BIN-5V

4K7

3HA1-2

2HA9

10u

3HAC-2

47K

72

3HBL

4R7

27

EMC HOLE

1X08

3HAL-2

47K

3HBF

4R7

100p

2HB0

+5V-EDID

6HA0

BAT54 COL

RES

3HB2

22K

4R7

4K7

45

3HBC

3HA1-4

7HA2

RES

BC847BW

22K

3HBR

9HA1

30R

5HA4

5HA9

30R

AIN-5V

BIN-5V

AIN-5V

3K3

3HA5

RES

4K7

3HA9

108 109 110

112 113 114 115 116 117

103 104 105 106 107

87 86

35

88

71634

89

102

111

78

64

36

76

79

85 84

83 82 81 80

29

30 31 32 33

26 27

65

68

77

75

19 20

21 22 23 24

17 18

60

28

100

56

10 11

12 13 14 15

8

9

90 91

51

1 2

3

4 5 6

99

40 39

67

52

47

92 93

94 95 96 97

57

61

43

38

37

42

41

101

69

63

70

45

49

54

73

58

62

44

48

53

72

25

98

46 50 55 74 59

66

71

+3V3

7HA0

SII9387ACTUC

10u

2HAR

100n

2HAM

100n

2HB2

4R7

10u

3HBE

2HAJ

FHA3

4R7

3HBH

+1V2-FE

4 5 6 7

8

9

2021 2223

12 13 14 15 16 17 18 19

2

3

1H04

1

10 11

1u0

2HA1

3HAS

47K

54

10R

3HAA-4

10R

3HA3

30R

5HA3

10u

2HAF

4K7

RES

2HA2

1u0

3HB0

100n

2HAT

FHAL

FHA9

FHB3

EIN-5V

FHAY

BIN-5V

3HB7

4R7

FHAH

100n

2HAL

FHA1

4R7

3HBG

4K7

1 8

3HA1-1

2HAN

100n

FHA8

REF EMC HOLE

1X09

DIN-5V

3HB6

4R7

1u0

RES5HA1

10R

3HA2

3HAW

FHAK

4R7

47R

3HBB

2HAY

100n

FHAS

2HB1

AVDD12

10u

100R

3HB3

FHAF

EIN-5V

5HA2

MICOM-VCC33

30R

TVDD12

FHB2

+5V

RES

3HAR

75R

12 13

141516

17

0181 19 20 21

2223242526

11

+5V

7HA1-2 RT9025-12GSP

100n

2HAC

RES

4R7

3HB8

+5V-EDID

10u

2HB4

+1V2-FE

10R

3HA0

3HBP

10K

3 6

10u

2HAA

2223

4K7

3HA1-3

2

3

4 5 6 7

8

9

2021

10 11 12 13 14 15 16 17 18 19

1H03

1

FHB7

FHB9

EPWR33

+5V

FHAC

2HAP

100n

FHBB

FHB6

FHB1

10p2HA7 RES

FHAR

390R

5HA5

3HAT

RES

+5V-EDID

30R

5HA6

FHA5

RES

TVDD12

3HA4

10R

FHAW

+1V2-FE

2HA0

FHA6

1u0

FHAN

2HAE

100n

FHB8

AVDD12

2HB5

1u0

FHA2

FHBA

FHB0

FHB5

3HAP

10K

+3V3

10u

2HAKRES

FHAP

1u0

2HA5

DIN-5V

FHA4

2HAB

1u0

SBVCC5

VDD12

+3V3

100n

RES

2HAG

4R7

3HBA

7HA3

8

9

2021 2223

BC847BW

16 17 18 19

2

3

4 5 6 7

1H02

1

10 11 12 13 14 15

22K

3HB4

8K2

3HBN

1u0

2HA4

7HA5

4

3

2

5

1

AIN-5V

RT9715EGB

RES

2HA8

1u0

FHAV

FHA7

2HAW

10u

FHA0

4R7

3HBK

6 7

8

9

2021 2223

13 14 15 16 17 18 19

2

3

4 5

1

10 11 12

RES

1H01

2HAH

100n

VDD33

EPWR33

3 6

3HAB-3

47K

9HA0

4K7

6

3

FHAM

3HAY

RES

RT9025-12GSP

72

8

9

5

1

4

VDD33

7HA1-1

FHAB

+1V5

47K

72

3HAB-2

RESET-HDMI-MUXn

DDRX2+

DDRX2-

DDRX1+

DDRX1-

DDRX0+

DDRX0-

DDRXC+

DDRXC-

ERXC-

VGA-DETECT

+5V-VGA

ERX2-

ERX2+

VGA-SDA-EDID-HDMI

ERX-DDC-SDA

DRX-DDC-SDA

CRX-DDC-SDA

BRX-DDC-SDA

ARX-DDC-SDA

VGA-SCL-EDID-HDMI

ERX-DDC-SCL

DRX-DDC-SCL

CRX-DDC-SCL

ARX-DDC-SCL

HARC0

ERX2+

ERX2-

ERX1+

ERX1-

ERX0+

ERX0-

ERXC+

DDRX1+

DDRX2-

DDRX2+

ERX-DDC-SDA

ERX-DDC-SCL

ERX-HOTPLUG

ERX-DDC-SDA

ERX-DDC-SCL

PCEC-HDMI

ERXC-

ERXC+

ERX0-

ERX0+

ERX1-

ERX1+

CRX2+

DRX-DDC-SDA

DRX-DDC-SCL

DRX-HOTPLUG

DRX-DDC-SDA

DRX-DDC-SCL

PCEC-HDMI

DDRXC-

DDRXC+

DDRX0-

DDRX0+

DDRX1-

BRXC-

BRXC+

BRX2+

CRX-DDC-SDA

CRX-DDC-SCL

CRX0-

CRX0+

CRX1-

CRX1+

CRX2-

CRX-HOTPLUG

CRX-DDC-SDA

CRX-DDC-SCL

PCEC-HDMI

CRXC-

CRXC+

ARX1+

ARX2-

ARX-HOTPLUG

ARX-DDC-SDA

ARX-DDC-SCL

PCEC-HDMI

ARXC-

ARXC+

ARX2+

BRX-DDC-SDA

BRX-DDC-SCL

BRX0-

BRX0+

BRX1-

BRX1+

BRX2-

BRX-HOTPLUG

BRX-DDC-SDA

PCEC-HDMI

CRXCCRXC+ CRX0CRX0+

CRX1CRX1+ CRX2CRX2+

ARX-DDC-SDA

ARX-DDC-SCL

ARX0-

ARX0+

ARX1-

ARX0+

ARX1ARX1+ ARX2ARX2+

BRX-DDC-SCL

BRXCBRXC+ BRX0BRX0+

BRX1BRX1+ BRX2BRX2+

SCL-SSB

SDA-SSB

SPDIFO

HARC4

HDMI-CEC

PCEC-HDMI

ARX-HOTPLUG BRX-HOTPLUG CRX-HOTPLUG

ERX-HOTPLUG

DRX-HOTPLUG

ARXCARXC+ ARX0-

HDMIF-RX2+

HDMIF-RX2-

HDMIF-RX1+

HDMIF-RX1-

HDMIF-RX0+

HDMIF-RX0-

HDMIF-RXC+

HDMIF-RXC-

ARC-SiI

BRX-DDC-SCL

HARC1

HARC2

HARC3

Circuit Diagrams and PWB Layouts

EN 95QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-27 B06B, HDMI-ARC

19210_032_120424.eps

120424

HDMI-ARC

B06B B06B

2011-12-06

5

8204 000 9223

HDMI-ARC

G8

7

8X

0

2

0

VCC

2

3

0

1

5

4

7

6

GNDVEE

BC847BS(COL)

7HD1-1

3HDE

100R

3HD6

56R

100R

3HDS

FHD3

IHD0

FHD1

IHD9

15

12

1

5

2

4

3

6

8

11

10

9

16

7

13

14

74HC4051PW

7HD0

MDX

100R

3HD9

56R

3HDM

+5V

FHD6

FHD7

BC847BS(COL)

+3V3-ARC

7HD1-2

3HDG

56R9HD7

+3V3-ARC

IHD6

IHD5

3HDK

100R

IHDL

3HD4

100R

2HD7

100n

10p

2HD0

82R

3HDNRES

IHD3

10p

2HD5

IHD8

10p

2HD3

2K2

3HDC

100R

3HDT

RES

2HD9

100n

9HD8

IHDM

FHD2

30R

5HD5

IHDJ

IHDK

3HDB

56R

IHD4

IHD2

FHD0

3HDJ

330R 330R

3HD8

7HD3 BC847BW

3HD3

9HD4

IHDF

330R

2HD4

FHD5

10p

FHD4

+3V3-ARC

9HD6

IHD7

3HD7

2K2

+3V3-ARC

100n

2HDD

IHDH

+3V3-ARC

3HD2

2K2

5HD3

30R

2HD1

10p

+3V3-ARC

BC847BS(COL)

7HD2-2

330R

9HD5

+3V3-ARC

3HDD

2K2

FDH3HDH3

680R

9HD1

30R

5HD4

+3V3-ARC

3HDA

680R

30R

5HD2

5HD1

30R

+5V-ARC

3HD1

56R

680R

3HD5

IHDG

+3V3

100n

2HD8

30R

5HD0

330R

3HDR

3HD0

680R680R

3HDL

100n

2HDB

9HD2

+3V3-ARC

RES

BC847BS(COL)

7HD2-1

2HDC

9HD0

10u

1u0

2HD6

IHD1

2HDA

100n

3HDP

2K2

30R

5HD6

FHD8

HARC1

HARC2

HARC3

HARC4

HARC0

ARC1

ARC2

ARC3

ARC4

ARC0

ARC1

ARC2

ARC3

ARC4

HDMI-ARC

ARC-SEL0

ARC-SEL1

ARC-SEL2

HDMI-ARC

ARC0

Circuit Diagrams and PWB Layouts

EN 96QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-28 B06C, USB

19210_033_120424.eps

120424

USB

B06C B06C

2011-12-06

5

8204 000 9223

USB

VCC_A_3

VCC_D

XIN

XOUT

DD1DD1+ OVR1

DD2-

VIA3 VIA4

VCC

VCC_A_1

VCC_A_2

DD2+ OVR2

DD3- DD3+ OVR3

DD4DD4+ OVR4

VREG RESET SELFPWR GANG RREF

GND_HS

TEST|SCL

SDA

D-

D+

VIA1 VIA2

+T

NC

+T

1 2

3

4

56

+5V

5401

1E03

9EA2

100n

2EA5

RES

FEA3

100n

2EA2

+3V3

2EA3

+5V

100n

cEC1

2EA4

100n

+3V3

IEA2

FEA1

9EA4

2EA0

18p

FEAA

+5V-HDD

+3V3

3EA7

+5V-PORTB

RES

9EA3

cEC4

0R4

31 32 33

28

10

11

8

26

22

18

27591421

30

16

1 2

23

29

25

24

20

19

17

3

4

6 7

12 13

15

7EA0

CY7C65632-28LTXCT

3EA5

100K

cEC2

10n

2EA8RES

FEA6

100n

2EA7

3EA4 680R

+5V-HDD

3EA8-3

100K

+5V-PORTB

12M

1EA0

100n

2EAB

+3V3

3EAD-2

9EA1

100K

RES

+3V3-USBS

cEC0

FEA5

RES

10K

3EA2

9EA5

2EA9

100n

2EAA

100n

100K

+3V3

3EAD-3

FEA8

+3V3-USBS

+5V

3EA8-4

100K

FEAB

3EA8-1

4

56

1 2

3

0R4

3EAC

1E02

5401

FEA4

FEAC

10K

+5V-PORTA

3EA3

3ECH

0R4

10K

3EA0

FEA2

IEA1

100K

3EAD-1

+5V-PORTA

+5V

18p

2EA1

3EA8-2

100K

3EAD-4

2EA6

100n

100K

FEA7

3EA1

10K

3EA6

RES

FEA9

IEA3

FEAE

1 2

3

4

56

+3V3

1E01

5401-3C2-100-70

FEAD

USB2-DM USB-HDD-DM

USB2-DP USB-HDD-DP

USB1-DM USB-MAIN-DM

USB1-DP USB-MAIN-DP

USB-PORTA-OC

USB-PORTB-OC

USB-HDD-DM USB-HDD-DP

RESET-FUSION-OUTn

USB-PORTB-DM USB-PORTB-DP

USB-PORTA-DM USB-PORTA-DP

USB-MAIN-DM USB-MAIN-DP

USB-SET-DM USB-SET-DP

USB-PORTB-OC

USB-PORTA-OC

RESET-FUSION-OUTn

USB-PORTB-DM USB-PORTB-DP

USB-PORTA-DM USB-PORTA-DP

Circuit Diagrams and PWB Layouts

EN 97QFU1.1E LA 10.

2012-Sep-14

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div. table

10-1-29 B06D, Service

19210_034_120424.eps

120424

Service

B06D B06D

2011-12-06

5

8204 000 9223

Service

V+

V-

VCC

C1+

C1-

C2+

T2

T1

IN

IN OUT

OUT

GND

T1

C2-

R2

R1

T2

R1 R2

HOTEL TV

FCS4

100n

2CS2

100n

2CS3

2CS1

100n

701

2

6

16

2CS0

100n

4

5

15

2131 98

4111

RS232

ST3232C

7CS1

1

3

1 2

3

45

Φ

6

BM03B-SRSS-TBT

1CWE

3CS4-3

47R

3

+3V3

FCS1

1CS0

81

1CS1

4

47R

3CS4-1

3CS4-4

47R

5

PDZ5.1B(COL)

6CS1

PDZ5.1B(COL)

6CS0

47R

3CS4-2

27

+3V3

FCS0

10K

3CS0

3

4

51E06

MSJ-035-75C-B-RF-PBT-BRF

1

2

3CS1

10K

47R

3CS3

3CS2

47R

FCS2

9CS1

FCS5

TXD-HTV-TTL

RXD-HTV-TTL

TXD-HTV-RS232

RXD-HTV-RS232

FCS3

RXD-SERVICE

TXD-SERVICE

TXD-HTV-TTL

RXD-HTV-TTL

RXD-HTV-RS232 RXD-HTV-TTL

TXD-HTV-TTL TXD-HTV-RS232

Circuit Diagrams and PWB Layouts

EN 98QFU1.1E LA 10.

2012-Sep-14

back to

div. table

10-1-30 B06E, Ethernet

19210_035_120424.eps

120424

Ethernet

B06E B06E

2011-12-06

5

8204 000 9223

Ethernet

TCT

TD+

TX-

TXCT

TX+

TD-

RD+

RX-

RXCT

RX+

RD-

RDTC

RD+

RX-

RXCT

RX+

RD-

RDTC

TCT

TD+

TX-

TXCT

TX+

TD-

VIA

VDDH_REG

VDDIO_REG

TRXP0 TRXN0 TRXP1 TRXN1

CLK_RMII

CRS_DV

LX

RXD0 RXD1

RX_ER

TX_EN

TXD0

XTLI

XTLO

CLK_25M

RST

RBBIAS

RES0 RES1

AVDDL

VIA

MDIO INT

NC

MDC

GND_HS

TXD1

LED_ACT LED_RES

LED_10_100

DVDDL

VDD33

AVDD33

RES

FEF2

10K

3EFW

7EF1

BC857BW

RES

7

6

FEF0

5EF7-2

9

10

11

8

VDDH-2V5

FEF7

RES

2EFG

1u0

2EFD

470p

+3V3-STANDBY

10K

3EFN

1u0

2EFF

DEF0

RES

10K

3EFK

RES

6EF2-1

CDA5C16GTH

16V

18

14

15

16

5EF3-1

RES

3

2

1

100n

2EF1

FEFA

10K

3EFG

RES

AVDDL-1V1

100n

2EFA

+3V3-LAN

IEF1

MGH7S

5EF3-3

RES

4 5

12 13

2

1

14

15

16

5EF7-1

3

RES

3EFF

10K

3EFE

2EF9

10u

RES

4u7

5EF1

2EFU

100n

FEF6

FEF4

100n

2EF7

2EF3

100n

1M0

3EFY

3EFV

10K

RES

FEF5

10n

2EFT

RES 9EF2

VDD33-PHY

1K5

3EF3

FEF8

8

9

VDDH-2V5

1 2

3

4 5 6 7

1E00

98435-111LF

100n

10K

3EF4

2EFJ

3EF7

510R

RES

FEF3

3EFL

10K

3EFM

3EF2 1%

2K37

3EF1 RES

22R

15p

2EFM

RES

10K

3EFU

10K

RES

3EFT

CDA5C16GTH

16V

RES

6EF2-3

36

VDD33-PHY

2EFE

RES

470p

2EFR

1n0

22p

2EFB

3EFH

10K

3EFJ

10K

3EF0

75R

RES 100K

3EG1

30R

5EF6

5EF5

30R

100n

2EF5

LTST-C190KGKT

RES

2EF4

100n

RES

6EF0

2EFP

100n

RES

LTST-C190KGKT

6EF1

VDD33-PHY

22u

2EFV

FEF9

2EFH

100n

75R

3EG3

FEFE

100n

FEFC

9EF1

2EF8

510R

3EF6

RES

15p

2EFK

1u0

2EF0

3EG2

75R

22R

3EF5

FEFB

RES

3EFS

10K

25M

1EF0

5EF4

6EF2-2

RES

27

30R

2EFN

15p

16V

CDA5C16GTH

RES

10K

3EFR

2EFC

22p

30R

5EF0

RES

VDD33-PHY

VDDH-2V5

2EFS

10n

100n

2EFZ

VDD33-PHY

10u

2EF2

16V

CDA5C16GTH

6EF2-4

45

RES

FEF1

4546474849

50

5

4

42

51 52 53 54 55 56 57 58

43

44

10

13

9

12

34 35

32

3

8

27

18 19

36 37

7

26 31

1

29 28

25

41

20

24

21 22

2

40 39

15 16

14

61117

23

33 30

38

10

11

8

7

6

7EF0

AR8030-AL1A-R

5EF3-2

RES

9

100n

2EFL

RES

2EF6

VDD33-PHY

15p

3EFP

10K

47R

3EG0

RESET-ETHERNETn

TXP

RXP

RXN

TXN

EN-RXEN

LED-ACT

LED-RES

EN-RXD0 EN-RXD1

RX-ER

TXN

RXN

TXP

RXP

EN-TXD0 EN-TXD1

EN-TXEN

EN-RXD0

EN-RXD1

EN-RXEN

RES0

RES1

RX-ER

LED-RES

LED-ACT

EN-RXC

CLK-RMII

CLK-25M

EN-TXC

EN-MDC

EN-MDIO

RES0 RES1

CLK-25M

IRQ-WOLANn

CLK-RMII

EN-RXD0

EN-RXD1

EN-RXEN

RES0

RES1

RX-ER

LED-RES

LED-ACT

Circuit Diagrams and PWB Layouts

EN 99QFU1.1E LA 10.

2012-Sep-14

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10-1-31 B06F, NAND-Flash & EEPROM

19210_036_120424.eps

120424

NAND-Flash & EEPROM

B06F B06F

2011-12-06

5

8204 000 9223

NAND-Flash & EEPROM

SCL

ADR

0 1 2 SDA

WC

VSS

B

ALE CLE WE WP

1 2

3

4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

DNU1 DNU2

0 1 2

3

4 5 6 7

R

RE CE

NC

IO

VCC

+3V3

DJAD

DJA6

DJAE

1 2

3

6

5

84

7

M24C64-WDW6

7JA2

EEPROM

Φ

(8K × 8)

100n

2JA4

DJAB

DJAA

9JA1

DJA0

RES

DJA1

47R

3JA2

+3V3

DJA5

RES3JA1

4K7

RES

9JA2

3JA5

10K

+3V3

2JA1

100n

2JA0

132536

48

18 19

IJA0

6 10 11 14

8

7

123437

39

27 28

33

2

35 40 45 46

3

4

5

43 44

1

15 20 21 22 23 24 26

17

9

16

38

47

29

30 31 32

41 42

MT29F8G08ABACAWP:C

7JA0

+3V3

DJAC

DJA3

DJA2

DJA7

DJA4

16V

2JA3

47u

2JA2

100n

4K7

3JA0

10K

3JA4

+3V3

9JA6

9JA5

9JA3

9JA4

IJA1

FJA0

DJA8

DJA9

47R

3JA3

F-RDY

F-CEn

SDA-SSB

SCL-SSB

NAND-ALE

F-CEn

NAND-CLE

FRA0 FRA5 FRA6 FRA7 FRA8 FRA10 FRA11 FRA12

F-OEn

F-RDY

F-WEn

Circuit Diagrams and PWB Layouts

EN 100QFU1.1E LA 10.

2012-Sep-14

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Philips 40PFL7007T/12 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual

Contents Page

1. Revision List

2. Technical Specs, Diversity, and Connections

2.1 Technical Specifications

2.2 Directions for Use

Table 2-1 Described Model Numbers and Diversity

2.3 Connections

2.3.1 Connections

1 - RJ45: Ethernet

Figure 2-2 Ethernet connector

Figure 2-1 Connection overview (SATELLITE and HDMI5 are optional)

2,4 - Cinch: Video YPbPr - In, Audio - In (via break-out cable)

3 - Service Connector (UART)

5 - Cinch: Audio - In (VGA/DVI)

6 - VGA: Video RGB - In

Figure 2-3 VGA Connector

Figure 2-4 SCART connector

10 - USB2.0

Figure 2-5 USB (type A)

11 - HDMI 1, 2, 3, 4, 5 (optional): Digital Video - In, Digital Audio with ARC - In/Out

Figure 2-6 HDMI (type A) connector

12 - Head phone (Output)

13 - Common Interface

8 - Aerial - In

9 - SAT - In (optional)

2.4 Chassis Overview

14 - Cinch: S/PDIF - Out

3. Precautions, Notes, and Abbreviation List

3.1 Safety Instructions

3.2 Warnings

3.3 Notes

3.3.1 General

3.3.2 Schematic Notes

3.3.3 Spare Parts

3.3.4 BGA (Ball Grid Array) ICs

Introduction

BGA Temperature Profiles

3.3.5 Lead-free Soldering

3.3.6 Alternative BOM identification

Figure 3-1 Serial number (example)

3.3.7 Board Level Repair (BLR) or Component Level Repair (CLR)

3.3.8 Practical Service Precautions

3.4 Abbreviation List

4. Mechanical Instructions

4.1 Cable Dressing

Figure 4-1 Cable dressing 40" 7000/8000 series

Figure 4-2 Cable dressing 40" rear cover 7000 series

Figure 4-3 Cable dressing 40" rear cover 8000 series

Figure 4-4 Cable dressing 42" 6900 series

Figure 4-5 Cable dressing 42" rear cover 6900 series

Figure 4-6 Cable dressing 46" 7000/8000 series

Figure 4-7 Cable dressing 46" rear cover 7000 series

Figure 4-8 Cable dressing 46" rear cover 8000 series

Figure 4-9 Cable dressing 46" 9707 series

Figure 4-10 Cable dressing 46" rear cover 9707 series

Figure 4-11 Cable dressing 47" 6900 series

Figure 4-12 Cable dressing 47" rear cover 6900 series

Figure 4-13 Cable dressing 55" 7000/8000 series

Figure 4-14 Cable dressing 55" rear cover 7000 series

Figure 4-15 Cable dressing 55" rear cover 8000 series

Figure 4-16 Cable dressing 60" 9607 series

Figure 4-17 Cable dressing 60" rear cover 9607 series

4.2 Se rvice Positions

4.3.1 Rear Cover

4.3 Assy/Panel Removal

Figure 4-19 Rear cover removal -all models -2-

4.3.2 SSB

Figure 4-18 Rear cover removal -all models -1-

Figure 4-20 SSB LVDS connector catches (optional) -1-

Figure 4-21 SSB LVDS connector catches (optional) -2-

4.4 Set Re-assembly

Figure 4-22 SSB adhesive heath path

5. Service Modes, Error Codes, and Fault Finding

5.1 Test Points

5.2 Service Modes

5.2.1 Service Default Mode (SDM)