Philips 2N7002F User Guide

2N7002F

2N7002F

TrenchMOS™ Logic Level FET

Rev. 01 — 11 February 2002

Product data

M3D088

1. Description

N-channel enhancement mode field-effect transistor in a plastic package using

TrenchMOS™1 technology.

Product availability:

2N7002F in SOT23.

2. Features

■TrenchMOS™ technology

■Very fast switching

■Logic level compatible

■Subminiature surface mount package.

3. Applications

■Relay driver

■High speed line driver

■Logic level translator.

4.Pinning information

Table 1:	Pinning - SOT23, simplified outline and symbol
Pin	Description	Simplified outline	Symbol
1	gate (g)

2source (s)

3drain (d)

	3	d
		g
		03ab44
		03ab30
1	2	s

SOT23

1.TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.

Philips Semiconductors				2N7002F
			TrenchMOS™ Logic Level FET
5. Quick reference data
Table 2:	Quick reference data
Symbol	Parameter	Conditions	Typ	Max	Unit
VDS	drain-source voltage (DC)	Tj = 25 to 150 °C	-	60	V
ID	drain current (DC)	Tsp = 25 °C; VGS = 10 V	-	475	mA
Ptot	total power dissipation	Tsp = 25 °C	-	0.83	W
Tj	junction temperature		-	150	°C
RDSon	drain-source on-state resistance	VGS = 10 V; ID = 500 mA; Tj = 25	1.7	2	Ω
		VGS = 4.5 V; ID = 75 mA; Tj = 25	2.25	4	Ω

6. Limiting values

Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol	Parameter	Conditions		Min	Max	Unit
VDS	drain-source voltage (DC)	Tj = 25 to 150 °C		-	60	V
VDGR	drain-gate voltage (DC)	Tj = 25 to 150 °C; RGS = 20 kΩ		-	60	V
VGS	gate-source voltage (DC)			-	±30	V
VGSM	peak gate-source voltage	tp ≤ 50 μs; pulsed; duty cycle = 25%		-	±40	V
ID	drain current (DC)	Tsp = 25 °C; VGS = 10 V; Figure 2 and 3		-	475	mA
		Tsp = 100 °C; VGS = 10 V; Figure 2		-	300	mA
IDM	peak drain current	Tsp = 25	°C; pulsed; tp ≤ 10 μs; Figure 3	-	1.9	A
Ptot	total power dissipation	Tsp = 25	°C; Figure 1	-	0.83	W
Tstg	storage temperature			−65	+150	°C
Tj	operating junction temperature			−65	+150	°C
Source-drain diode
IS	source (diode forward) current (DC)	Tsp = 25	°C	-	475	mA
ISM	peak source (diode forward) current	Tsp = 25	°C; pulsed; tp ≤ 10 μs	-	1.9	A

9397 750 09096

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

Product data

Rev. 01 — 11 February 2002

2 of 11

Philips Semiconductors	2N7002F
	TrenchMOS™ Logic Level FET

	120						03aa17
	Pder
	(%)
		80
		40
		0
		0		50	100	150	200
							Tsp (oC)
P		=	Ptot		× 100%
	der		----------------------
			P	°C )
			tot (25

Fig 1. Normalized total power dissipation as a function of solder point temperature.

120				03aa25
Ider
(%)
80
40
0
0	50	100	150	200
				Tsp (oC)
VGS ³ 4.5 V

I der	I D
	= ------------------- × 100%
	I D(25	°C )

Fig 2. Normalized continuous drain current as a function of solder point temperature.

10		03ai11
ID
(A)
	RDSon = VDS / ID	tp = 10 ms
1
		100 ms
		1 ms
10-1
	DC	10 ms
		100 ms
10-2
1	10	102

VDS (V)

Tsp = 25 °C; IDM is single pulse; VGS = 10 V.

Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.

9397 750 09096

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

Product data

Rev. 01 — 11 February 2002

3 of 11

Philips Semiconductors			2N7002F
		TrenchMOS™ Logic Level FET
7. Thermal characteristics
Table 4:	Thermal characteristics
Symbol	Parameter	Conditions	Min	Typ	Max	Unit
Rth(j-sp)	thermal resistance from junction to solder point	mounted on a metal clad board; Figure 4	-	-	150	K/W
Rth(j-a)	thermal resistance from junction to ambient	mounted on a printed circuit board;	-	-	350	K/W
		minimum footprint

7.1 Transient thermal impedance

103						03ai09
Zth(j-sp)
K/W
102
δ = 0.5
0.2
0.1
10
0.05
0.02
					P	tp
						δ = T
1
	single pulse
					tp	t
						T
10-1
10-5	10-4	10-3	10-2	10-1	1	10
						tp (s)

Mounted on metal clad substrate.

Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.

9397 750 09096

© Koninklijke Philips Electronics N.V. 2002. All rights reserved.

Product data

Rev. 01 — 11 February 2002

4 of 11