Philips 2N7002F User Guide

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M3D088
1. Description
2. Features
2N7002F
TrenchMOS™ Logic Level FET
Rev. 01 — 11 February 2002 Product data
N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS™1 technology.
Product availability:
2N7002F in SOT23.
TrenchMOS™ technology
Very fast switching
Logic level compatible
Subminiature surface mount package.
3. Applications
Relay driver
High speed line driver
Logic level translator.
4. Pinning information
Table 1: Pinning - SOT23, simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g) 2 source (s) 3 drain (d)
3
03ab44
12
SOT23
d
g
03ab30
s
1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V.
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
V I
D
P T R
DS
tot j DSon
drain-source voltage (DC) Tj=25to150°C - 60 V drain current (DC) Tsp=25°C; VGS= 10 V - 475 mA total power dissipation Tsp=25°C - 0.83 W junction temperature - 150 °C drain-source on-state resistance VGS= 10 V; ID= 500 mA; Tj= 25 1.7 2
= 4.5 V; ID= 75 mA; Tj= 25 2.25 4
V
GS
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC) Tj=25to150°C - 60 V drain-gate voltage (DC) Tj=25to150°C; RGS=20k -60V gate-source voltage (DC) - ±30 V peak gate-source voltage tp≤ 50 µs; pulsed; duty cycle = 25% - ±40 V drain current (DC) Tsp=25°C; VGS=10V;Figure 2 and 3 - 475 mA
= 100 °C; VGS=10V;Figure 2 - 300 mA
T
sp
peak drain current Tsp=25°C; pulsed; tp≤ 10 µs; Figure 3 - 1.9 A total power dissipation Tsp=25°C; Figure 1 - 0.83 W storage temperature 65 +150 °C operating junction temperature 65 +150 °C
source (diode forward) current (DC) Tsp=25°C - 475 mA peak source (diode forward) current Tsp=25°C; pulsed; tp≤ 10 µs - 1.9 A
9397 750 09096
Product data Rev. 01 — 11 February 2002 2 of 11
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
120
P
der
(%)
80
40
0
0 50 100 150 200
P
tot
P
der
-----------------------
P
tot 25 C°()
100%×=
03aa17
T
(oC)
sp
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
10
120
I
der
(%)
80
40
0
0 50 100 150 200
03aa25
(oC)
T
sp
VGS≥ 4.5 V
I
D
I
-------------------
der
I
D25C
()
100%×=
°
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
03ai11
I
D
(A)
R
= V
DS
/ I
D
DC
(V)
V
DS
1
-1
10
-2
10
1 10 10
DSon
tp = 10 ms
100 ms
1 ms
10 ms
100 ms
2
Tsp=25°C; IDM is single pulse; VGS = 10 V.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09096
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 01 — 11 February 2002 3 of 11
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
7. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-sp)
R
th(j-a)
thermal resistance from junction to solder point mounted on a metal clad board; Figure 4 - - 150 K/W thermal resistance from junction to ambient mounted on a printed circuit board;
- - 350 K/W
minimum footprint
7.1 Transient thermal impedance
10
Z
th(j-sp)
K/W
10
10
1
10
3
2
δ = 0.5
0.2
0.1
0.05
0.02
P
single pulse
t
p
-1 10
-5
10
-4
10
-3
10
-2
10
-1
1 10
03ai09
t
p
δ =
T
t
T
(s)
t
p
Mounted on metal clad substrate.
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration.
9397 750 09096
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 01 — 11 February 2002 4 of 11
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
8. Characteristics
Table 5: Characteristics
Tj=25°C unless otherwise specified
Symbol Parameter Conditions Min Typ Max Unit
Static characteristics
V
(BR)DSS
V
GS(th)
I
DSS
I
GSS
R
DSon
Dynamic characteristics
g
fs
C
iss
C
oss
C
rss
t
on
t
off
Source-drain diode
V
SD
t
rr
Q
r
drain-source breakdown voltage ID=10µA; VGS=0V
=25°C 6075- V
T
j
= 55 °C 55--V
T
j
gate-source threshold voltage ID= 1 mA; VDS=VGS; Figure 9
=25°C 12- V
T
j
= 150 °C 0.6 - - V
T
j
= 55 °C - - 3.5 V
T
j
drain-source leakage current VDS=48V; VGS=0V
=25°C - 0.01 1.0 µA
T
j
= 150 °C --10µA
T
j
gate-source leakage current VGS= ±15 V; VDS= 0 V - 10 100 nA drain-source on-state resistance VGS= 10 V; ID= 500 mA; Figure 7 and 8
=25°C - 1.7 2
T
j
= 150 °C - - 3.7
T
j
= 4.5 V; ID=75mA;Figure 7 and 8
V
GS
=25°C - 2.25 4
T
j
forward transconductance VDS=10V; ID= 200 mA 100 300 - mS input capacitance VGS=0V; VDS= 10 V; f = 1 MHz; Figure 11 - 2540pF output capacitance - 18 30 pF reverse transfer capacitance - 7.5 10 pF turn-on time VDD=50V; RD= 250 ; VGS=10V;
=50Ω; RGS=50
R
turn-off time - 1215ns
G
- 3 10 ns
source-drain (diode forward) voltage IS= 300 mA; VGS=0V;Figure 12 - 0.85 1.5 V reverse recovery time IS= 300 mA; dIS/dt = 100 A/µs; VGS=0V;
=25V
V
recovered charge - 30 - nC
DS
-30-ns
9397 750 09096
Product data Rev. 01 — 11 February 2002 5 of 11
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
1
I
D
Tj = 25oC
(A)
0.8
0.6
0.4
0.2
0
0 0.8 1.6 2.4
10 V
VGS = 2.5 V
(V)
V
DS
03ai13
6 V7 V
5 V
4.5 V
4 V
3.5 V
3 V
0.8
I
VDS > ID X R
D
(A)
0.6
0.4
0.2
0
0246
DSon
Tj=25°C. Tj=25°C and 150 °C; VDS> ID× R
Fig 5. Output characteristics: drain current as a
function of drain-source voltage; typical values.
03ai15
Tj = 25oC
5 V
R
DSon
()
4
VGS = 3.5 V
3
4 V
4.5 V
Fig 6. Transfer characteristics: drain current as a
function of gate-source voltage; typical values.
2.4
a
1.8
Tj = 25oC
DSon
150oC
V
GS
03ai16
(V)
.
03aa28
6 V
I
D
7 V
10 V
(A)
2
1
0
0 0.2 0.4 0.6 0.8 1
Tj=25°C.
Fig 7. Drain-source on-state resistance as a function
of drain current; typical values.
1.2
0.6
0
-60 0 60 120 180
R
DSon
=
a
---------------------------- -
R
DSon 25 C°()
(oC)
T
j
Fig 8. Normalized drain-source on-state resistance
factor as a function of junction temperature.
9397 750 09096
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 01 — 11 February 2002 6 of 11
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
T
(oC)
j
03aa34
2.4
V
GS(th)
(V)
1.8
1.2
0.6
0
-60 0 60 120 180
typ
min
ID= 1 mA; VDS=VGS.T
Fig 9. Gate-source threshold voltage as a function of
Fig 10. Sub-threshold drain current as a function of
junction temperature.
10
C
(pF)
2
03ai18
C
iss
-1
10
I
D
(A)
-2
10
-3
10
-4
10
-5
10
-6
10
0 0.6 1.2 1.8 2.4
=25°C; VDS=5V.
j
gate-source voltage.
0.8 I
VGS = 0 V
S
(A)
0.6
03aa37
typmin
(V)
V
GS
03ai17
10
1
10
C
oss
C
rss
-1
1 10 10
V
DS
2
(V)
0.4
0.2
0
0 0.4 0.8 1.2
VGS= 0 V; f = 1 MHz. Tj=25°C and 150 °C; VGS=0V.
Fig 11. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical values.
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical values.
150 oC
Tj = 25 oC
(V)
V
SD
9397 750 09096
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data Rev. 01 — 11 February 2002 7 of 11
Philips Semiconductors
2N7002F
TrenchMOS™ Logic Level FET
9. Package outline
Plastic surface mounted package; 3 leads SOT23
D
3
A
A
1
12
e
1
b
p
e
w M
B
E
H
E
detail X
AB
Q
L
p
X
v M
A
c
0 1 2 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT
1.1
mm
0.9
OUTLINE VERSION
SOT23 TO-236AB
1
A
max.
0.1
cD
b
p
0.48
0.15
0.09
3.0
2.8
0.38
IEC JEDEC EIAJ
e
E
1.4
1.9
1.2
REFERENCES
e
0.95
H
L
Qwv
1
2.5
2.1
p
E
0.55
0.45
0.15
0.45
0.2
0.1
EUROPEAN
PROJECTION
ISSUE DATE
97-02-28 99-09-13
Fig 13. SOT23.
9397 750 09096
Product data Rev. 01 — 11 February 2002 8 of 11
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Philips Semiconductors
10. Revision history
Table 6: Revision history
Rev Date CPCN Description
1 20020211 - Product spec; initial version
2N7002F
TrenchMOS™ Logic Level FET
9397 750 09096
Product data Rev. 01 — 11 February 2002 9 of 11
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Philips Semiconductors
Philips Semiconductors
11. Data sheet status
2N7002F
2N7002F
TrenchMOS™ Logic Level FET
TrenchMOS™ Logic Level FET
Data sheet status
Objective data Development This data sheet containsdata fromthe objective specification for product development.Philips Semiconductors
Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a
Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to
[1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[1]
Product status
12. Definitions
Short-form specification — The data in a short-form specification is
extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitablefor the specified use without further testing or modification.
[2]
Definition
reserves the right to change the specification in any manner without notice.
later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product.
make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
13. Disclaimers
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations orwarranties that theseproducts are free from patent, copyright,or mask work right infringement, unless otherwise specified.
Contact information
For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. Fax: +31 40 27 24825
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
9397 750 09096
9397 750 09096
Product data Rev. 01 — 11 February 2002 10 of 11
Product data Rev. 01 — 11 February 2002 10 of 11
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Philips Semiconductors
Contents
1 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
4 Pinning information. . . . . . . . . . . . . . . . . . . . . . 1
5 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
6 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2
7 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4
7.1 Transient thermal impedance . . . . . . . . . . . . . . 4
8 Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 5
9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8
10 Revision history. . . . . . . . . . . . . . . . . . . . . . . . . 9
11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 10
12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
13 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2N7002F
TrenchMOS™ Logic Level FET
© Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Date of release: 11 February 2002 Document order number: 9397 750 09096
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