Philips 2N7002E Technical data
2N7002E
N-channel TrenchMOS™ FET
Rev. 02 — 26 April 2005 Product data sheet
1. Product profile
1.1 General description
N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using
TrenchMOS™ technology.
1.2 Features
■ Logic level threshold compatible ■ Very fast switching
■ Surface-mounted package ■ TrenchMOS™ technology
1.3 Applications
■ Logic level translator ■ High speed line driver
1.4 Quick reference data
■ VDS≤ 60 V ■ ID≤ 385 mA
■ R
≤ 3 Ω ■ P
DSon
= 0.83 W
tot
2. Pinning information
Table 1: Pinning
Pin Description Simplified outline Symbol
1 gate (G)
2 source (S)
3 drain (D)
12
SOT23
3
G
mbb076
D
S
Philips Semiconductors
2N7002E
N-channel TrenchMOS™ FET
3. Ordering information
Table 2: Ordering information
Type number Package
Name Description Version
2N7002E TO-236AB plastic surface mounted package; 3 leads SOT23
4. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC) 25 °C ≤ Tj≤ 150 °C - 60 V
drain-gate voltage (DC) 25 °C ≤ Tj≤ 150 °C; RGS=20kΩ -60V
gate-source voltage (DC) - ±30 V
peak gate-source voltage tp≤ 50 µs; pulsed; duty cycle = 25 % - ±40 V
drain current (DC) Tsp=25°C; VGS=10V;Figure 2 and 3 - 385 mA
= 100 °C; VGS=10V;Figure 2 - 245 mA
T
sp
peak drain current Tsp=25°C; pulsed; tp≤ 10 µs; Figure 3 - 1.5 A
total power dissipation Tsp=25°C; Figure 1 - 0.83 W
storage temperature −65 +150 °C
junction temperature −65 +150 °C
source (diode forward) current (DC) Tsp=25°C - 385 mA
peak source (diode forward) current Tsp=25°C; pulsed; tp≤ 10 µs - 1.5 A
9397 750 14944 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 02 — 26 April 2005 2 of 11
Philips Semiconductors
2N7002E
N-channel TrenchMOS™ FET
120
P
der
(%)
80
40
0
0 50 100 150 200
P
P
der
tot
------------------------
P
tot 25 C°()
100 %×= I
03aa17
T
(°C)
sp
Fig 1. Normalized total power dissipation as a
function of solder point temperature
10
120
I
der
(%)
80
40
0
0 50 100 150 200
I
D
der
-------------------- -
I
D25 C
()
100 %×=
°
03aa25
T
(°C)
sp
Fig 2. Normalized continuous drain current as a
function of solder point temperature
03ai10
I
D
(A)
Limit R
1
-1
10
-2
10
1 10 10
DSon
= V
/ I
DS
D
DC
VDS (V)
tp = 10 µs
100 µs
1 ms
10 ms
100 ms
Tsp=25°C; IDM is single pulse
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage
2
9397 750 14944 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 02 — 26 April 2005 3 of 11
Philips Semiconductors
2N7002E
N-channel TrenchMOS™ FET
5. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter Conditions Min Typ Max Unit
R
th(j-sp)
R
th(j-a)
thermal resistance from junction to solder point Figure 4 - - 150 K/W
thermal resistance from junction to ambient mounted on a printed-circuit
- - 350 K/W
board; minimum footprint;
vertical in still air
3
10
Z
th(j-sp)
K/W
2
10
δ = 0.5
0.2
0.1
10
0.05
1
10
0.02
single pul se
-1
-5
10
-4
10
-3
10
-2
10
-1
10
P
t
p
T
1 10
t
p
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration
(s)
δ =
03ai09
t
p
T
t
9397 750 14944 © Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet Rev. 02 — 26 April 2005 4 of 11
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