1. Description
2. Features
2N7002
N-channel enhancement mode field-effect transistor
Rev. 03 — 27 July 2000 Product specification
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™1 technology.
Product availability:
2N7002 in SOT23.
■ TrenchMOS™ technology
■ Very fast switching
■ Logic level compatible
■ Subminiature surface mount package.
3. Applications
■ Relay driver
c
c
■ High speed line driver
■ Logic level translator.
4. Pinning information
Table 1: Pinning - SOT23, simplified outline and symbol
Pin Description Simplified outline Symbol
1 gate (g)
2 source (s)
3 drain (d)
1. TrenchMOS is a trademark of Royal Philips Electronics.
3
03ab44
12
SOT23 N-channel MOSFET
d
g
03ab30
s
Philips Semiconductors
2N7002
N-channel enhancement mode field-effect transistor
5. Quick reference data
Table 2: Quick reference data
Symbol Parameter Conditions Typ Max Unit
V
I
P
T
R
DS
D
tot
j
DSon
drain-source voltage (DC) Tj=25to150°C − 60 V
drain current (DC) Tsp=25°C; VGS=10V − 300 mA
total power dissipation Tsp=25°C − 0.83 W
junction temperature − 150 °C
drain-source on-state resistance VGS= 10 V; ID= 500 mA 2.8 5 Ω
= 4.5 V; ID= 75 mA 3.8 5.3 Ω
V
GS
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
V
DS
V
DGR
V
GS
V
GSM
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC) Tj=25to150°C − 60 V
drain-gate voltage (DC) Tj=25to150°C; RGS=20kΩ−60 V
gate-source voltage (DC) −±30 V
peak gate-source voltage tp≤ 50 µs; pulsed; duty cycle = 25% −±40 V
drain current (DC) Tsp=25°C; VGS=10V;
− 300 mA
Figure 2 and 3
T
= 100 °C; VGS=10V;Figure 2 − 190 mA
sp
peak drain current Tsp=25°C; pulsed; tp≤ 10 µs;
− 1.2 A
Figure 3
total power dissipation Tsp=25°C; Figure 1 − 0.83 W
storage temperature −65 +150 °C
operating junction temperature −65 +150 °C
source (diode forward) current (DC) Tsp=25°C − 300 mA
peak source (diode forward) current Tsp=25°C; pulsed; tp≤ 10 µs − 1.2 A
9397 750 07319
Product specification Rev. 03 — 27 July 2000 2 of 13
© Philips Electronics N.V. 2000. All rights reserved.
Philips Semiconductors
2N7002
N-channel enhancement mode field-effect transistor
120
P
der
(%)
100
80
60
40
20
0
0 25 50 75 100 125 150 175
P
P
der
tot
----------------------
P
tot 25 C°()
100%×=
03aa17
Tsp (oC)
Fig 1. Normalized total power dissipation as a
function of solder point temperature.
10
I
D
Tsp = 25oC
(A)
120
I
der
(%)
100
80
60
40
20
0
0 25 50 75 100 125 150 175
03aa25
Tsp (oC)
VGS≥ 4.5 V
I
I
der
D
------------------ -
I
D25C°()
100%×=
Fig 2. Normalized continuous drain current as a
function of solder point temperature.
03aa03
tp = 10 µs
1
P
-1
10
t
p
-2
10
11010
R
= VDS/ I
DSon
t
p
δ =
T
t
T
D
100 µs
1 ms
10 ms
D.C.
100 ms
VDS (V)
2
Tsp=25°C; IDM is single pulse.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 07319
© Philips Electronics N.V. 2000. All rights reserved.
Product specification Rev. 03 — 27 July 2000 3 of 13
Philips Semiconductors
2N7002
N-channel enhancement mode field-effect transistor
7. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter Conditions Value Unit
R
th(j-sp)
R
th(j-a)
thermal resistance from junction to solder
point
thermal resistance from junction to ambient mounted on a printed circuit board;
7.1 Transient thermal impedance
mounted on a metal clad substrate;
Figure 4
minimum footprint
150 K/W
350 K/W
03aa01
t
p
δ
=
T
p
110
t
T
tp (s)
Z
th(j-sp)
10
K/W
10
3
δ = 0.5
2
10
0.2
0.1
10
0.02
1
single pulse
-1
-5
10
-4
10
0.05
-3
10
-2
10
10
P
t
-1
Mounted on metal clad substrate.
Fig 4. Transient thermal impedance from junction to solder point as a function of
pulse duration.
9397 750 07319
© Philips Electronics N.V. 2000. All rights reserved.
Product specification Rev. 03 — 27 July 2000 4 of 13