查询PI6C2510-133供应商
PI6C2510-133
Low-Noise, Phase-Locked Loop
Clock Driver with 10 Clock Outputs
Features
• Operating Frequency up to 150 MHz
• Low-Noise Phase-Locked Loop Clock Distribution that
meets 133 MHz Registered DIMM Synchronous DRAM
modules for server/workstation/PC applications
• Allows Clock Input to have Spread Spectrum modulation
for EMI reduction
• Zero Input-to-Output delay: Distribute one Clock Input
to one Bank of Ten outputs, with an output enable.
• Low jitter: Cycle-to-Cycle jitter ±75ps max.
• On-chip series damping resistor at clock output drivers
for low noise and EMI reduction
• Operates at 3.3V V
• Packaging(Pb-free & Green available):
CC
- 24-pin TSSOP (L)
Block Diagram
G
10
Y[0:9]
CLK_IN
PLL
FB_IN
AVcc
FB_OUT
Description
The PI6C2510-133 is a “quiet,” low-skew, low-jitter, phase-locked
loop (PLL) clock driver, distributing high-frequency clock signals
for SDRAM and server applications. By connecting the feedback
FB_OUT output to the feedback FB_IN input, the propagation
delay from the CLK_IN input to any clock output will be nearly zero.
This zero-delay feature allows the CLK_IN input clock to be
distributed, providing one clock input to one bank of ten outputs,
with an output enable.
This clock driver is designed to meet the PC133 SDRAM Registered
DIMM specification. For test purposes, the PLL can be bypassed
by strapping AVCC to ground.
Pin Configuration
AGND
V
CC
Y0
Y1
Y2
GND
GND
Y3
Y4
V
CC
FB_OUT
1
2
3
4
5
24-Pin
6
L
7
8
9
10
G
11
12
24
23
22
21
20
19
18
17
16
15
14
13
CLK_IN
AV
CC
V
CC
Y9
Y8
GND
GND
Y7
Y6
Y5
V
CC
FB_IN
Functional Table
stupnIstuptuO
G]9:0[YTUO_BF
LL NI_KLC
HNI_KLCNI_KLC
1
PS8383B 09/14/04
Pin Functions
emaNniPrebmuNniPepyTnoitpircseD
NI_KLC42I .murtcepsdaerpsswollaNI_KLC.tupnikcolCecnerefeR
NI_BF31I LLPlanretniehtotlangiskcabdeefehtsedivorpNI_BF.tupnikcabdeeF
PI6C2510-133
Low-Noise, Phase-Locked Loop
Clock Driver with 10 Clock Outputs
G11I
TUO_BF21O
]9:0[Y
VA
CC
51,9,8,5,4,3
12,02,71,61
32rewoP
O
DNGA1 dnuorG .yrtiucricgolanaehtrofecnereferdnuorgehtsedivorpDNGA.dnuorggolanA
V
CC
22,41,01,2rewoPylppusrewoP
DNG91,81,7,6dnuorGdnuorG
NI_KLC
NI_KLC.stuptuoecivedehtotyltceriddereffub
otdelbasidera]9:0[Ystuptuo,WOLsiGnehW.elbaneknabtuptuO
.delbaneera]9:0[Ystuptuolla,HGIHsiGnehW.etatswolcigola
.kcabdeeflanretxerofdetacidedsiTUO_BF.tuptuokcabdeeF
emasehtforotsisergnipmad-seiresdeddebmenasahTUO_BF
.]9:0[Ystuptuokcolcehtsaeulav
foseipocweks-woledivorpstuptuoesehT.stuptuokcolC
.
VA.ylppusrewopgolanA
CC
VAnehW.sesopruptset
CC
.rotsisergnipmad-seiresdeddebmenasahtuptuohcaE
rofLLPehtssapybotdesuoslaebnac
dnadessapybsiLLP,dnuorgotdeppartssi
2
PS8383B 09/14/04
DC Specifications
Absolute maximum ratings over operating free-air temperature range.
lobmySretemaraP.niM.xaMstinU
PI6C2510-133
Low-Noise, Phase-Locked Loop
Clock Driver with 10 Clock Outputs
V
I
O
V
CDegatlovtupniCD0.5+
_I
I
CDtnerructuptuoCD001Am
_O
rewoPTtanoitapissidrewopmumixaM
T
GTS
Note: Stress beyond those listed under “absolute maximum ratings” may cause permanent damage to the device.
retemaraPsnoitidnoCtseTV
I
CC
C
I
VIV=
VIV=
egnaregatlovtupnI
V
egnaregatlovtuptuO
o
55=
A
riallitsniC0.1W
5.0-
erutarepmetegarotS56-051
CC
I;DNGro
CC
CC
DNGro
0=V6.301
O
.niM.pyT.xaMstinU
4
5.0+
CC
VV
o
V3.3
C
O
VOV=
CC
DNGro6
Recommended Operating Conditions
lobmySretemaraP.niM.xaMstinU
C
µA
Fp
V
CC
V
HI
egatlovylppuS0.36.3
egatlovtupnilevelhgiH0.2
V
V
LI
V
I
T
A
egatlovtupnI0.0V
egatlovtupnilevelwoL8.0
erutarepmetria-eerfgnitarepO007
CC
o
C
Electrical characteristics over recommended operating free-air temperature range
Pull Up/Down Currents of PI6C2510-133, VCC = 3.0V
lobmySretemaraPnoitidnoC.niM.xaMstinU
I
HO
tnerrucpu-lluPV
tnerrucnwod-lluPV
tnerrucpu-lluPV
I
LO
tnerrucnwod-lluPV
V4.2=6.31-
TUO
V0.2=22-
TUO
V8.0=91
TUO
TUO
V55.0=31
Am
3
PS8383B 09/14/04
Low-Noise, Phase-Locked Loop
Clock Driver with 10 Clock Outputs
AC Specifications
Timing requirements over recommended ranges of supply voltage and operating free-air temperature.
lobmySretemaraP.niM.xaMstinU
PI6C2510-133
F
KLC
ycneuqerfkcolctupnI52051zHM
elcycytudkcolctupnI0406%
purewopretfaemiTnoitazilibatS1sm
Switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL=30pF
retemaraPmorFoT
V
CC
C°07-0,V3.0±V3.3=
stinU
.niM.pyT.xaM
tuohtiwdnahtiw,rorreesahpt
murtcepsdaerps
,elcyc-ot-elcyc,rettiJ
daerpstuohtiwdnahtiw
murtceps
zHM331ta,wekSroYynATUO_BF
elcycytuD 540555%
NI_KLC ↑ zHM331taNI_BF ↑ 051–051+
TUO_BFrotuptuOynA
KLCni
n
zHM331ta
rotuptuO
niTUO_BF
KLC
1+n
57–57+
roYynA
TUO_BF
sp
051
V0.2otV4.0,emit-esir,rt 0.1
sn
V4.0otV0.2,emit-llaf,ft 1.1
Note: These switching parameters are guaranteed, but not production tested.
4
PS8383B 09/14/04
Packaging Mechanical: 24-pin TSSOP (L)
24
.169
.177
1
.0256
BSC
0.65
.303
.311
7.7
7.9
.007
.012
0.19
0.30
.002
.006
4.3
4.5
.047
1.20
Max
SEATING
PLANE
0.05
0.15
X.XX
DENOTES CONTROLLING
X.XX
DIMENSIONS IN MILLIMETERS
PI6C2510-133
Low-Noise, Phase-Locked Loop
Clock Driver with 10 Clock Outputs
0.09
.004
0.20
.008
0.45
.018
0.75
.030
.252
BSC
6.4
Ordering Information
Ordering Code Package Code Package Type
PI6C2510-133L L 24-pin TSSOP
PI6C2510-133LE L Pb-free & Green, 24-pin TSSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com
5
PS8383B 09/14/04
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