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P4C147
ULTRA HIGH SPEED 4K x 1
STATIC CMOS RAM
FEATURES
P4C147
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25 ns (Commercial)
– 15/20/25/35 ns (Military)
Low Power Operation
– 715 mW Active –10 (Commercial)
– 550 mW Active –25 (Commercial)
– 110 mW Standby (TTL Input)
– 55 mW Standby (CMOS Input)
DESCRIPTION
The P4C147 is a 4,096-bit ultra high speed static RAM
organized as 4K x 1. The CMOS memories require no
clocks or refreshing, and have equal access and cycle
times. Inputs are fully TTL-compatible. The RAM operates
from a single 5V ± 10% tolerance power supply.
Access times as fast as 10 nanoseconds are available,
permitting greatly enhanced system operating speeds.
Single 5V ± 10% Power Supply
Separate Input and Output Ports
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 18 Pin 300 mil DIP
– 18 Pin CERPACK
– 18 Pin LCC (290 x 430 mils)
CMOS is utilized to reduce power consumption in both
active and standby modes. In addition to very high
performance, this device features latch-up protection and
single-event-upset protection.
The P4C147 is available in 18 pin 300 mil DIP packages
as well as an 18-pin CERPACK package and LCC.
FUNCTIONAL BLOCK DIAGRAM PIN CONFIGURATIONS
A
4,096-BIT
MEMORY
ARRAY
COLUMN I/O
COLUMN
SELECT
AA
(6)
A
1
0
2
A
1
3
A
2
4
A
3
5
A
D
A
OUT
WE
4
6
5
7
8
9
D
OUT
18
V
CC
17
A
11
16
A
10
15
A
9
14
A
8
13
A
7
12
A
6
D
11
IN
CEGND
10
DIP (P1, D1), CERPACK (F1) SIMILAR
LCC (L7)
TOP VIEW
Means Quality, Service and Speed
13
CE
WE
ROW
SELECT
(6)
A
D
IN
INPUT
DATA
CONTROL
D
A
A
A
A
OUT
0
1
A
2
1
3
2
4
3
5
4
6
5
7
9
8
WE
11
CC
A
V
A
17
18
10
GND
CE
A
16
10
A
15
9
A
14
8
A
13
7
A
12
6
11
IN
D
1Q97
P4C147
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
Power Supply Pin with –0.5 to +7 V
(1)
Symbol Parameter Value Unit
T
Respect to GND
Terminal Voltage with –0.5 to
V
TERM
Respect to GND VCC +0.5 V
(up to 7.0V)
T
A
Operating Temperature –55 to +125 °C
RECOMMENDED OPERATING
CONDITIONS
(2)
Grade
Commercial
Military
Ambient Temp
0˚C to 70˚C
-55˚C to +125˚C
Gnd
0V
0V
V
CC
5.0V ± 10%
5.0V ± 10%
T
P
I
OUT
CAPACITANCES
(VCC = 5.0V, TA = 25°C, f = 1.0MHz)
Symbol Parameter Conditions Typ. Unit
C
C
DC ELECTRICAL CHARACTERISTICS
Over recommended operating temperature and supply voltage (2)
Symbol
Parameter
Test Conditions
BIAS
Temperature Under –55 to +125 °C
Bias
STG
T
Storage Temperature –65 to +150 °C
Power Dissipation 1.0 W
DC Output Current 50 mA
IN
OUT
Input Capacitance VIN = 0V 5 pF
Output Capacitance V
(4)
Min.
= 0V 7 pF
OUT
P4C147
Max.
Unit
V
Output High Voltage
OH
IOH = –4 mA, VCC = Min.
(TTL Load)
V
Output Low Voltage
OL
IOL = +8 mA, VCC = Min
(TTL Load)
V
V
I
I
I
Input High Voltage
IH
Input Low Voltage
IL
I
Input Leakage Current
LI
Output Leakage Current
LO
Standby Power Supply
SB
Current (TTL Input Levels)
Standby Power Supply
SB1
Current
(CMOS Input Levels)
VCC = Max., VIN = GND to V
CC
VCC = Max., CE = VIH,
V
= GND to V
OUT
CC
CE≥VIH, VCC = Max., Mil.
f=Max., Output Open Comm’l
CE≥VHC, VCC = Max., f= 0, Mil.
Output Open Comm’l
VIN≤0.2V or VIN≥VCC -0.2V
POWER DISSIPATION CHARACTERISTICS VS. SPEED
Symbol Parameter
I
CC
Dynamic Operating Current
Temperature
Range
Commercial
Military
-10
130
N/A
Mil.
Comm’l
Mil.
Comm’l
130
N/A
120
145
2.4
2.2
–0.5
–10
–5
–10
–5
__
__
__
__
115
135
V
0.4
VCC =+0.5
(3)
0.8
+10
+5
+10
+5
30
V
V
V
µA
µA
mA
23
15
mA
10
Unit
mA
mA
100
125
-35-25-20-15-12
N/A
120
14
P4C147
AC CHARACTERISTICS—READ CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)
Sym.
t
RC
t
AA
t
AC
t
OH
t
LZ
t
HZ
t
PU
t
PD
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from
Address Change
Chip Enable to
Output in Low Z
Chip Disable to
Output in High Z
Chip Enable to
Power Up Time
Chip Disable to
Power Down Time
Parameter
(2)
Min
10
2
2
0
-10
Max
10
10
4
10
Min
12
2
2
0
-12
Max
TIMING WAVEFORM OF READ CYCLE NO. 1
12
12
5
12
(5)
Min
15
2
2
0
-15
Max
15
15
6
15
-20 -25 -35
Min
20
2
2
0
Max
20
20
8
20
Min
25
2
2
0
Max
25
25
10
25
Min
35
2
2
0
Max
35
35
14
35
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ADDRESS
t
t
DATA OUT
AA
OH
TIMING WAVEFORM OF READ CYCLE NO. 2
(6)
t
RC
CE
t
AC
(7)
t
DATA OUT
I
SUPPLY
V
CC
CURRENT
Notes:
1. Stresses greater than those listed under MAXIMUM RATINGS may
cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification
is not implied. Exposure to MAXIMUM rating conditions for extended
periods may affect reliability.
2. Extended temperature operation guaranteed with 400 linear feet per
minute of air flow.
3. Transient inputs with VIL and IIL not more negative than –3.0V and
–100mA, respectively, are permissible for pulse widths up to 20 ns.
CC
I
SB
LZ
t
PU
(8)
t
RC
DATA VALIDPREVIOUS DATA VALID
(7)
t
HZ
DATA VALID
t
4. This parameter is sampled and not 100% tested.
5. CE is LOW and WE is HIGH for READ cycle.
6. WE is HIGH, and address must be valid prior to or coincident with CE
transition LOW.
7. Transition is measured ±200mV from steady state voltage prior to
change with specified loading in Figure 1. This parameter is sampled
and not 100% tested.
8. Read Cycle Time is measured from the last valid address to the first
transitioning address.
HIGH IMPEDANCE
PD
15
P4C147
AC CHARACTERISTICS—WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)
Sym.
t
Write Cycle Time
WC
t
Chip Enable Time to End of Write
CW
t
Address Valid to End of Write
AW
t
Address Set-up Time
AS
t
Write Pulse Width
WP
Address Hold Time from
t
AH
End of Write
t
Data Valid to End of Write
DW
t
Data Hold Time
DH
Write Enable to Output in High Z
t
WZ
Output Active from End of Write
t
OW
Parameter
(2)
Min
10
8
8
0
8
0
5
0
-10
Max
-12
Min
12
10
10
0
10
0
6
0
5
0
0
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (
-15
Min
Max
Max
15
12
12
0
12
0
7
0
6
7
0
WEWE
WE CONTROLLED)
WEWE
(11)
t
WC
Min
20
15
15
0
14
0
9
0
0
-20
Max
-25
Min
Max
25
20
20
0
15
0
12
0
9
12
0
(9)
Min
35
25
25
0
18
0
15
0
0
-35
Max
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ADDRESS
t
CW
CE
t
AW
WE
t
AS
DATA IN
(12)
t
WZ
DATA OUT DATA UNDEFINED
TIMING WAVEFORM OF WRITE CYCLE NO. 2 (
ADDRESS
t
AS
CE
t
AW
WE
DATA IN
t
WP
t
DW
DATA VALID
HIGH IMPEDANCE
CECE
CE CONTROLLED)
CECE
(11)
t
WC
t
CW
t
WP
t
DW
DATA VALID
t
WR
t
AH
t
DH
(10, 12)
t
OW
(9)
t
AH
t
WR
t
DH
DATA OUT
Notes:
9. CE and WE must be LOW for WRITE cycle.
10. If CE goes HIGH simultaneously with WE high, the output remains
in a high impedance state.
11. Write Cycle Time is measured from the last valid address to the first
transition address.
HIGH IMPEDANCE
12. Transition is measured ±200mV from steady state voltage prior to
change with specified loading in Figure 1. This parameter is
sampled and not 100% tested.
16
P4C147
AC TEST CONDITIONS
Input Pulse Levels GND to 3.0V
Input Rise and Fall Times 3ns
Input Timing Reference Level 1.5V
Output Timing Reference Level 1.5V
Output Load See Figures 1 and 2
+5
480Ω
D
OUT
255Ω
Figure 1. Output Load Figure 2. Thevenin Equivalent
* including scope and test fixture.
30pF (5pF* for tHZ, tLZ, t
t
, tWZ and tOW)
OLZ
OHZ
,
TRUTH TABLE
Mode
CECE
CE
CECE
Standby H X High Z Standby
Read L H D
Write L L High Z Active
D
OUT
WEWE
WE Output Power
WEWE
OUT
RTH = 166.5Ω
30pF (5pF* for tHZ, tLZ, t
t
, tWZ and tOW)
OLZ
Active
VTH = 1.73 V
OHZ
,
Note:
Due to the ultra-high speed of the P4C147, care must be taken when
testing this device; an inadequate setup can cause a normal functioning
part to be rejected as faulty. Long high-inductance leads that cause
supply bounce must be avoided by bringing the VCC and ground planes
directly up to the contactor fingers. A 0.01 µF high frequency capacitor
is also required between VCC and ground. To avoid signal reflections,
proper termination must be used; for example, a 50Ω test environment
should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at
the comparator input, and a 116Ω resistor must be used in series with
D
to match 166Ω (Thevenin Resistance).
OUT
17
P4C147
ORDERING INFORMATION
P4C147 xxxx
Device Type Package
Speed
Processing
C 0°C to +70°C
M –55°C to +125°C
MB Mil Temp. with MIL-STD-883
Class B Co mpliance
P Plastic DIP (300 mil)
D CERDIP (300 mil)
F CERPACK
L LCC
10, 12, 15, 20, 2 5, 35
4K x 1 SRAM
The P4C147 is also available per SMD 5962-88587
SELECTION GUIDE
The P4C147 is available in the following temperature, speed and package options.
Temperature
Range
Commercial
Military Temp.
Package 10
Plastic DIP
CERDIP (300 mil)
LCC
CERPACK
Military
Processed*
CERDIP (300 mil)
LCC
CERPACK
* Military temperature range with MIL-STD-883, Class B processing.
N/A = Not Available
Speed (ns)
–10PC
N/A
N/A
N/A
N/A
N/A
N/A
–12PC
N/A
N/A
N/A
N/A
N/A
N/A
12 15 20
–15PC
–15DM
–15LM
–15FM
–15DMB
–15LMB
–15FMB
–20PC
–20DM
–20LM
–20FM
–20DMB
–20LMB
–20FMB
25
–25PC
–25DM
–25LM
–25FM
–25DMB
–25LMB
–25FMB
35
N/A
–35DM
–35LM
–35FM
–35DMB
–35LMB
–35FMB
18
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